https://github.com/topperc created https://github.com/llvm/llvm-project/pull/76548
Instead of only handling vscale x 16 x i1 predicate vectors, handle any scalable i1 vector where the known minimum is divisible by 8. This will be used on RISC-V where we have multiple sizes of predicate types. Though I do wonder if we have the bitcast on the wrong side. Maybe we should be casting the fixed type to an i1 fixed vector? That would better handle cases where the mininum elements isn't a multiple of 8, but vscale*min_elements is. >From a9af720f8a4b42077031efdb27e4868cc2af2c44 Mon Sep 17 00:00:00 2001 From: Craig Topper <craig.top...@sifive.com> Date: Thu, 28 Dec 2023 16:49:03 -0800 Subject: [PATCH] [IRGen][AArch64][RISCV] Generalize bitcast between i1 predicate vector and i8 fixed vector. Instead of only handling vscale x 16 x i1 predicate vectors, handle any scalable i1 vector where the known minimum is divisible by 8. This will be used on RISC-V where we have multiple sizes of predicate types. Though I do wonder if we have the bitcast on the wrong side. Maybe we should be casting the fixed type to an i1 fixed vector? That would better handle cases where the mininum elements isn't a multiple of 8, but vscale*min_elements is. --- clang/lib/CodeGen/CGExprScalar.cpp | 24 ++++++++++++++---------- 1 file changed, 14 insertions(+), 10 deletions(-) diff --git a/clang/lib/CodeGen/CGExprScalar.cpp b/clang/lib/CodeGen/CGExprScalar.cpp index 6adf99531e30e3..ace4f743c77596 100644 --- a/clang/lib/CodeGen/CGExprScalar.cpp +++ b/clang/lib/CodeGen/CGExprScalar.cpp @@ -2136,14 +2136,16 @@ Value *ScalarExprEmitter::VisitCastExpr(CastExpr *CE) { // bitcast. if (const auto *FixedSrc = dyn_cast<llvm::FixedVectorType>(SrcTy)) { if (const auto *ScalableDst = dyn_cast<llvm::ScalableVectorType>(DstTy)) { - // If we are casting a fixed i8 vector to a scalable 16 x i1 predicate + // If we are casting a fixed i8 vector to a scalable i1 predicate // vector, use a vector insert and bitcast the result. bool NeedsBitCast = false; - auto PredType = llvm::ScalableVectorType::get(Builder.getInt1Ty(), 16); llvm::Type *OrigType = DstTy; - if (ScalableDst == PredType && - FixedSrc->getElementType() == Builder.getInt8Ty()) { - DstTy = llvm::ScalableVectorType::get(Builder.getInt8Ty(), 2); + if (ScalableDst->getElementType()->isIntegerTy(1) && + ScalableDst->getElementCount().isKnownMultipleOf(8) && + FixedSrc->getElementType()->isIntegerTy(8)) { + DstTy = llvm::VectorType::get( + FixedSrc->getElementType(), + ScalableDst->getElementCount().divideCoefficientBy(8)); ScalableDst = cast<llvm::ScalableVectorType>(DstTy); NeedsBitCast = true; } @@ -2164,12 +2166,14 @@ Value *ScalarExprEmitter::VisitCastExpr(CastExpr *CE) { // bitcast. if (const auto *ScalableSrc = dyn_cast<llvm::ScalableVectorType>(SrcTy)) { if (const auto *FixedDst = dyn_cast<llvm::FixedVectorType>(DstTy)) { - // If we are casting a scalable 16 x i1 predicate vector to a fixed i8 + // If we are casting a scalable i1 predicate vector to a fixed i8 // vector, bitcast the source and use a vector extract. - auto PredType = llvm::ScalableVectorType::get(Builder.getInt1Ty(), 16); - if (ScalableSrc == PredType && - FixedDst->getElementType() == Builder.getInt8Ty()) { - SrcTy = llvm::ScalableVectorType::get(Builder.getInt8Ty(), 2); + if (ScalableSrc->getElementType()->isIntegerTy(1) && + ScalableSrc->getElementCount().isKnownMultipleOf(8) && + FixedDst->getElementType()->isIntegerTy(8)) { + SrcTy = llvm::VectorType::get( + FixedDst->getElementType(), + ScalableSrc->getElementCount().divideCoefficientBy(8)); ScalableSrc = cast<llvm::ScalableVectorType>(SrcTy); Src = Builder.CreateBitCast(Src, SrcTy); } _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits