================ @@ -0,0 +1,8 @@ +// RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -show-encoding %s | FileCheck %s +// RUN: llvm-mc -arch=amdgcn -mcpu=gfx1200 -show-encoding %s | FileCheck %s + +v_dot2_bf16_bf16 v5, v1, v2, 100.0 +// CHECK: v_dot2_bf16_bf16 v5, v1, v2, 0x42c8 ; encoding: [0x05,0x00,0x67,0xd6,0x01,0x05,0xfe,0x03,0xc8,0x42,0x00,0x00] + +v_dot2_bf16_bf16 v5, v1, v2, 1.0 +// CHECK: v_dot2_bf16_bf16 v5, v1, v2, 1.0 ; encoding: [0x05,0x00,0x67,0xd6,0x01,0x05,0xca,0x03] ---------------- shiltian wrote:
It looks like our assembler doesn't like the case such as `v_dot2_bf16_bf16 v5, v1, 0x42c842c8, 0x42c8`, even w/o this patch. Even the asm (`v_dot2_bf16_bf16 v2, s0, 0x3f803f80, v2`) generated in another file above (`llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fdot2.bf16.bf16.ll`) can't be recognized by our assembler. 😄 https://github.com/llvm/llvm-project/pull/80908 _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits