quic-garvgupt wrote: > > Hi @topperc, can you add instruction alias for cflush and cdiscard > > instructions when the rs1 is X0 to `sf.cflush.d.l1` and `sf.cflush.d.l1` > > respectively, as this register is optional according to spec? > > x0 has special meaning, but the spec never says it is "optional".
Possibly I am mistaken here but this is what I inferred from the below text in the mannual - rs1 is optional, so if a user does not specify it then by default it will be X0. Apologies if I am missing something here but just wanted to be clear. >From the mannual - `Opcode 0xFC000073, with **optional** rs1 field in bits [19:15]` https://github.com/llvm/llvm-project/pull/83896 _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
