================
@@ -115,7 +115,13 @@ void AMDGPUABIInfo::computeInfo(CGFunctionInfo &FI) const {
Address AMDGPUABIInfo::EmitVAArg(CodeGenFunction &CGF, Address VAListAddr,
QualType Ty) const {
- llvm_unreachable("AMDGPU does not support varargs");
+ const bool IsIndirect = false;
+ const bool AllowHigherAlign = true;
+ // Would rather not naturally align values
+ // Splitting {char, short} into two separate arguments makes that difficult.
----------------
JonChesterfield wrote:
Currently amdgpu takes a `struct {char x; short y;} example;` and splats it
across two registers. Doesn't seem totally good to me but I'm trying to avoid
changing the non-variadic calling convention at the same time.
This means foo(example) and bar (char, short) look the same in IR, thus they
need to have consistent representations as far as va_arg is concerned. The
specific case that caused me trouble here was trying to pass a double with four
byte alignment as opposed to eight (that's what the the naturally align values
comment relates to).
I'll see if I can capture this in an amdgpu specific test case and fix up the
comment
https://github.com/llvm/llvm-project/pull/89007
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