https://github.com/tmatheson-arm updated 
https://github.com/llvm/llvm-project/pull/92600

>From 518b83ab69c4852f7e7ea71c17df3f58e8ff50ef Mon Sep 17 00:00:00 2001
From: Tomas Matheson <tomas.mathe...@arm.com>
Date: Fri, 17 May 2024 21:39:17 +0100
Subject: [PATCH 1/2] [AArch64] set AppleA14 architecture version to 8.5

---
 llvm/lib/Target/AArch64/AArch64Processors.td | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/llvm/lib/Target/AArch64/AArch64Processors.td 
b/llvm/lib/Target/AArch64/AArch64Processors.td
index f2286ae17dba5..96422758bc618 100644
--- a/llvm/lib/Target/AArch64/AArch64Processors.td
+++ b/llvm/lib/Target/AArch64/AArch64Processors.td
@@ -718,7 +718,7 @@ def ProcessorFeatures {
   list<SubtargetFeature> AppleA13 = [HasV8_4aOps, FeatureCrypto, 
FeatureFPARMv8,
                                      FeatureNEON, FeaturePerfMon, 
FeatureFullFP16,
                                      FeatureFP16FML, FeatureSHA3];
-  list<SubtargetFeature> AppleA14 = [HasV8_4aOps, FeatureCrypto, 
FeatureFPARMv8,
+  list<SubtargetFeature> AppleA14 = [HasV8_5aOps, FeatureCrypto, 
FeatureFPARMv8,
                                      FeatureNEON, FeaturePerfMon, 
FeatureFRInt3264,
                                      FeatureSpecRestrict, FeatureSSBS, 
FeatureSB,
                                      FeaturePredRes, FeatureCacheDeepPersist,

>From 74f6d426fa67b1f794a8ba2ac7c864830ee9c2b2 Mon Sep 17 00:00:00 2001
From: Tomas Matheson <tomas.mathe...@arm.com>
Date: Mon, 20 May 2024 12:38:52 +0100
Subject: [PATCH 2/2] make m1+a14 v8.4 instead

---
 clang/lib/Basic/Targets/AArch64.cpp                |  4 +++-
 clang/test/Driver/aarch64-mac-cpus.c               |  2 +-
 clang/test/Preprocessor/aarch64-target-features.c  |  8 +++++++-
 .../llvm/TargetParser/AArch64TargetParser.h        |  4 ++--
 llvm/lib/Target/AArch64/AArch64Processors.td       | 14 +++++++++-----
 llvm/test/DebugInfo/debug_frame_symbol.ll          |  2 +-
 .../AddressSanitizer/calls-only-smallfn.ll         |  2 +-
 .../Instrumentation/AddressSanitizer/calls-only.ll |  2 +-
 llvm/unittests/TargetParser/TargetParserTest.cpp   |  8 ++++----
 9 files changed, 29 insertions(+), 17 deletions(-)

diff --git a/clang/lib/Basic/Targets/AArch64.cpp 
b/clang/lib/Basic/Targets/AArch64.cpp
index 5db1ce78c657f..692ec58235efe 100644
--- a/clang/lib/Basic/Targets/AArch64.cpp
+++ b/clang/lib/Basic/Targets/AArch64.cpp
@@ -286,7 +286,6 @@ void AArch64TargetInfo::getTargetDefinesARMV84A(const 
LangOptions &Opts,
 void AArch64TargetInfo::getTargetDefinesARMV85A(const LangOptions &Opts,
                                                 MacroBuilder &Builder) const {
   Builder.defineMacro("__ARM_FEATURE_FRINT", "1");
-  Builder.defineMacro("__ARM_FEATURE_BTI", "1");
   // Also include the Armv8.4 defines
   getTargetDefinesARMV84A(Opts, Builder);
 }
@@ -499,6 +498,9 @@ void AArch64TargetInfo::getTargetDefines(const LangOptions 
&Opts,
   if (HasPAuthLR)
     Builder.defineMacro("__ARM_FEATURE_PAUTH_LR", "1");
 
+  if (HasBTI)
+    Builder.defineMacro("__ARM_FEATURE_BTI", "1");
+
   if (HasUnalignedAccess)
     Builder.defineMacro("__ARM_FEATURE_UNALIGNED", "1");
 
diff --git a/clang/test/Driver/aarch64-mac-cpus.c 
b/clang/test/Driver/aarch64-mac-cpus.c
index 5179731268950..488298cfd2d24 100644
--- a/clang/test/Driver/aarch64-mac-cpus.c
+++ b/clang/test/Driver/aarch64-mac-cpus.c
@@ -16,7 +16,7 @@
 // RUN: %clang --target=arm64-apple-macos -mcpu=apple-m1 -### -c %s 2>&1 | 
FileCheck --check-prefix=EXPLICIT-M1 %s
 
 // CHECK: "-cc1"{{.*}} "-triple" "arm64{{.*}}" "-target-cpu" "apple-m1"
-// CHECK-SAME: "-target-feature" "+v8.5a"
+// CHECK-SAME: "-target-feature" "+v8.4a"
 
 // EXPLICIT-A11: "-cc1"{{.*}} "-triple" "arm64{{.*}}" "-target-cpu" "apple-a11"
 // EXPLICIT-A7: "-cc1"{{.*}} "-triple" "arm64{{.*}}" "-target-cpu" "apple-a7"
diff --git a/clang/test/Preprocessor/aarch64-target-features.c 
b/clang/test/Preprocessor/aarch64-target-features.c
index 82304a15a04a3..3f2c2929c7129 100644
--- a/clang/test/Preprocessor/aarch64-target-features.c
+++ b/clang/test/Preprocessor/aarch64-target-features.c
@@ -335,7 +335,7 @@
 // CHECK-MCPU-CARMEL: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-feature" 
"+v8.2a" "-target-feature" "+aes" "-target-feature" "+crc" "-target-feature" 
"+fp-armv8" "-target-feature" "+fullfp16" "-target-feature" "+lse" 
"-target-feature" "+ras" "-target-feature" "+rdm" "-target-feature" "+sha2" 
"-target-feature" "+neon"
 
 // RUN: %clang -target x86_64-apple-macosx -arch arm64 -### -c %s 2>&1 | 
FileCheck --check-prefix=CHECK-ARCH-ARM64 %s
-// CHECK-ARCH-ARM64: "-target-cpu" "apple-m1" "-target-feature" "+zcm" 
"-target-feature" "+zcz" "-target-feature" "+v8.5a" "-target-feature" "+aes" 
"-target-feature" "+crc" "-target-feature" "+dotprod" "-target-feature" 
"+complxnum" "-target-feature" "+fp-armv8" "-target-feature" "+fullfp16" 
"-target-feature" "+fp16fml" "-target-feature" "+jsconv" "-target-feature" 
"+lse" "-target-feature" "+pauth" "-target-feature" "+ras" "-target-feature" 
"+rcpc" "-target-feature" "+rdm" "-target-feature" "+sha2" "-target-feature" 
"+sha3" "-target-feature" "+neon"
+// CHECK-ARCH-ARM64: "-target-cpu" "apple-m1" "-target-feature" "+zcm" 
"-target-feature" "+zcz" "-target-feature" "+v8.4a" "-target-feature" "+aes" 
"-target-feature" "+crc" "-target-feature" "+dotprod" "-target-feature" 
"+complxnum" "-target-feature" "+fp-armv8" "-target-feature" "+fullfp16" 
"-target-feature" "+fp16fml" "-target-feature" "+jsconv" "-target-feature" 
"+lse" "-target-feature" "+pauth" "-target-feature" "+ras" "-target-feature" 
"+rcpc" "-target-feature" "+rdm" "-target-feature" "+sha2" "-target-feature" 
"+sha3" "-target-feature" "+neon"
 
 // RUN: %clang -target x86_64-apple-macosx -arch arm64_32 -### -c %s 2>&1 | 
FileCheck --check-prefix=CHECK-ARCH-ARM64_32 %s
 // CHECK-ARCH-ARM64_32: "-target-cpu" "apple-s4" "-target-feature" "+zcm" 
"-target-feature" "+zcz" "-target-feature" "+v8.3a" "-target-feature" "+aes" 
"-target-feature" "+crc" "-target-feature" "+complxnum" "-target-feature" 
"+fp-armv8" "-target-feature" "+fullfp16" "-target-feature" "+jsconv" 
"-target-feature" "+lse" "-target-feature" "+pauth" "-target-feature" "+ras" 
"-target-feature" "+rcpc" "-target-feature" "+rdm" "-target-feature" "+sha2" 
"-target-feature" "+neon"
@@ -671,10 +671,16 @@
 // CHECK-V83-OR-LATER: __ARM_FEATURE_JCVT 1
 // CHECK-V83-OR-LATER: __ARM_FEATURE_PAUTH 1
 // CHECK-V81-OR-LATER: __ARM_FEATURE_QRDMX 1
+// CHECK-BEFORE-V85-NOT: __ARM_FEATURE_BTI 1
 // CHECK-BEFORE-V83-NOT: __ARM_FEATURE_COMPLEX 1
 // CHECK-BEFORE-V83-NOT: __ARM_FEATURE_JCVT 1
 // CHECK-BEFORE-V85-NOT: __ARM_FEATURE_FRINT 1
 
+// Apple A14 and M1 are ArmV8.5-a but do not include BTI.
+// RUN: %clang -target aarch64 -mcpu=apple-a14 -x c -E -dM %s -o - | FileCheck 
--check-prefix=APPLE-A14-M1 %s
+// RUN: %clang -target aarch64 -mcpu=apple-m1 -x c -E -dM %s -o - | FileCheck 
--check-prefix=APPLE-A14-M1 %s
+// APPLE-A14-M1-NOT: __ARM_FEATURE_BTI 1
+
 // RUN: %clang --target=aarch64 -march=armv8.2-a+rcpc -x c -E -dM %s -o - | 
FileCheck --check-prefix=CHECK-RCPC %s
 // CHECK-RCPC: __ARM_FEATURE_RCPC 1
 
diff --git a/llvm/include/llvm/TargetParser/AArch64TargetParser.h 
b/llvm/include/llvm/TargetParser/AArch64TargetParser.h
index b3fff3c99025a..7e1669fa51888 100644
--- a/llvm/include/llvm/TargetParser/AArch64TargetParser.h
+++ b/llvm/include/llvm/TargetParser/AArch64TargetParser.h
@@ -527,7 +527,7 @@ inline constexpr CpuInfo CpuInfos[] = {
      AArch64::ExtensionBitset({AArch64::AEK_AES, AArch64::AEK_SHA2,
                                AArch64::AEK_SHA3, AArch64::AEK_FP16,
                                AArch64::AEK_FP16FML})},
-    {"apple-a14", ARMV8_5A,
+    {"apple-a14", ARMV8_4A,
      AArch64::ExtensionBitset({AArch64::AEK_AES, AArch64::AEK_SHA2,
                                AArch64::AEK_SHA3, AArch64::AEK_FP16,
                                AArch64::AEK_FP16FML})},
@@ -544,7 +544,7 @@ inline constexpr CpuInfo CpuInfos[] = {
                                AArch64::AEK_SHA3, AArch64::AEK_FP16,
                                AArch64::AEK_FP16FML})},
 
-    {"apple-m1", ARMV8_5A,
+    {"apple-m1", ARMV8_4A,
      AArch64::ExtensionBitset({AArch64::AEK_AES, AArch64::AEK_SHA2,
                                AArch64::AEK_SHA3, AArch64::AEK_FP16,
                                AArch64::AEK_FP16FML})},
diff --git a/llvm/lib/Target/AArch64/AArch64Processors.td 
b/llvm/lib/Target/AArch64/AArch64Processors.td
index 96422758bc618..174eb3b849ebd 100644
--- a/llvm/lib/Target/AArch64/AArch64Processors.td
+++ b/llvm/lib/Target/AArch64/AArch64Processors.td
@@ -718,12 +718,16 @@ def ProcessorFeatures {
   list<SubtargetFeature> AppleA13 = [HasV8_4aOps, FeatureCrypto, 
FeatureFPARMv8,
                                      FeatureNEON, FeaturePerfMon, 
FeatureFullFP16,
                                      FeatureFP16FML, FeatureSHA3];
-  list<SubtargetFeature> AppleA14 = [HasV8_5aOps, FeatureCrypto, 
FeatureFPARMv8,
-                                     FeatureNEON, FeaturePerfMon, 
FeatureFRInt3264,
-                                     FeatureSpecRestrict, FeatureSSBS, 
FeatureSB,
-                                     FeaturePredRes, FeatureCacheDeepPersist,
+  // Apple A14 and M1 chips are based on Armv8.5-a but without BTI. Since there
+  // is no mechanism for removing dependent features in tablegen, we use 8.4
+  // instead and manually specify all additional 8.5 features.
+  list<SubtargetFeature> AppleA14 = [HasV8_4aOps, FeatureCrypto, 
FeatureFPARMv8,
+                                     FeatureNEON, FeaturePerfMon,
                                      FeatureFullFP16, FeatureFP16FML, 
FeatureSHA3,
-                                     FeatureAltFPCmp];
+                                     // ArmV8.5-a extensions, excluding BTI:
+                                     FeatureAltFPCmp, FeatureFRInt3264,
+                                     FeatureSpecRestrict, FeatureSSBS, 
FeatureSB,
+                                     FeaturePredRes, FeatureCacheDeepPersist];
   list<SubtargetFeature> AppleA15 = [HasV8_6aOps, FeatureCrypto, 
FeatureFPARMv8,
                                      FeatureNEON, FeaturePerfMon, FeatureSHA3,
                                      FeatureFullFP16, FeatureFP16FML];
diff --git a/llvm/test/DebugInfo/debug_frame_symbol.ll 
b/llvm/test/DebugInfo/debug_frame_symbol.ll
index fed080c2f74a8..56ac55e46a825 100644
--- a/llvm/test/DebugInfo/debug_frame_symbol.ll
+++ b/llvm/test/DebugInfo/debug_frame_symbol.ll
@@ -22,7 +22,7 @@ entry:
   ret void, !dbg !12
 }
 
-attributes #0 = { noinline nounwind optnone ssp "frame-pointer"="non-leaf" 
"no-builtins" "no-trapping-math"="true" "stack-protector-buffer-size"="8" 
"target-cpu"="apple-m1" 
"target-features"="+aes,+crc,+dotprod,+fp-armv8,+fp16fml,+fullfp16,+lse,+neon,+ras,+rcpc,+rdm,+sha2,+sha3,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz"
 }
+attributes #0 = { noinline nounwind optnone ssp "frame-pointer"="non-leaf" 
"no-builtins" "no-trapping-math"="true" "stack-protector-buffer-size"="8" 
"target-cpu"="apple-m1" 
"target-features"="+aes,+crc,+dotprod,+fp-armv8,+fp16fml,+fullfp16,+lse,+neon,+ras,+rcpc,+rdm,+sha2,+sha3,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8a,+zcm,+zcz"
 }
 
 !llvm.dbg.cu = !{!0}
 !llvm.module.flags = !{!2, !3, !4, !5, !6}
diff --git a/llvm/test/Instrumentation/AddressSanitizer/calls-only-smallfn.ll 
b/llvm/test/Instrumentation/AddressSanitizer/calls-only-smallfn.ll
index 3d67778049430..64fcfdcc6127e 100644
--- a/llvm/test/Instrumentation/AddressSanitizer/calls-only-smallfn.ll
+++ b/llvm/test/Instrumentation/AddressSanitizer/calls-only-smallfn.ll
@@ -24,5 +24,5 @@ entry:
   store i8 2, ptr %arrayidx1, align 1
   ret void
 }
-attributes #0 = { noinline nounwind optnone sanitize_address ssp uwtable(sync) 
"frame-pointer"="non-leaf" "min-legal-vector-width"="0" 
"no-trapping-math"="true" "stack-protector-buffer-size"="8" 
"target-cpu"="apple-m1" 
"target-features"="+aes,+crc,+crypto,+dotprod,+fp-armv8,+fp16fml,+fullfp16,+lse,+neon,+ras,+rcpc,+rdm,+sha2,+sha3,+sm4,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz"
 }
+attributes #0 = { noinline nounwind optnone sanitize_address ssp uwtable(sync) 
"frame-pointer"="non-leaf" "min-legal-vector-width"="0" 
"no-trapping-math"="true" "stack-protector-buffer-size"="8" 
"target-cpu"="apple-m1" 
"target-features"="+aes,+crc,+crypto,+dotprod,+fp-armv8,+fp16fml,+fullfp16,+lse,+neon,+ras,+rcpc,+rdm,+sha2,+sha3,+sm4,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8a,+zcm,+zcz"
 }
 
diff --git a/llvm/test/Instrumentation/AddressSanitizer/calls-only.ll 
b/llvm/test/Instrumentation/AddressSanitizer/calls-only.ll
index fa491105e017d..90e1ab35d9c36 100644
--- a/llvm/test/Instrumentation/AddressSanitizer/calls-only.ll
+++ b/llvm/test/Instrumentation/AddressSanitizer/calls-only.ll
@@ -51,5 +51,5 @@ entry:
 ; CHECK-NOT:  store i64 -723401728380766731, ptr %126, align 1
   ret void
 }
-attributes #0 = { noinline nounwind optnone sanitize_address ssp uwtable(sync) 
"frame-pointer"="non-leaf" "min-legal-vector-width"="0" 
"no-trapping-math"="true" "stack-protector-buffer-size"="8" 
"target-cpu"="apple-m1" 
"target-features"="+aes,+crc,+crypto,+dotprod,+fp-armv8,+fp16fml,+fullfp16,+lse,+neon,+ras,+rcpc,+rdm,+sha2,+sha3,+sm4,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz"
 }
+attributes #0 = { noinline nounwind optnone sanitize_address ssp uwtable(sync) 
"frame-pointer"="non-leaf" "min-legal-vector-width"="0" 
"no-trapping-math"="true" "stack-protector-buffer-size"="8" 
"target-cpu"="apple-m1" 
"target-features"="+aes,+crc,+crypto,+dotprod,+fp-armv8,+fp16fml,+fullfp16,+lse,+neon,+ras,+rcpc,+rdm,+sha2,+sha3,+sm4,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8a,+zcm,+zcz"
 }
 
diff --git a/llvm/unittests/TargetParser/TargetParserTest.cpp 
b/llvm/unittests/TargetParser/TargetParserTest.cpp
index 0455e061f0bf7..90f9d1d1ca594 100644
--- a/llvm/unittests/TargetParser/TargetParserTest.cpp
+++ b/llvm/unittests/TargetParser/TargetParserTest.cpp
@@ -1529,7 +1529,7 @@ INSTANTIATE_TEST_SUITE_P(
                  AArch64::AEK_FCMA, AArch64::AEK_PAUTH}),
             "8.4-A"),
         ARMCPUTestParams<AArch64::ExtensionBitset>(
-            "apple-a14", "armv8.5-a", "crypto-neon-fp-armv8",
+            "apple-a14", "armv8.4-a", "crypto-neon-fp-armv8",
             AArch64::ExtensionBitset(
                 {AArch64::AEK_CRC, AArch64::AEK_AES, AArch64::AEK_SHA2,
                  AArch64::AEK_SHA3, AArch64::AEK_FP, AArch64::AEK_SIMD,
@@ -1537,7 +1537,7 @@ INSTANTIATE_TEST_SUITE_P(
                  AArch64::AEK_RCPC, AArch64::AEK_DOTPROD, AArch64::AEK_FP16,
                  AArch64::AEK_FP16FML, AArch64::AEK_SHA3, AArch64::AEK_JSCVT,
                  AArch64::AEK_FCMA, AArch64::AEK_PAUTH}),
-            "8.5-A"),
+            "8.4-A"),
         ARMCPUTestParams<AArch64::ExtensionBitset>(
             "apple-a15", "armv8.6-a", "crypto-neon-fp-armv8",
             AArch64::ExtensionBitset(
@@ -1572,7 +1572,7 @@ INSTANTIATE_TEST_SUITE_P(
                  AArch64::AEK_PAUTH}),
             "8.6-A"),
         ARMCPUTestParams<AArch64::ExtensionBitset>(
-            "apple-m1", "armv8.5-a", "crypto-neon-fp-armv8",
+            "apple-m1", "armv8.4-a", "crypto-neon-fp-armv8",
             AArch64::ExtensionBitset(
                 {AArch64::AEK_CRC, AArch64::AEK_AES, AArch64::AEK_SHA2,
                  AArch64::AEK_SHA3, AArch64::AEK_FP, AArch64::AEK_SIMD,
@@ -1580,7 +1580,7 @@ INSTANTIATE_TEST_SUITE_P(
                  AArch64::AEK_RCPC, AArch64::AEK_DOTPROD, AArch64::AEK_FP16,
                  AArch64::AEK_FP16FML, AArch64::AEK_SHA3, AArch64::AEK_JSCVT,
                  AArch64::AEK_FCMA, AArch64::AEK_PAUTH}),
-            "8.5-A"),
+            "8.4-A"),
         ARMCPUTestParams<AArch64::ExtensionBitset>(
             "apple-m2", "armv8.6-a", "crypto-neon-fp-armv8",
             AArch64::ExtensionBitset(

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