Author: jtony Date: Wed Jan 11 14:59:42 2017 New Revision: 291702 URL: http://llvm.org/viewvc/llvm-project?rev=291702&view=rev Log: [PowerPC] Fix the wrong implementation of builtin vec_rlnm.
Modified: cfe/trunk/lib/Headers/altivec.h cfe/trunk/test/CodeGen/builtins-ppc-p9vector.c Modified: cfe/trunk/lib/Headers/altivec.h URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Headers/altivec.h?rev=291702&r1=291701&r2=291702&view=diff ============================================================================== --- cfe/trunk/lib/Headers/altivec.h (original) +++ cfe/trunk/lib/Headers/altivec.h Wed Jan 11 14:59:42 2017 @@ -7664,13 +7664,15 @@ vec_rlmi(vector unsigned long long __a, static __inline__ vector unsigned int __ATTRS_o_ai vec_rlnm(vector unsigned int __a, vector unsigned int __b, vector unsigned int __c) { - return __builtin_altivec_vrlwnm(__a, __b) & __c; + vector unsigned int OneByte = { 0x8, 0x8, 0x8, 0x8 }; + return __builtin_altivec_vrlwnm(__a, ((__c << OneByte) | __b)); } static __inline__ vector unsigned long long __ATTRS_o_ai vec_rlnm(vector unsigned long long __a, vector unsigned long long __b, vector unsigned long long __c) { - return __builtin_altivec_vrldnm(__a, __b) & __c; + vector unsigned long long OneByte = { 0x8, 0x8 }; + return __builtin_altivec_vrldnm(__a, ((__c << OneByte) | __b)); } #endif Modified: cfe/trunk/test/CodeGen/builtins-ppc-p9vector.c URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/builtins-ppc-p9vector.c?rev=291702&r1=291701&r2=291702&view=diff ============================================================================== --- cfe/trunk/test/CodeGen/builtins-ppc-p9vector.c (original) +++ cfe/trunk/test/CodeGen/builtins-ppc-p9vector.c Wed Jan 11 14:59:42 2017 @@ -868,20 +868,24 @@ vector unsigned long long test76(void) { return vec_rlmi(vula, vula, vula); } vector unsigned int test77(void) { +// CHECK-BE: %[[RES1:.+]] = shl <4 x i32 +// CHECK-BE: %[[RES2:.+]] = or <4 x i32> %[[RES1]] // CHECK-BE: @llvm.ppc.altivec.vrlwnm(<4 x i32 -// CHECK-BE: and <4 x i32 // CHECK-BE: ret <4 x i32> +// CHECK: %[[RES1:.+]] = shl <4 x i32 +// CHECK: %[[RES2:.+]] = or <4 x i32> %[[RES1]] // CHECK: @llvm.ppc.altivec.vrlwnm(<4 x i32 -// CHECK: and <4 x i32 // CHECK: ret <4 x i32> return vec_rlnm(vuia, vuia, vuia); } vector unsigned long long test78(void) { +// CHECK-BE: %[[RES1:.+]] = shl <2 x i64 +// CHECK-BE: %[[RES2:.+]] = or <2 x i64> %[[RES1]] // CHECK-BE: @llvm.ppc.altivec.vrldnm(<2 x i64 -// CHECK-BE: and <2 x i64 // CHECK-BE-NEXT: ret <2 x i64> +// CHECK: %[[RES1:.+]] = shl <2 x i64 +// CHECK: %[[RES2:.+]] = or <2 x i64> %[[RES1]] // CHECK: @llvm.ppc.altivec.vrldnm(<2 x i64 -// CHECK: and <2 x i64 // CHECK-NEXT: ret <2 x i64> return vec_rlnm(vula, vula, vula); } _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits