================
@@ -95,6 +99,157 @@ static void initializeAlloca(CodeGenFunction &CGF,
AllocaInst *AI, Value *Size,
I->addAnnotationMetadata("auto-init");
}
+static Value *handleHlslSplitdouble(const CallExpr *E, CodeGenFunction *CGF) {
+ Value *Op0 = CGF->EmitScalarExpr(E->getArg(0));
+ const auto *OutArg1 = dyn_cast<HLSLOutArgExpr>(E->getArg(1));
+ const auto *OutArg2 = dyn_cast<HLSLOutArgExpr>(E->getArg(2));
+
+ CallArgList Args;
+ LValue Op1TmpLValue =
+ CGF->EmitHLSLOutArgExpr(OutArg1, Args, OutArg1->getType());
+ LValue Op2TmpLValue =
+ CGF->EmitHLSLOutArgExpr(OutArg2, Args, OutArg2->getType());
+
+ if (CGF->getTarget().getCXXABI().areArgsDestroyedLeftToRightInCallee())
+ Args.reverseWritebacks();
+
+ auto EmitVectorCode =
+ [](Value *Op, CGBuilderTy *Builder,
+ FixedVectorType *DestTy) -> std::pair<Value *, Value *> {
+ Value *bitcast = Builder->CreateBitCast(Op, DestTy);
+
+ SmallVector<int> LowbitsIndex;
+ SmallVector<int> HighbitsIndex;
+
+ for (unsigned int Idx = 0; Idx < DestTy->getNumElements(); Idx += 2) {
+ LowbitsIndex.push_back(Idx);
+ HighbitsIndex.push_back(Idx + 1);
+ }
+
+ Value *Arg0 = Builder->CreateShuffleVector(bitcast, LowbitsIndex);
+ Value *Arg1 = Builder->CreateShuffleVector(bitcast, HighbitsIndex);
+
+ return std::make_pair(Arg0, Arg1);
+ };
+
+ Value *LastInst = nullptr;
+
+ if (CGF->CGM.getTarget().getTriple().isDXIL()) {
+
+ llvm::Type *RetElementTy = CGF->Int32Ty;
+ if (auto *Op0VecTy = E->getArg(0)->getType()->getAs<clang::VectorType>())
+ RetElementTy = llvm::VectorType::get(
+ CGF->Int32Ty, ElementCount::getFixed(Op0VecTy->getNumElements()));
+ auto *RetTy = llvm::StructType::get(RetElementTy, RetElementTy);
+
+ CallInst *CI = CGF->Builder.CreateIntrinsic(
+ RetTy, Intrinsic::dx_splitdouble, {Op0}, nullptr, "hlsl.splitdouble");
+
+ Value *Arg0 = CGF->Builder.CreateExtractValue(CI, 0);
+ Value *Arg1 = CGF->Builder.CreateExtractValue(CI, 1);
+
+ CGF->Builder.CreateStore(Arg0, Op1TmpLValue.getAddress());
+ LastInst = CGF->Builder.CreateStore(Arg1, Op2TmpLValue.getAddress());
----------------
tex3d wrote:
If `Arg0` and `Arg1` were declared in outer scope, this store code would be
common to all branches, right? Also, I think the names of `Arg0` and `Arg1`
could better indicate the values, like: `LowBits` and `HighBits`.
https://github.com/llvm/llvm-project/pull/109331
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