Author: Jesse Huang Date: 2024-11-08T13:46:27+08:00 New Revision: 3ad640357744890a20494a4943d9a8a94c5b3776
URL: https://github.com/llvm/llvm-project/commit/3ad640357744890a20494a4943d9a8a94c5b3776 DIFF: https://github.com/llvm/llvm-project/commit/3ad640357744890a20494a4943d9a8a94c5b3776.diff LOG: [Clang][RISCV] Remove forced-sw-shadow-stack (#115355) This option was used to override the behavior of `-fsanitize=shadowcallstack` on RISC-V backend, which by default use a hardware implementation if possible, to use the software implementation instead. After #112477 and #112478, now two implementation is represented by independent options and we no longer need it. Added: Modified: clang/docs/ShadowCallStack.rst clang/include/clang/Driver/Options.td clang/test/Driver/riscv-features.c Removed: ################################################################################ diff --git a/clang/docs/ShadowCallStack.rst b/clang/docs/ShadowCallStack.rst index d7ece11b352606..fc8bea83e11452 100644 --- a/clang/docs/ShadowCallStack.rst +++ b/clang/docs/ShadowCallStack.rst @@ -59,11 +59,10 @@ and destruction would need to be intercepted by the application. The instrumentation makes use of the platform register ``x18`` on AArch64, ``x3`` (``gp``) on RISC-V with software shadow stack and ``ssp`` on RISC-V with -hardware shadow stack, which needs `Zicfiss`_ and ``-mno-forced-sw-shadow-stack`` -(default option). Note that with ``Zicfiss``_ the RISC-V backend will default to -the hardware based shadow call stack. Users can force the RISC-V backend to -generate the software shadow call stack with ``Zicfiss``_ by passing -``-mforced-sw-shadow-stack``. +hardware shadow stack, which needs `Zicfiss`_ and ``-fcf-protection=return``. +Users can choose between the software and hardware based shadow stack +implementation on RISC-V backend by passing ``-fsanitize=shadowcallstack`` +or ``Zicfiss`` with ``-fcf-protection=return``. For simplicity we will refer to this as the ``SCSReg``. On some platforms, ``SCSReg`` is reserved, and on others, it is designated as a scratch register. This generally means that any code that may run on the same thread as code diff --git a/clang/include/clang/Driver/Options.td b/clang/include/clang/Driver/Options.td index 805b79491e6ea4..8887e0c1495d2a 100644 --- a/clang/include/clang/Driver/Options.td +++ b/clang/include/clang/Driver/Options.td @@ -4930,10 +4930,6 @@ def msave_restore : Flag<["-"], "msave-restore">, Group<m_riscv_Features_Group>, HelpText<"Enable using library calls for save and restore">; def mno_save_restore : Flag<["-"], "mno-save-restore">, Group<m_riscv_Features_Group>, HelpText<"Disable using library calls for save and restore">; -def mforced_sw_shadow_stack : Flag<["-"], "mforced-sw-shadow-stack">, Group<m_riscv_Features_Group>, - HelpText<"Force using software shadow stack when shadow-stack enabled">; -def mno_forced_sw_shadow_stack : Flag<["-"], "mno-forced-sw-shadow-stack">, Group<m_riscv_Features_Group>, - HelpText<"Not force using software shadow stack when shadow-stack enabled">; } // let Flags = [TargetSpecific] let Flags = [TargetSpecific] in { def menable_experimental_extensions : Flag<["-"], "menable-experimental-extensions">, Group<m_Group>, diff --git a/clang/test/Driver/riscv-features.c b/clang/test/Driver/riscv-features.c index b4fad5177c5f76..b58ec3b523e5c1 100644 --- a/clang/test/Driver/riscv-features.c +++ b/clang/test/Driver/riscv-features.c @@ -29,12 +29,6 @@ // DEFAULT-NOT: "-target-feature" "-save-restore" // DEFAULT-NOT: "-target-feature" "+save-restore" -// RUN: %clang --target=riscv32-unknown-elf -### %s -mforced-sw-shadow-stack 2>&1 | FileCheck %s -check-prefix=FORCE-SW-SCS -// RUN: %clang --target=riscv32-unknown-elf -### %s -mno-forced-sw-shadow-stack 2>&1 | FileCheck %s -check-prefix=NO-FORCE-SW-SCS -// FORCE-SW-SCS: "-target-feature" "+forced-sw-shadow-stack" -// NO-FORCE-SW-SCS: "-target-feature" "-forced-sw-shadow-stack" -// DEFAULT-NOT: "-target-feature" "+forced-sw-shadow-stack" - // RUN: %clang --target=riscv32-unknown-elf -### %s -mno-strict-align 2>&1 | FileCheck %s -check-prefixes=FAST-SCALAR-UNALIGNED-ACCESS,FAST-VECTOR-UNALIGNED-ACCESS // RUN: %clang --target=riscv32-unknown-elf -### %s -mstrict-align 2>&1 | FileCheck %s -check-prefixes=NO-FAST-SCALAR-UNALIGNED-ACCESS,NO-FAST-VECTOR-UNALIGNED-ACCESS // RUN: %clang --target=riscv32-unknown-elf -### %s -mno-scalar-strict-align 2>&1 | FileCheck %s -check-prefix=FAST-SCALAR-UNALIGNED-ACCESS _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
