Author: SpencerAbson
Date: 2024-11-08T15:07:05Z
New Revision: da9499ebfb323602c42aeb674571fe89cec20ca6

URL: 
https://github.com/llvm/llvm-project/commit/da9499ebfb323602c42aeb674571fe89cec20ca6
DIFF: 
https://github.com/llvm/llvm-project/commit/da9499ebfb323602c42aeb674571fe89cec20ca6.diff

LOG: [AArch64] Reduce +sve2-aes to an alias of +sve-aes+sve2 (#114293)

This patch introduces the amended feature flag for
[FEAT_SVE_AES](https://developer.arm.com/documentation/109697/2024_09/Feature-descriptions/The-Armv9-0-architecture-extension?lang=en#md457-the-armv90-architecture-extension__feat_FEAT_SVE_AES),
'**sve-aes**'. The existing flag associated with this feature,
'sve2-aes' must be retained as an alias of 'sve-aes' and 'sve2' for
backwards compatibility.

The
[ACLE](https://github.com/ARM-software/acle/blob/main/main/acle.md#aes-extension)
documents `__ARM_FEATURE_SVE2_AES`, which was previously defined to 1
when

> there is hardware support for the SVE2 AES (FEAT_SVE_AES) instructions
and if the associated ACLE intrinsics are available.

The front-end has been amended such that it is compatible with +sve2-aes
and +sve2+sve-aes.

Added: 
    

Modified: 
    clang/include/clang/Basic/arm_sve.td
    clang/lib/Basic/Targets/AArch64.cpp
    clang/lib/Basic/Targets/AArch64.h
    clang/test/CodeGen/aarch64-fmv-dependencies.c
    clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_aesd.c
    clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_aese.c
    clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_aesimc.c
    clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_aesmc.c
    clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_pmullb_128.c
    clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_pmullt_128.c
    clang/test/Driver/aarch64-implied-sve-features.c
    clang/test/Driver/print-supported-extensions-aarch64.c
    clang/test/Preprocessor/aarch64-target-features.c
    clang/test/Sema/aarch64-sve2-intrinsics/acle_sve2_aes_bitperm_sha3_sm4.cpp
    lldb/test/Shell/Commands/command-disassemble-aarch64-extensions.s
    llvm/lib/Target/AArch64/AArch64.td
    llvm/lib/Target/AArch64/AArch64FMV.td
    llvm/lib/Target/AArch64/AArch64Features.td
    llvm/lib/Target/AArch64/AArch64InstrInfo.td
    llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
    llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
    llvm/test/CodeGen/AArch64/sve2-intrinsics-crypto.ll
    llvm/test/MC/AArch64/SVE2/aesd.s
    llvm/test/MC/AArch64/SVE2/aese.s
    llvm/test/MC/AArch64/SVE2/aesimc.s
    llvm/test/MC/AArch64/SVE2/aesmc.s
    llvm/test/MC/AArch64/SVE2/directive-arch-negative.s
    llvm/test/MC/AArch64/SVE2/directive-arch.s
    llvm/test/MC/AArch64/SVE2/directive-arch_extension-negative.s
    llvm/test/MC/AArch64/SVE2/directive-arch_extension.s
    llvm/test/MC/AArch64/SVE2/directive-cpu-negative.s
    llvm/test/MC/AArch64/SVE2/directive-cpu.s
    llvm/test/MC/AArch64/SVE2/pmullb-128.s
    llvm/test/MC/AArch64/SVE2/pmullt-128.s
    llvm/unittests/TargetParser/TargetParserTest.cpp

Removed: 
    


################################################################################
diff  --git a/clang/include/clang/Basic/arm_sve.td 
b/clang/include/clang/Basic/arm_sve.td
index 90b1ec242e6bae..b4bc4b7f61c347 100644
--- a/clang/include/clang/Basic/arm_sve.td
+++ b/clang/include/clang/Basic/arm_sve.td
@@ -1962,7 +1962,7 @@ let SVETargetGuard = "sve2,lut,bf16", SMETargetGuard = 
"sme2,lut,bf16" in {
 
////////////////////////////////////////////////////////////////////////////////
 // SVE2 - Optional
 
-let SVETargetGuard = "sve2-aes", SMETargetGuard = InvalidMode in {
+let SVETargetGuard = "sve2,sve-aes", SMETargetGuard = InvalidMode in {
 def SVAESD   : SInst<"svaesd[_{d}]",   "ddd", "Uc", MergeNone, 
"aarch64_sve_aesd", [IsOverloadNone]>;
 def SVAESIMC : SInst<"svaesimc[_{d}]", "dd",  "Uc", MergeNone, 
"aarch64_sve_aesimc", [IsOverloadNone]>;
 def SVAESE   : SInst<"svaese[_{d}]",   "ddd", "Uc", MergeNone, 
"aarch64_sve_aese", [IsOverloadNone]>;

diff  --git a/clang/lib/Basic/Targets/AArch64.cpp 
b/clang/lib/Basic/Targets/AArch64.cpp
index e35ee2b7b9c385..3fd43373cab445 100644
--- a/clang/lib/Basic/Targets/AArch64.cpp
+++ b/clang/lib/Basic/Targets/AArch64.cpp
@@ -473,7 +473,7 @@ void AArch64TargetInfo::getTargetDefines(const LangOptions 
&Opts,
   if (HasSVE2p1)
     Builder.defineMacro("__ARM_FEATURE_SVE2p1", "1");
 
-  if (HasSVE2 && HasSVE2AES)
+  if (HasSVE2 && HasSVEAES)
     Builder.defineMacro("__ARM_FEATURE_SVE2_AES", "1");
 
   if (HasSVE2 && HasSVE2BitPerm)
@@ -769,7 +769,7 @@ bool AArch64TargetInfo::hasFeature(StringRef Feature) const 
{
       .Case("f32mm", FPU & SveMode && HasMatmulFP32)
       .Case("f64mm", FPU & SveMode && HasMatmulFP64)
       .Case("sve2", FPU & SveMode && HasSVE2)
-      .Case("sve2-pmull128", FPU & SveMode && HasSVE2AES)
+      .Case("sve2-pmull128", FPU & SveMode && HasSVEAES && HasSVE2)
       .Case("sve2-bitperm", FPU & SveMode && HasSVE2BitPerm)
       .Case("sve2-sha3", FPU & SveMode && HasSVE2SHA3)
       .Case("sve2-sm4", FPU & SveMode && HasSVE2SM4)
@@ -861,12 +861,10 @@ bool 
AArch64TargetInfo::handleTargetFeatures(std::vector<std::string> &Features,
       HasSVE2 = true;
       HasSVE2p1 = true;
     }
-    if (Feature == "+sve2-aes") {
+    if (Feature == "+sve-aes") {
       FPU |= NeonMode;
-      FPU |= SveMode;
-      HasFullFP16 = true;
-      HasSVE2 = true;
-      HasSVE2AES = true;
+      HasAES = true;
+      HasSVEAES = true;
     }
     if (Feature == "+sve2-sha3") {
       FPU |= NeonMode;

diff  --git a/clang/lib/Basic/Targets/AArch64.h 
b/clang/lib/Basic/Targets/AArch64.h
index ea3e4015d84265..4c25bdb5bb16df 100644
--- a/clang/lib/Basic/Targets/AArch64.h
+++ b/clang/lib/Basic/Targets/AArch64.h
@@ -78,7 +78,7 @@ class LLVM_LIBRARY_VISIBILITY AArch64TargetInfo : public 
TargetInfo {
   bool HasBFloat16 = false;
   bool HasSVE2 = false;
   bool HasSVE2p1 = false;
-  bool HasSVE2AES = false;
+  bool HasSVEAES = false;
   bool HasSVE2SHA3 = false;
   bool HasSVE2SM4 = false;
   bool HasSVEB16B16 = false;

diff  --git a/clang/test/CodeGen/aarch64-fmv-dependencies.c 
b/clang/test/CodeGen/aarch64-fmv-dependencies.c
index 137f64d7c9c32c..e1105f35282b7a 100644
--- a/clang/test/CodeGen/aarch64-fmv-dependencies.c
+++ b/clang/test/CodeGen/aarch64-fmv-dependencies.c
@@ -189,7 +189,7 @@ int caller() {
 // CHECK: attributes #[[ssbs]] = { {{.*}} 
"target-features"="+fp-armv8,+neon,+outline-atomics,+ssbs,+v8a"
 // CHECK: attributes #[[sve]] = { {{.*}} 
"target-features"="+fp-armv8,+fullfp16,+neon,+outline-atomics,+sve,+v8a"
 // CHECK: attributes #[[sve2]] = { {{.*}} 
"target-features"="+fp-armv8,+fullfp16,+neon,+outline-atomics,+sve,+sve2,+v8a"
-// CHECK: attributes #[[sve2_aes]] = { {{.*}} 
"target-features"="+aes,+fp-armv8,+fullfp16,+neon,+outline-atomics,+sve,+sve2,+sve2-aes,+v8a"
+// CHECK: attributes #[[sve2_aes]] = { {{.*}} 
"target-features"="+aes,+fp-armv8,+fullfp16,+neon,+outline-atomics,+sve,+sve-aes,+sve2,+v8a"
 // CHECK: attributes #[[sve2_bitperm]] = { {{.*}} 
"target-features"="+fp-armv8,+fullfp16,+neon,+outline-atomics,+sve,+sve2,+sve2-bitperm,+v8a"
 // CHECK: attributes #[[sve2_sha3]] = { {{.*}} 
"target-features"="+fp-armv8,+fullfp16,+neon,+outline-atomics,+sve,+sve2,+sve2-sha3,+v8a"
 // CHECK: attributes #[[sve2_sm4]] = { {{.*}} 
"target-features"="+fp-armv8,+fullfp16,+neon,+outline-atomics,+sve,+sve2,+sve2-sm4,+v8a"

diff  --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_aesd.c 
b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_aesd.c
index 5ea27aa3b768c5..0839b32fecb78e 100644
--- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_aesd.c
+++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_aesd.c
@@ -1,8 +1,8 @@
 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
-// RUN: %clang_cc1 -fclang-abi-compat=latest -triple aarch64 -target-feature 
+sve -target-feature +sve2 -target-feature +sve2-aes -O1 -Werror -Wall 
-emit-llvm -o - %s | FileCheck %s
-// RUN: %clang_cc1 -fclang-abi-compat=latest -triple aarch64 -target-feature 
+sve -target-feature +sve2 -target-feature +sve2-aes -O1 -Werror -Wall 
-emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK
-// RUN: %clang_cc1 -fclang-abi-compat=latest -DSVE_OVERLOADED_FORMS -triple 
aarch64 -target-feature +sve -target-feature +sve2 -target-feature +sve2-aes 
-O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
-// RUN: %clang_cc1 -fclang-abi-compat=latest -DSVE_OVERLOADED_FORMS -triple 
aarch64 -target-feature +sve -target-feature +sve2 -target-feature +sve2-aes 
-O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s 
-check-prefix=CPP-CHECK
+// RUN: %clang_cc1 -fclang-abi-compat=latest -triple aarch64 -target-feature 
+sve -target-feature +sve2 -target-feature +sve-aes -O1 -Werror -Wall 
-emit-llvm -o - %s | FileCheck %s
+// RUN: %clang_cc1 -fclang-abi-compat=latest -triple aarch64 -target-feature 
+sve -target-feature +sve2 -target-feature +sve-aes -O1 -Werror -Wall 
-emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK
+// RUN: %clang_cc1 -fclang-abi-compat=latest -DSVE_OVERLOADED_FORMS -triple 
aarch64 -target-feature +sve -target-feature +sve2 -target-feature +sve-aes -O1 
-Werror -Wall -emit-llvm -o - %s | FileCheck %s
+// RUN: %clang_cc1 -fclang-abi-compat=latest -DSVE_OVERLOADED_FORMS -triple 
aarch64 -target-feature +sve -target-feature +sve2 -target-feature +sve-aes -O1 
-Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK
 
 // REQUIRES: aarch64-registered-target
 

diff  --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_aese.c 
b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_aese.c
index 9442d14de83633..08ca748c96fe76 100644
--- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_aese.c
+++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_aese.c
@@ -1,8 +1,8 @@
 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
-// RUN: %clang_cc1 -fclang-abi-compat=latest -triple aarch64 -target-feature 
+sve -target-feature +sve2 -target-feature +sve2-aes -O1 -Werror -Wall 
-emit-llvm -o - %s | FileCheck %s
-// RUN: %clang_cc1 -fclang-abi-compat=latest -triple aarch64 -target-feature 
+sve -target-feature +sve2 -target-feature +sve2-aes -O1 -Werror -Wall 
-emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK
-// RUN: %clang_cc1 -fclang-abi-compat=latest -DSVE_OVERLOADED_FORMS -triple 
aarch64 -target-feature +sve -target-feature +sve2 -target-feature +sve2-aes 
-O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
-// RUN: %clang_cc1 -fclang-abi-compat=latest -DSVE_OVERLOADED_FORMS -triple 
aarch64 -target-feature +sve -target-feature +sve2 -target-feature +sve2-aes 
-O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s 
-check-prefix=CPP-CHECK
+// RUN: %clang_cc1 -fclang-abi-compat=latest -triple aarch64 -target-feature 
+sve -target-feature +sve2 -target-feature +sve-aes -O1 -Werror -Wall 
-emit-llvm -o - %s | FileCheck %s
+// RUN: %clang_cc1 -fclang-abi-compat=latest -triple aarch64 -target-feature 
+sve -target-feature +sve2 -target-feature +sve-aes -O1 -Werror -Wall 
-emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK
+// RUN: %clang_cc1 -fclang-abi-compat=latest -DSVE_OVERLOADED_FORMS -triple 
aarch64 -target-feature +sve -target-feature +sve2 -target-feature +sve-aes -O1 
-Werror -Wall -emit-llvm -o - %s | FileCheck %s
+// RUN: %clang_cc1 -fclang-abi-compat=latest -DSVE_OVERLOADED_FORMS -triple 
aarch64 -target-feature +sve -target-feature +sve2 -target-feature +sve-aes -O1 
-Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK
 
 // REQUIRES: aarch64-registered-target
 

diff  --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_aesimc.c 
b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_aesimc.c
index 23f838c5bb30ec..78d3debad4b34a 100644
--- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_aesimc.c
+++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_aesimc.c
@@ -1,8 +1,8 @@
 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
-// RUN: %clang_cc1 -triple aarch64 -target-feature +sve -target-feature +sve2 
-target-feature +sve2-aes -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
-// RUN: %clang_cc1 -triple aarch64 -target-feature +sve -target-feature +sve2 
-target-feature +sve2-aes -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | 
FileCheck %s -check-prefix=CPP-CHECK
-// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64 -target-feature +sve 
-target-feature +sve2 -target-feature +sve2-aes -O1 -Werror -Wall -emit-llvm -o 
- %s | FileCheck %s
-// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64 -target-feature +sve 
-target-feature +sve2 -target-feature +sve2-aes -O1 -Werror -Wall -emit-llvm -o 
- -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK
+// RUN: %clang_cc1 -triple aarch64 -target-feature +sve -target-feature +sve2 
-target-feature +sve-aes -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
+// RUN: %clang_cc1 -triple aarch64 -target-feature +sve -target-feature +sve2 
-target-feature +sve-aes -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | 
FileCheck %s -check-prefix=CPP-CHECK
+// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64 -target-feature +sve 
-target-feature +sve2 -target-feature +sve-aes -O1 -Werror -Wall -emit-llvm -o 
- %s | FileCheck %s
+// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64 -target-feature +sve 
-target-feature +sve2 -target-feature +sve-aes -O1 -Werror -Wall -emit-llvm -o 
- -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK
 
 // REQUIRES: aarch64-registered-target
 

diff  --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_aesmc.c 
b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_aesmc.c
index 575c09c325f78f..48d130174788ac 100644
--- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_aesmc.c
+++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_aesmc.c
@@ -1,8 +1,8 @@
 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
-// RUN: %clang_cc1 -triple aarch64 -target-feature +sve -target-feature +sve2 
-target-feature +sve2-aes -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
-// RUN: %clang_cc1 -triple aarch64 -target-feature +sve -target-feature +sve2 
-target-feature +sve2-aes -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | 
FileCheck %s -check-prefix=CPP-CHECK
-// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64 -target-feature +sve 
-target-feature +sve2 -target-feature +sve2-aes -O1 -Werror -Wall -emit-llvm -o 
- %s | FileCheck %s
-// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64 -target-feature +sve 
-target-feature +sve2 -target-feature +sve2-aes -O1 -Werror -Wall -emit-llvm -o 
- -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK
+// RUN: %clang_cc1 -triple aarch64 -target-feature +sve -target-feature +sve2 
-target-feature +sve-aes -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
+// RUN: %clang_cc1 -triple aarch64 -target-feature +sve -target-feature +sve2 
-target-feature +sve-aes -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | 
FileCheck %s -check-prefix=CPP-CHECK
+// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64 -target-feature +sve 
-target-feature +sve2 -target-feature +sve-aes -O1 -Werror -Wall -emit-llvm -o 
- %s | FileCheck %s
+// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64 -target-feature +sve 
-target-feature +sve2 -target-feature +sve-aes -O1 -Werror -Wall -emit-llvm -o 
- -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK
 
 // REQUIRES: aarch64-registered-target
 

diff  --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_pmullb_128.c 
b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_pmullb_128.c
index a4935d8dadd542..09583f98393a35 100644
--- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_pmullb_128.c
+++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_pmullb_128.c
@@ -1,10 +1,10 @@
 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
 // REQUIRES: aarch64-registered-target
 
-// RUN: %clang_cc1 -fclang-abi-compat=latest -triple aarch64 -target-feature 
+sve -target-feature +sve2 -target-feature +sve2-aes -O1 -Werror -Wall 
-emit-llvm -o - %s | FileCheck %s
-// RUN: %clang_cc1 -fclang-abi-compat=latest -triple aarch64 -target-feature 
+sve -target-feature +sve2 -target-feature +sve2-aes -O1 -Werror -Wall 
-emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK
-// RUN: %clang_cc1 -fclang-abi-compat=latest -DSVE_OVERLOADED_FORMS -triple 
aarch64 -target-feature +sve -target-feature +sve2 -target-feature +sve2-aes 
-O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
-// RUN: %clang_cc1 -fclang-abi-compat=latest -DSVE_OVERLOADED_FORMS -triple 
aarch64 -target-feature +sve -target-feature +sve2 -target-feature +sve2-aes 
-O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s 
-check-prefix=CPP-CHECK
+// RUN: %clang_cc1 -fclang-abi-compat=latest -triple aarch64 -target-feature 
+sve -target-feature +sve2 -target-feature +sve-aes -O1 -Werror -Wall 
-emit-llvm -o - %s | FileCheck %s
+// RUN: %clang_cc1 -fclang-abi-compat=latest -triple aarch64 -target-feature 
+sve -target-feature +sve2 -target-feature +sve-aes -O1 -Werror -Wall 
-emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK
+// RUN: %clang_cc1 -fclang-abi-compat=latest -DSVE_OVERLOADED_FORMS -triple 
aarch64 -target-feature +sve -target-feature +sve2 -target-feature +sve-aes -O1 
-Werror -Wall -emit-llvm -o - %s | FileCheck %s
+// RUN: %clang_cc1 -fclang-abi-compat=latest -DSVE_OVERLOADED_FORMS -triple 
aarch64 -target-feature +sve -target-feature +sve2 -target-feature +sve-aes -O1 
-Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK
 
 #include <arm_sve.h>
 

diff  --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_pmullt_128.c 
b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_pmullt_128.c
index a712a4f847f427..a4ffc3165ec8b1 100644
--- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_pmullt_128.c
+++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_pmullt_128.c
@@ -1,10 +1,10 @@
 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
 // REQUIRES: aarch64-registered-target
 
-// RUN: %clang_cc1 -fclang-abi-compat=latest -triple aarch64 -target-feature 
+sve -target-feature +sve2 -target-feature +sve2-aes -O1 -Werror -Wall 
-emit-llvm -o - %s | FileCheck %s
-// RUN: %clang_cc1 -fclang-abi-compat=latest -triple aarch64 -target-feature 
+sve -target-feature +sve2 -target-feature +sve2-aes -O1 -Werror -Wall 
-emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK
-// RUN: %clang_cc1 -fclang-abi-compat=latest -DSVE_OVERLOADED_FORMS -triple 
aarch64 -target-feature +sve -target-feature +sve2 -target-feature +sve2-aes 
-O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
-// RUN: %clang_cc1 -fclang-abi-compat=latest -DSVE_OVERLOADED_FORMS -triple 
aarch64 -target-feature +sve -target-feature +sve2 -target-feature +sve2-aes 
-O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s 
-check-prefix=CPP-CHECK
+// RUN: %clang_cc1 -fclang-abi-compat=latest -triple aarch64 -target-feature 
+sve -target-feature +sve2 -target-feature +sve-aes -O1 -Werror -Wall 
-emit-llvm -o - %s | FileCheck %s
+// RUN: %clang_cc1 -fclang-abi-compat=latest -triple aarch64 -target-feature 
+sve -target-feature +sve2 -target-feature +sve-aes -O1 -Werror -Wall 
-emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK
+// RUN: %clang_cc1 -fclang-abi-compat=latest -DSVE_OVERLOADED_FORMS -triple 
aarch64 -target-feature +sve -target-feature +sve2 -target-feature +sve-aes -O1 
-Werror -Wall -emit-llvm -o - %s | FileCheck %s
+// RUN: %clang_cc1 -fclang-abi-compat=latest -DSVE_OVERLOADED_FORMS -triple 
aarch64 -target-feature +sve -target-feature +sve2 -target-feature +sve-aes -O1 
-Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK
 
 #include <arm_sve.h>
 

diff  --git a/clang/test/Driver/aarch64-implied-sve-features.c 
b/clang/test/Driver/aarch64-implied-sve-features.c
index f04e1a785673b8..2bb0ee88330ba9 100644
--- a/clang/test/Driver/aarch64-implied-sve-features.c
+++ b/clang/test/Driver/aarch64-implied-sve-features.c
@@ -36,7 +36,7 @@
 // SVE2-BITPERM-REVERT: "-target-feature" "+sve" "-target-feature" "+sve2" 
"-target-feature" "-sve2-bitperm"
 
 // RUN: %clang --target=aarch64-linux-gnu -march=armv8-a+sve2-aes+nosve2-aes 
%s -### 2>&1 | FileCheck %s --check-prefix=SVE2-AES-REVERT
-// SVE2-AES-REVERT: "-target-feature" "+sve" "-target-feature" "+sve2" 
"-target-feature" "-sve2-aes"
+// SVE2-AES-REVERT: "-target-feature" "+sve" "-target-feature" "+sve-aes" 
"-target-feature" "+sve2" "-target-feature" "-sve2-aes"
 
 // RUN: %clang --target=aarch64-linux-gnu -march=armv8-a+sve2-sha3+nosve2-sha3 
%s -### 2>&1 | FileCheck %s --check-prefix=SVE2-SHA3-REVERT
 // SVE2-SHA3-REVERT: "-target-feature" "+sve" "-target-feature" "+sve2" 
"-target-feature" "-sve2-sha3"
@@ -47,8 +47,11 @@
 // RUN: %clang --target=aarch64-linux-gnu -march=armv8-a+sve2-sha3 %s -### 
2>&1 | FileCheck %s --check-prefix=SVE2-SHA3
 // SVE2-SHA3: "-target-feature" "+sve" "-target-feature" "+sve2" 
"-target-feature" "+sve2-sha3"
 
+// RUN: %clang --target=aarch64-linux-gnu -march=armv8-a+sve-aes %s -### 2>&1 
| FileCheck %s --check-prefix=SVE-AES
+// SVE-AES: "-target-feature" "+aes"{{.*}} "-target-feature" "+sve-aes"
+
 // RUN: %clang --target=aarch64-linux-gnu -march=armv8-a+sve2-aes %s -### 2>&1 
| FileCheck %s --check-prefix=SVE2-AES
-// SVE2-AES: "-target-feature" "+sve" "-target-feature" "+sve2" 
"-target-feature" "+sve2-aes"
+// SVE2-AES: "-target-feature" "+sve" "-target-feature" "+sve-aes" 
"-target-feature" "+sve2" "-target-feature" "+sve2-aes"
 
 // RUN: %clang --target=aarch64-linux-gnu -march=armv8-a+sve2-sm4 %s -### 2>&1 
| FileCheck %s --check-prefix=SVE2-SM4
 // SVE2-SM4: "-target-feature" "+sve" "-target-feature" "+sve2" 
"-target-feature" "+sve2-sm4"
@@ -66,7 +69,7 @@
 // SVE-SUBFEATURE-CONFLICT-NOT: "-target-feature" "+sve"
 
 // RUN: %clang --target=aarch64-linux-gnu -march=armv8-a+nosve+sve2-aes %s 
-### 2>&1 | FileCheck %s --check-prefix=SVE-SUBFEATURE-CONFLICT-REV
-// SVE-SUBFEATURE-CONFLICT-REV: "-target-feature" "+sve" "-target-feature" 
"+sve2" "-target-feature" "+sve2-aes"
+// SVE-SUBFEATURE-CONFLICT-REV: "-target-feature" "+sve" "-target-feature" 
"+sve-aes" "-target-feature" "+sve2" "-target-feature" "+sve2-aes"
 
 // RUN: %clang --target=aarch64-linux-gnu -mcpu=neoverse-n2+nosve2 %s -### 
2>&1 | FileCheck %s --check-prefix=SVE-MCPU-FEATURES
 // SVE-MCPU-FEATURES-NOT: "-target-feature" "+sve2-bitperm"

diff  --git a/clang/test/Driver/print-supported-extensions-aarch64.c 
b/clang/test/Driver/print-supported-extensions-aarch64.c
index 03eacf99736f9e..0396718b3ec704 100644
--- a/clang/test/Driver/print-supported-extensions-aarch64.c
+++ b/clang/test/Driver/print-supported-extensions-aarch64.c
@@ -77,17 +77,18 @@
 // CHECK-NEXT:     profile             FEAT_SPE                                
               Enable Statistical Profiling extension
 // CHECK-NEXT:     predres2            FEAT_SPECRES2                           
               Enable Speculation Restriction Instruction
 // CHECK-NEXT:     ssbs                FEAT_SSBS, FEAT_SSBS2                   
               Enable Speculative Store Bypass Safe bit
-// CHECK-NEXT:     ssve-aes            FEAT_SSVE_AES                           
               Enable Armv9.6-A SVE2 AES support in streaming SVE mode
+// CHECK-NEXT:     ssve-aes            FEAT_SSVE_AES                           
               Enable Armv9.6-A SVE AES support in streaming SVE mode
 // CHECK-NEXT:     ssve-fp8dot2        FEAT_SSVE_FP8DOT2                       
               Enable SVE2 FP8 2-way dot product instructions
 // CHECK-NEXT:     ssve-fp8dot4        FEAT_SSVE_FP8DOT4                       
               Enable SVE2 FP8 4-way dot product instructions
 // CHECK-NEXT:     ssve-fp8fma         FEAT_SSVE_FP8FMA                        
               Enable SVE2 FP8 multiply-add instructions
 // CHECK-NEXT:     sve                 FEAT_SVE                                
               Enable Scalable Vector Extension (SVE) instructions
-// CHECK-NEXT:     sve-aes2            FEAT_SVE_AES2                           
               Enable Armv9.6-A SVE multi-vector AES and 128-bit PMULL 
instructions
+// CHECK-NEXT:     sve-aes             FEAT_SVE_AES, FEAT_SVE_PMULL128         
               Enable SVE AES and quadword SVE polynomial multiply instructions
+// CHECK-NEXT:     sve-aes2            FEAT_SVE_AES2                           
               Enable Armv9.6-A SVE multi-vector AES and multi-vector quadword 
polynomial multiply instructions
 // CHECK-NEXT:     sve-b16b16          FEAT_SVE_B16B16                         
               Enable SVE2 non-widening and SME2 Z-targeting non-widening 
BFloat16 instructions
 // CHECK-NEXT:     sve-bfscale         FEAT_SVE_BFSCALE                        
               Enable Armv9.6-A SVE BFloat16 scaling instructions
 // CHECK-NEXT:     sve-f16f32mm        FEAT_SVE_F16F32MM                       
               Enable Armv9.6-A FP16 to FP32 Matrix Multiply
 // CHECK-NEXT:     sve2                FEAT_SVE2                               
               Enable Scalable Vector Extension 2 (SVE2) instructions
-// CHECK-NEXT:     sve2-aes            FEAT_SVE_AES, FEAT_SVE_PMULL128         
               Enable AES SVE2 instructions
+// CHECK-NEXT:     sve2-aes                                                    
               An alias of +sve2+sve-aes
 // CHECK-NEXT:     sve2-bitperm        FEAT_SVE_BitPerm                        
               Enable bit permutation SVE2 instructions
 // CHECK-NEXT:     sve2-sha3           FEAT_SVE_SHA3                           
               Enable SHA3 SVE2 instructions
 // CHECK-NEXT:     sve2-sm4            FEAT_SVE_SM4                            
               Enable SM4 SVE2 instructions

diff  --git a/clang/test/Preprocessor/aarch64-target-features.c 
b/clang/test/Preprocessor/aarch64-target-features.c
index 418430b0b19b89..fc786f4b2e9b4d 100644
--- a/clang/test/Preprocessor/aarch64-target-features.c
+++ b/clang/test/Preprocessor/aarch64-target-features.c
@@ -227,8 +227,20 @@
 // CHECK-NONEON-NOT: __ARM_FEATURE_SVE 1
 // CHECK-NONEON-NOT: __ARM_NEON 1
 
+// RUN: %clang -target aarch64-none-linux-gnu -march=armv9-a+sve-aes -x c -E 
-dM %s -o - | FileCheck --check-prefix=CHECK-SVEAES %s
+// CHECK-SVEAES: __ARM_FEATURE_AES 1
+
 // RUN: %clang -target aarch64-none-linux-gnu -march=armv9-a+sve2-aes -x c -E 
-dM %s -o - | FileCheck --check-prefix=CHECK-SVE2AES %s
+// CHECK-SVE2AES: __ARM_FEATURE_AES 1
+// CHECK-SVE2AES: __ARM_FEATURE_SVE2 1
 // CHECK-SVE2AES: __ARM_FEATURE_SVE2_AES 1
+
+// RUN: %clang -target aarch64-none-linux-gnu -march=armv9-a+sve-aes+sve2 -x c 
-E -dM %s -o - | FileCheck --check-prefix=CHECK-SVEAES-SVE2 %s
+// CHECK-SVEAES-SVE2: __ARM_FEATURE_AES 1
+// CHECK-SVEAES-SVE2: __ARM_FEATURE_SVE2 1
+// CHECK-SVEAES-SVE2: __ARM_FEATURE_SVE2_AES 1
+
+
 // RUN: %clang -target aarch64-none-linux-gnu -march=armv9-a+sve2-sha3 -x c -E 
-dM %s -o - | FileCheck --check-prefix=CHECK-SVE2SHA3 %s
 // CHECK-SVE2SHA3: __ARM_FEATURE_SVE2_SHA3 1
 // RUN: %clang -target aarch64-none-linux-gnu -march=armv9-a+sve2-sm4 -x c -E 
-dM %s -o - | FileCheck --check-prefix=CHECK-SVE2SM4 %s

diff  --git 
a/clang/test/Sema/aarch64-sve2-intrinsics/acle_sve2_aes_bitperm_sha3_sm4.cpp 
b/clang/test/Sema/aarch64-sve2-intrinsics/acle_sve2_aes_bitperm_sha3_sm4.cpp
index 795bb760533034..93d4b007016937 100644
--- a/clang/test/Sema/aarch64-sve2-intrinsics/acle_sve2_aes_bitperm_sha3_sm4.cpp
+++ b/clang/test/Sema/aarch64-sve2-intrinsics/acle_sve2_aes_bitperm_sha3_sm4.cpp
@@ -14,17 +14,17 @@
 
 void test(uint8_t u8, uint16_t u16, uint32_t u32, uint64_t u64)
 {
-  // expected-error@+2 {{'svaesd_u8' needs target feature sve,sve2-aes}}
-  // overload-error@+1 {{'svaesd' needs target feature sve,sve2-aes}}
+  // expected-error@+2 {{'svaesd_u8' needs target feature sve,sve2,sve-aes}}
+  // overload-error@+1 {{'svaesd' needs target feature sve,sve2,sve-aes}}
   SVE_ACLE_FUNC(svaesd,_u8,,)(svundef_u8(), svundef_u8());
-  // expected-error@+2 {{'svaese_u8' needs target feature sve,sve2-aes}}
-  // overload-error@+1 {{'svaese' needs target feature sve,sve2-aes}}
+  // expected-error@+2 {{'svaese_u8' needs target feature sve,sve2,sve-aes}}
+  // overload-error@+1 {{'svaese' needs target feature sve,sve2,sve-aes}}
   SVE_ACLE_FUNC(svaese,_u8,,)(svundef_u8(), svundef_u8());
-  // expected-error@+2 {{'svaesimc_u8' needs target feature sve,sve2-aes}}
-  // overload-error@+1 {{'svaesimc' needs target feature sve,sve2-aes}}
+  // expected-error@+2 {{'svaesimc_u8' needs target feature sve,sve2,sve-aes}}
+  // overload-error@+1 {{'svaesimc' needs target feature sve,sve2,sve-aes}}
   SVE_ACLE_FUNC(svaesimc,_u8,,)(svundef_u8());
-  // expected-error@+2 {{'svaesmc_u8' needs target feature sve,sve2-aes}}
-  // overload-error@+1 {{'svaesmc' needs target feature sve,sve2-aes}}
+  // expected-error@+2 {{'svaesmc_u8' needs target feature sve,sve2,sve-aes}}
+  // overload-error@+1 {{'svaesmc' needs target feature sve,sve2,sve-aes}}
   SVE_ACLE_FUNC(svaesmc,_u8,,)(svundef_u8());
   // expected-error@+2 {{'svbdep_u8' needs target feature sve,sve2-bitperm}}
   // overload-error@+1 {{'svbdep' needs target feature sve,sve2-bitperm}}
@@ -107,17 +107,17 @@ void test(uint8_t u8, uint16_t u16, uint32_t u32, 
uint64_t u64)
   // expected-error@+2 {{'svbgrp_n_u64' needs target feature sve,sve2-bitperm}}
   // overload-error@+1 {{'svbgrp' needs target feature sve,sve2-bitperm}}
   SVE_ACLE_FUNC(svbgrp,_n_u64,,)(svundef_u64(), u64);
-  // expected-error@+2 {{'svpmullb_pair_u64' needs target feature 
sve,sve2-aes}}
-  // overload-error@+1 {{'svpmullb_pair' needs target feature sve,sve2-aes}}
+  // expected-error@+2 {{'svpmullb_pair_u64' needs target feature 
sve,sve2,sve-aes}}
+  // overload-error@+1 {{'svpmullb_pair' needs target feature 
sve,sve2,sve-aes}}
   SVE_ACLE_FUNC(svpmullb_pair,_u64,,)(svundef_u64(), svundef_u64());
-  // expected-error@+2 {{'svpmullb_pair_n_u64' needs target feature 
sve,sve2-aes}}
-  // overload-error@+1 {{'svpmullb_pair' needs target feature sve,sve2-aes}}
+  // expected-error@+2 {{'svpmullb_pair_n_u64' needs target feature 
sve,sve2,sve-aes}}
+  // overload-error@+1 {{'svpmullb_pair' needs target feature 
sve,sve2,sve-aes}}
   SVE_ACLE_FUNC(svpmullb_pair,_n_u64,,)(svundef_u64(), u64);
-  // expected-error@+2 {{'svpmullt_pair_u64' needs target feature 
sve,sve2-aes}}
-  // overload-error@+1 {{'svpmullt_pair' needs target feature sve,sve2-aes}}
+  // expected-error@+2 {{'svpmullt_pair_u64' needs target feature 
sve,sve2,sve-aes}}
+  // overload-error@+1 {{'svpmullt_pair' needs target feature 
sve,sve2,sve-aes}}
   SVE_ACLE_FUNC(svpmullt_pair,_u64,,)(svundef_u64(), svundef_u64());
-  // expected-error@+2 {{'svpmullt_pair_n_u64' needs target feature 
sve,sve2-aes}}
-  // overload-error@+1 {{'svpmullt_pair' needs target feature sve,sve2-aes}}
+  // expected-error@+2 {{'svpmullt_pair_n_u64' needs target feature 
sve,sve2,sve-aes}}
+  // overload-error@+1 {{'svpmullt_pair' needs target feature 
sve,sve2,sve-aes}}
   SVE_ACLE_FUNC(svpmullt_pair,_n_u64,,)(svundef_u64(), u64);
   // expected-error@+2 {{'svrax1_u64' needs target feature sve,sve2-sha3}}
   // overload-error@+1 {{'svrax1' needs target feature sve,sve2-sha3}}

diff  --git a/lldb/test/Shell/Commands/command-disassemble-aarch64-extensions.s 
b/lldb/test/Shell/Commands/command-disassemble-aarch64-extensions.s
index 685d0a84ec2896..191b55c545d762 100644
--- a/lldb/test/Shell/Commands/command-disassemble-aarch64-extensions.s
+++ b/lldb/test/Shell/Commands/command-disassemble-aarch64-extensions.s
@@ -55,7 +55,7 @@ fn:
   mrs x2, ssbs                          // AEK_SSBS
   abs z31.h, p7/m, z31.h                // AEK_SVE
   sqdmlslbt z0.d, z1.s, z31.s           // AEK_SVE2
-  aesd z0.b, z0.b, z31.b                // AEK_SVE2AES
+  aesd z0.b, z0.b, z31.b                // AEK_SVEAES
   bdep z0.b, z1.b, z31.b                // AEK_SVE2BITPERM
   rax1 z0.d, z0.d, z0.d                 // AEK_SVE2SHA3
   sm4e z0.s, z0.s, z0.s                 // AEK_SVE2SM4

diff  --git a/llvm/lib/Target/AArch64/AArch64.td 
b/llvm/lib/Target/AArch64/AArch64.td
index 6854cccaafa1d7..0d69bbeb50260f 100644
--- a/llvm/lib/Target/AArch64/AArch64.td
+++ b/llvm/lib/Target/AArch64/AArch64.td
@@ -63,7 +63,7 @@ def SVE2p1Unsupported : AArch64Unsupported;
 
 def SVE2Unsupported : AArch64Unsupported {
   let F = !listconcat([HasSVE2, HasSVE2orSME, HasSVE2orSME2, HasSSVE_FP8FMA, 
HasSMEF8F16,
-                       HasSMEF8F32, HasSVE2AES, HasSVE2SHA3, HasSVE2SM4, 
HasSVE2BitPerm,
+                       HasSMEF8F32, HasSVEAES, HasSVE2SHA3, HasSVE2SM4, 
HasSVE2BitPerm,
                        HasSVEB16B16],
                        SVE2p1Unsupported.F);
 }

diff  --git a/llvm/lib/Target/AArch64/AArch64FMV.td 
b/llvm/lib/Target/AArch64/AArch64FMV.td
index 61cb4f7ac33792..f6dfbe2500168d 100644
--- a/llvm/lib/Target/AArch64/AArch64FMV.td
+++ b/llvm/lib/Target/AArch64/AArch64FMV.td
@@ -78,7 +78,7 @@ def : FMVExtension<"sme2", "FEAT_SME2", "+sme2,+sme,+bf16", 
580>;
 def : FMVExtension<"ssbs", "FEAT_SSBS2", "+ssbs", 490>;
 def : FMVExtension<"sve", "FEAT_SVE", "+sve,+fullfp16,+fp-armv8,+neon", 310>;
 def : FMVExtension<"sve2", "FEAT_SVE2", 
"+sve2,+sve,+fullfp16,+fp-armv8,+neon", 370>;
-def : FMVExtension<"sve2-aes", "FEAT_SVE_PMULL128", 
"+sve2,+sve,+aes,+sve2-aes,+fullfp16,+fp-armv8,+neon", 380>;
+def : FMVExtension<"sve2-aes", "FEAT_SVE_PMULL128", 
"+sve2,+sve,+aes,+sve-aes,+fullfp16,+fp-armv8,+neon", 380>;
 def : FMVExtension<"sve2-bitperm", "FEAT_SVE_BITPERM", 
"+sve2,+sve,+sve2-bitperm,+fullfp16,+fp-armv8,+neon", 400>;
 def : FMVExtension<"sve2-sha3", "FEAT_SVE_SHA3", 
"+sve2,+sve,+sve2-sha3,+fullfp16,+fp-armv8,+neon", 410>;
 def : FMVExtension<"sve2-sm4", "FEAT_SVE_SM4", 
"+sve2,+sve,+sve2-sm4,+fullfp16,+fp-armv8,+neon", 420>;

diff  --git a/llvm/lib/Target/AArch64/AArch64Features.td 
b/llvm/lib/Target/AArch64/AArch64Features.td
index 6d8554cf1884c1..f681f86029490e 100644
--- a/llvm/lib/Target/AArch64/AArch64Features.td
+++ b/llvm/lib/Target/AArch64/AArch64Features.td
@@ -365,9 +365,12 @@ def FeatureSVE2 : ExtensionWithMArch<"sve2", "SVE2", 
"FEAT_SVE2",
   "Enable Scalable Vector Extension 2 (SVE2) instructions",
   [FeatureSVE, FeatureUseScalarIncVL]>;
 
-def FeatureSVE2AES : ExtensionWithMArch<"sve2-aes", "SVE2AES",
+def FeatureSVEAES : ExtensionWithMArch<"sve-aes", "SVEAES",
   "FEAT_SVE_AES, FEAT_SVE_PMULL128",
-  "Enable AES SVE2 instructions", [FeatureSVE2, FeatureAES]>;
+  "Enable SVE AES and quadword SVE polynomial multiply instructions", 
[FeatureAES]>;
+
+def AliasSVE2AES : ExtensionWithMArch<"sve2-aes", "ALIAS_SVE2AES", "",
+  "An alias of +sve2+sve-aes", [FeatureSVE2, FeatureSVEAES]>;
 
 def FeatureSVE2SM4 : ExtensionWithMArch<"sve2-sm4", "SVE2SM4", "FEAT_SVE_SM4",
   "Enable SM4 SVE2 instructions", [FeatureSVE2, FeatureSM4]>;
@@ -538,13 +541,13 @@ def FeatureSME2p2: ExtensionWithMArch<"sme2p2", "SME2p2", 
"FEAT_SME2p2",
   "Enable Armv9.6-A Scalable Matrix Extension 2.2 instructions", 
[FeatureSME2p1]>;
 
 def FeatureSSVE_AES : ExtensionWithMArch<"ssve-aes", "SSVE_AES", 
"FEAT_SSVE_AES",
-  "Enable Armv9.6-A SVE2 AES support in streaming SVE mode", [FeatureSME2, 
FeatureSVE2AES]>;
+  "Enable Armv9.6-A SVE AES support in streaming SVE mode", [FeatureSME2, 
FeatureSVEAES]>;
 
 def FeatureSVE2p2 : ExtensionWithMArch<"sve2p2", "SVE2p2", "FEAT_SVE2p2",
   "Enable Armv9.6-A Scalable Vector Extension 2.2 instructions", 
[FeatureSVE2p1]>;
 
 def FeatureSVEAES2: ExtensionWithMArch<"sve-aes2", "SVE_AES2", "FEAT_SVE_AES2",
-  "Enable Armv9.6-A SVE multi-vector AES and 128-bit PMULL instructions">;
+  "Enable Armv9.6-A SVE multi-vector AES and multi-vector quadword polynomial 
multiply instructions">;
 
 def FeatureSVEBFSCALE: ExtensionWithMArch<"sve-bfscale", "SVE_BFSCALE", 
"FEAT_SVE_BFSCALE",
   "Enable Armv9.6-A SVE BFloat16 scaling instructions">;

diff  --git a/llvm/lib/Target/AArch64/AArch64InstrInfo.td 
b/llvm/lib/Target/AArch64/AArch64InstrInfo.td
index a31fd6c4b86a8a..57a8c36a2fe00b 100644
--- a/llvm/lib/Target/AArch64/AArch64InstrInfo.td
+++ b/llvm/lib/Target/AArch64/AArch64InstrInfo.td
@@ -149,8 +149,8 @@ def HasSVE2          : 
Predicate<"Subtarget->isSVEAvailable() && Subtarget->hasS
                                  AssemblerPredicateWithAll<(all_of 
FeatureSVE2), "sve2">;
 def HasSVE2p1        : Predicate<"Subtarget->isSVEAvailable() && 
Subtarget->hasSVE2p1()">,
                                  AssemblerPredicateWithAll<(all_of 
FeatureSVE2p1), "sve2p1">;
-def HasSVE2AES       : Predicate<"Subtarget->isSVEAvailable() && 
Subtarget->hasSVE2AES()">,
-                                 AssemblerPredicateWithAll<(all_of 
FeatureSVE2AES), "sve2-aes">;
+def HasSVEAES        : Predicate<"Subtarget->hasSVEAES()">,
+                                 AssemblerPredicateWithAll<(all_of 
FeatureSVEAES), "sve-aes">;
 def HasSVE2SM4       : Predicate<"Subtarget->isSVEAvailable() && 
Subtarget->hasSVE2SM4()">,
                                  AssemblerPredicateWithAll<(all_of 
FeatureSVE2SM4), "sve2-sm4">;
 def HasSVE2SHA3      : Predicate<"Subtarget->isSVEAvailable() && 
Subtarget->hasSVE2SHA3()">,

diff  --git a/llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td 
b/llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
index c10653e05841cd..c244b8e81224d2 100644
--- a/llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
+++ b/llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
@@ -3906,7 +3906,7 @@ let Predicates = [HasSVE2orSME] in {
   defm WHILERW_PXX : sve2_int_while_rr<0b1, "whilerw", 
"int_aarch64_sve_whilerw">;
 } // End HasSVE2orSME
 
-let Predicates = [HasSVE2AES] in {
+let Predicates = [HasSVE2, HasSVEAES] in {
   // SVE2 crypto destructive binary operations
   defm AESE_ZZZ_B : sve2_crypto_des_bin_op<0b00, "aese", ZPR8, 
int_aarch64_sve_aese, nxv16i8>;
   defm AESD_ZZZ_B : sve2_crypto_des_bin_op<0b01, "aesd", ZPR8, 
int_aarch64_sve_aesd, nxv16i8>;

diff  --git a/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp 
b/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
index 712f6de52941c9..5359e31a3435da 100644
--- a/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
+++ b/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
@@ -3737,8 +3737,9 @@ static const struct Extension {
     {"rng", {AArch64::FeatureRandGen}},
     {"sve", {AArch64::FeatureSVE}},
     {"sve-b16b16", {AArch64::FeatureSVEB16B16}},
+    {"sve-aes", {AArch64::FeatureSVEAES}},
     {"sve2", {AArch64::FeatureSVE2}},
-    {"sve2-aes", {AArch64::FeatureSVE2AES}},
+    {"sve2-aes", {AArch64::AliasSVE2AES}},
     {"sve2-sm4", {AArch64::FeatureSVE2SM4}},
     {"sve2-sha3", {AArch64::FeatureSVE2SHA3}},
     {"sve2-bitperm", {AArch64::FeatureSVE2BitPerm}},

diff  --git a/llvm/test/CodeGen/AArch64/sve2-intrinsics-crypto.ll 
b/llvm/test/CodeGen/AArch64/sve2-intrinsics-crypto.ll
index 3bfaf6dddaef8e..fe8271cdf054bf 100644
--- a/llvm/test/CodeGen/AArch64/sve2-intrinsics-crypto.ll
+++ b/llvm/test/CodeGen/AArch64/sve2-intrinsics-crypto.ll
@@ -1,5 +1,6 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve2-aes,+sve2-sha3,+sve2-sm4 < 
%s | FileCheck %s
+; RUN: llc -mtriple=aarch64-linux-gnu 
-mattr=+sve2,+sve-aes,+sve2-sha3,+sve2-sm4 < %s | FileCheck %s
 
 ;
 ; AESD

diff  --git a/llvm/test/MC/AArch64/SVE2/aesd.s 
b/llvm/test/MC/AArch64/SVE2/aesd.s
index 44eb9b68fd44ee..f0cbc39ce74d76 100644
--- a/llvm/test/MC/AArch64/SVE2/aesd.s
+++ b/llvm/test/MC/AArch64/SVE2/aesd.s
@@ -1,17 +1,17 @@
-// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve2-aes < %s \
+// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve2,+sve-aes < %s \
 // RUN:        | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
 // RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
 // RUN:        | FileCheck %s --check-prefix=CHECK-ERROR
 // RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sme < %s 2>&1 \
 // RUN:        | FileCheck %s --check-prefix=CHECK-ERROR
-// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve2-aes < %s \
-// RUN:        | llvm-objdump -d --mattr=+sve2-aes - | FileCheck %s 
--check-prefix=CHECK-INST
-// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve2-aes < %s \
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve2,+sve-aes < %s \
+// RUN:        | llvm-objdump -d --mattr=+sve2,+sve-aes - | FileCheck %s 
--check-prefix=CHECK-INST
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve2,+sve-aes < %s \
 // RUN:   | llvm-objdump -d --mattr=-sve2 - | FileCheck %s 
--check-prefix=CHECK-UNKNOWN
 
 
 aesd z0.b, z0.b, z31.b
 // CHECK-INST: aesd z0.b, z0.b, z31.b
 // CHECK-ENCODING: [0xe0,0xe7,0x22,0x45]
-// CHECK-ERROR: instruction requires: sve2-aes
+// CHECK-ERROR: instruction requires: sve2 sve-aes
 // CHECK-UNKNOWN: 4522e7e0 <unknown>

diff  --git a/llvm/test/MC/AArch64/SVE2/aese.s 
b/llvm/test/MC/AArch64/SVE2/aese.s
index e64f2137ad39a5..91af38604e292a 100644
--- a/llvm/test/MC/AArch64/SVE2/aese.s
+++ b/llvm/test/MC/AArch64/SVE2/aese.s
@@ -1,17 +1,17 @@
-// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve2-aes < %s \
+// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve2,+sve-aes < %s \
 // RUN:        | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
 // RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
 // RUN:        | FileCheck %s --check-prefix=CHECK-ERROR
 // RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sme < %s 2>&1 \
 // RUN:        | FileCheck %s --check-prefix=CHECK-ERROR
-// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve2-aes < %s \
-// RUN:        | llvm-objdump -d --mattr=+sve2-aes - | FileCheck %s 
--check-prefix=CHECK-INST
-// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve2-aes < %s \
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve2,+sve-aes < %s \
+// RUN:        | llvm-objdump -d --mattr=+sve2,+sve-aes - | FileCheck %s 
--check-prefix=CHECK-INST
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve2,+sve-aes < %s \
 // RUN:   | llvm-objdump -d --mattr=-sve2 - | FileCheck %s 
--check-prefix=CHECK-UNKNOWN
 
 
 aese z0.b, z0.b, z31.b
 // CHECK-INST: aese z0.b, z0.b, z31.b
 // CHECK-ENCODING: [0xe0,0xe3,0x22,0x45]
-// CHECK-ERROR: instruction requires: sve2-aes
+// CHECK-ERROR: instruction requires: sve2 sve-aes
 // CHECK-UNKNOWN: 4522e3e0 <unknown>

diff  --git a/llvm/test/MC/AArch64/SVE2/aesimc.s 
b/llvm/test/MC/AArch64/SVE2/aesimc.s
index c868ed0badf49f..8d108d4d7ad32c 100644
--- a/llvm/test/MC/AArch64/SVE2/aesimc.s
+++ b/llvm/test/MC/AArch64/SVE2/aesimc.s
@@ -1,23 +1,23 @@
-// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve2-aes < %s \
+// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve2,+sve-aes < %s \
 // RUN:        | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
 // RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
 // RUN:        | FileCheck %s --check-prefix=CHECK-ERROR
 // RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sme < %s 2>&1 \
 // RUN:        | FileCheck %s --check-prefix=CHECK-ERROR
-// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve2-aes < %s \
-// RUN:        | llvm-objdump -d --mattr=+sve2-aes - | FileCheck %s 
--check-prefix=CHECK-INST
-// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve2-aes < %s \
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve2,+sve-aes < %s \
+// RUN:        | llvm-objdump -d --mattr=+sve2,+sve-aes - | FileCheck %s 
--check-prefix=CHECK-INST
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve2,+sve-aes < %s \
 // RUN:   | llvm-objdump -d --mattr=-sve2 - | FileCheck %s 
--check-prefix=CHECK-UNKNOWN
 
 
 aesimc z0.b, z0.b
 // CHECK-INST: aesimc z0.b, z0.b
 // CHECK-ENCODING: [0x00,0xe4,0x20,0x45]
-// CHECK-ERROR: instruction requires: sve2-aes
+// CHECK-ERROR: instruction requires: sve2 sve-aes
 // CHECK-UNKNOWN: 4520e400 <unknown>
 
 aesimc z31.b, z31.b
 // CHECK-INST: aesimc z31.b, z31.b
 // CHECK-ENCODING: [0x1f,0xe4,0x20,0x45]
-// CHECK-ERROR: instruction requires: sve2-aes
+// CHECK-ERROR: instruction requires: sve2 sve-aes
 // CHECK-UNKNOWN: 4520e41f <unknown>

diff  --git a/llvm/test/MC/AArch64/SVE2/aesmc.s 
b/llvm/test/MC/AArch64/SVE2/aesmc.s
index e158d2b1e0b56e..d3d8ba1dc9fef2 100644
--- a/llvm/test/MC/AArch64/SVE2/aesmc.s
+++ b/llvm/test/MC/AArch64/SVE2/aesmc.s
@@ -1,23 +1,23 @@
-// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve2-aes < %s \
+// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve2,+sve-aes < %s \
 // RUN:        | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
 // RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
 // RUN:        | FileCheck %s --check-prefix=CHECK-ERROR
 // RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sme < %s 2>&1 \
 // RUN:        | FileCheck %s --check-prefix=CHECK-ERROR
-// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve2-aes < %s \
-// RUN:        | llvm-objdump -d --mattr=+sve2-aes - | FileCheck %s 
--check-prefix=CHECK-INST
-// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve2-aes < %s \
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve2,+sve-aes < %s \
+// RUN:        | llvm-objdump -d --mattr=+sve2,+sve-aes - | FileCheck %s 
--check-prefix=CHECK-INST
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve2,+sve-aes < %s \
 // RUN:   | llvm-objdump -d --mattr=-sve2 - | FileCheck %s 
--check-prefix=CHECK-UNKNOWN
 
 
 aesmc z0.b, z0.b
 // CHECK-INST: aesmc z0.b, z0.b
 // CHECK-ENCODING: [0x00,0xe0,0x20,0x45]
-// CHECK-ERROR: instruction requires: sve2-aes
+// CHECK-ERROR: instruction requires: sve2 sve-aes
 // CHECK-UNKNOWN: 4520e000 <unknown>
 
 aesmc z31.b, z31.b
 // CHECK-INST: aesmc z31.b, z31.b
 // CHECK-ENCODING: [0x1f,0xe0,0x20,0x45]
-// CHECK-ERROR: instruction requires: sve2-aes
+// CHECK-ERROR: instruction requires: sve2 sve-aes
 // CHECK-UNKNOWN: 4520e01f <unknown>

diff  --git a/llvm/test/MC/AArch64/SVE2/directive-arch-negative.s 
b/llvm/test/MC/AArch64/SVE2/directive-arch-negative.s
index 966bead071fe39..fd070543bf8a27 100644
--- a/llvm/test/MC/AArch64/SVE2/directive-arch-negative.s
+++ b/llvm/test/MC/AArch64/SVE2/directive-arch-negative.s
@@ -6,10 +6,10 @@ tbx z0.b, z1.b, z2.b
 // CHECK: error: instruction requires: sve2 or sme
 // CHECK-NEXT: tbx z0.b, z1.b, z2.b
 
-.arch armv9-a+sve2-aes
-.arch armv9-a+nosve2-aes
+.arch armv9-a+sve-aes
+.arch armv9-a+nosve-aes
 aesd z23.b, z23.b, z13.b
-// CHECK: error: instruction requires: sve2-aes
+// CHECK: error: instruction requires: sve-aes
 // CHECK-NEXT: aesd z23.b, z23.b, z13.b
 
 .arch armv9-a+sve2-sm4

diff  --git a/llvm/test/MC/AArch64/SVE2/directive-arch.s 
b/llvm/test/MC/AArch64/SVE2/directive-arch.s
index 99f6198a60abbc..529b40f74801ab 100644
--- a/llvm/test/MC/AArch64/SVE2/directive-arch.s
+++ b/llvm/test/MC/AArch64/SVE2/directive-arch.s
@@ -4,7 +4,7 @@
 tbx z0.b, z1.b, z2.b
 // CHECK: tbx z0.b, z1.b, z2.b
 
-.arch armv9-a+sve2-aes
+.arch armv9-a+sve-aes
 aesd z23.b, z23.b, z13.b
 // CHECK: aesd z23.b, z23.b, z13.b
 

diff  --git a/llvm/test/MC/AArch64/SVE2/directive-arch_extension-negative.s 
b/llvm/test/MC/AArch64/SVE2/directive-arch_extension-negative.s
index e967f5aa60bd73..594608d34b509f 100644
--- a/llvm/test/MC/AArch64/SVE2/directive-arch_extension-negative.s
+++ b/llvm/test/MC/AArch64/SVE2/directive-arch_extension-negative.s
@@ -6,10 +6,10 @@ tbx z0.b, z1.b, z2.b
 // CHECK: error: instruction requires: sve2 or sme
 // CHECK-NEXT: tbx z0.b, z1.b, z2.b
 
-.arch_extension sve2-aes
-.arch_extension nosve2-aes
+.arch_extension sve-aes
+.arch_extension nosve-aes
 aesd z23.b, z23.b, z13.b
-// CHECK: error: instruction requires: sve2-aes
+// CHECK: error: instruction requires: sve2 sve-aes
 // CHECK-NEXT: aesd z23.b, z23.b, z13.b
 
 .arch_extension sve2-sm4

diff  --git a/llvm/test/MC/AArch64/SVE2/directive-arch_extension.s 
b/llvm/test/MC/AArch64/SVE2/directive-arch_extension.s
index 2fdbb525464d90..25dbfdde9d31de 100644
--- a/llvm/test/MC/AArch64/SVE2/directive-arch_extension.s
+++ b/llvm/test/MC/AArch64/SVE2/directive-arch_extension.s
@@ -4,7 +4,7 @@
 tbx z0.b, z1.b, z2.b
 // CHECK: tbx z0.b, z1.b, z2.b
 
-.arch_extension sve2-aes
+.arch_extension sve-aes
 aesd z23.b, z23.b, z13.b
 // CHECK: aesd z23.b, z23.b, z13.b
 

diff  --git a/llvm/test/MC/AArch64/SVE2/directive-cpu-negative.s 
b/llvm/test/MC/AArch64/SVE2/directive-cpu-negative.s
index 9a8af638b70378..aec059683dcff7 100644
--- a/llvm/test/MC/AArch64/SVE2/directive-cpu-negative.s
+++ b/llvm/test/MC/AArch64/SVE2/directive-cpu-negative.s
@@ -6,10 +6,10 @@ tbx z0.b, z1.b, z2.b
 // CHECK: error: instruction requires: sve2 or sme
 // CHECK-NEXT: tbx z0.b, z1.b, z2.b
 
-.cpu generic+sve2-aes
-.cpu generic+nosve2-aes
+.cpu generic+sve2+sve-aes
+.cpu generic+nosve-aes
 aesd z23.b, z23.b, z13.b
-// CHECK: error: instruction requires: sve2-aes
+// CHECK: error: instruction requires: sve2 sve-aes
 // CHECK-NEXT: aesd z23.b, z23.b, z13.b
 
 .cpu generic+sve2-sm4

diff  --git a/llvm/test/MC/AArch64/SVE2/directive-cpu.s 
b/llvm/test/MC/AArch64/SVE2/directive-cpu.s
index daa5ec510b226a..a98b8b207ef185 100644
--- a/llvm/test/MC/AArch64/SVE2/directive-cpu.s
+++ b/llvm/test/MC/AArch64/SVE2/directive-cpu.s
@@ -4,7 +4,7 @@
 tbx z0.b, z1.b, z2.b
 // CHECK: tbx z0.b, z1.b, z2.b
 
-.cpu generic+sve2-aes
+.cpu generic+sve2+sve-aes
 aesd z23.b, z23.b, z13.b
 // CHECK: aesd z23.b, z23.b, z13.b
 

diff  --git a/llvm/test/MC/AArch64/SVE2/pmullb-128.s 
b/llvm/test/MC/AArch64/SVE2/pmullb-128.s
index d48c75b3d49997..0d562439a6021c 100644
--- a/llvm/test/MC/AArch64/SVE2/pmullb-128.s
+++ b/llvm/test/MC/AArch64/SVE2/pmullb-128.s
@@ -1,17 +1,17 @@
-// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve2-aes < %s \
+// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve2,+sve-aes < %s \
 // RUN:        | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
 // RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
 // RUN:        | FileCheck %s --check-prefix=CHECK-ERROR
 // RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sme < %s 2>&1 \
 // RUN:        | FileCheck %s --check-prefix=CHECK-ERROR
-// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve2-aes < %s \
-// RUN:        | llvm-objdump -d --mattr=+sve2-aes - | FileCheck %s 
--check-prefix=CHECK-INST
-// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve2-aes < %s \
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve2,+sve-aes < %s \
+// RUN:        | llvm-objdump -d --mattr=+sve2,+sve-aes - | FileCheck %s 
--check-prefix=CHECK-INST
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve2,+sve-aes < %s \
 // RUN:   | llvm-objdump -d --mattr=-sve2 - | FileCheck %s 
--check-prefix=CHECK-UNKNOWN
 
 
 pmullb z29.q, z30.d, z31.d
 // CHECK-INST: pmullb z29.q, z30.d, z31.d
 // CHECK-ENCODING: [0xdd,0x6b,0x1f,0x45]
-// CHECK-ERROR: instruction requires: sve2-aes
+// CHECK-ERROR: instruction requires: sve2 sve-aes
 // CHECK-UNKNOWN: 451f6bdd <unknown>

diff  --git a/llvm/test/MC/AArch64/SVE2/pmullt-128.s 
b/llvm/test/MC/AArch64/SVE2/pmullt-128.s
index e1eca8d1d89f80..75b6508458b6df 100644
--- a/llvm/test/MC/AArch64/SVE2/pmullt-128.s
+++ b/llvm/test/MC/AArch64/SVE2/pmullt-128.s
@@ -1,17 +1,17 @@
-// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve2-aes < %s \
+// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve2,+sve-aes < %s \
 // RUN:        | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
 // RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
 // RUN:        | FileCheck %s --check-prefix=CHECK-ERROR
 // RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sme < %s 2>&1 \
 // RUN:        | FileCheck %s --check-prefix=CHECK-ERROR
-// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve2-aes < %s \
-// RUN:        | llvm-objdump -d --mattr=+sve2-aes - | FileCheck %s 
--check-prefix=CHECK-INST
-// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve2-aes < %s \
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve2,+sve-aes < %s \
+// RUN:        | llvm-objdump -d --mattr=+sve2,+sve-aes - | FileCheck %s 
--check-prefix=CHECK-INST
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve2,+sve-aes < %s \
 // RUN:   | llvm-objdump -d --mattr=-sve2 - | FileCheck %s 
--check-prefix=CHECK-UNKNOWN
 
 
 pmullt z29.q, z30.d, z31.d
 // CHECK-INST: pmullt z29.q, z30.d, z31.d
 // CHECK-ENCODING: [0xdd,0x6f,0x1f,0x45]
-// CHECK-ERROR: instruction requires: sve2-aes
+// CHECK-ERROR: instruction requires: sve2 sve-aes
 // CHECK-UNKNOWN: 451f6fdd <unknown>

diff  --git a/llvm/unittests/TargetParser/TargetParserTest.cpp 
b/llvm/unittests/TargetParser/TargetParserTest.cpp
index d69b2d6b13b1a6..4bdb6ee5cf1825 100644
--- a/llvm/unittests/TargetParser/TargetParserTest.cpp
+++ b/llvm/unittests/TargetParser/TargetParserTest.cpp
@@ -1297,7 +1297,7 @@ TEST(TargetParserTest, AArch64ExtensionFeatures) {
       AArch64::AEK_SIMD,         AArch64::AEK_FP16,
       AArch64::AEK_FP16FML,      AArch64::AEK_PROFILE,
       AArch64::AEK_RAS,          AArch64::AEK_SVE,
-      AArch64::AEK_SVE2,         AArch64::AEK_SVE2AES,
+      AArch64::AEK_SVE2,         AArch64::AEK_ALIAS_SVE2AES,
       AArch64::AEK_SVE2SM4,      AArch64::AEK_SVE2SHA3,
       AArch64::AEK_SVE2BITPERM,  AArch64::AEK_RCPC,
       AArch64::AEK_RAND,         AArch64::AEK_MTE,
@@ -1334,7 +1334,7 @@ TEST(TargetParserTest, AArch64ExtensionFeatures) {
       AArch64::AEK_FPRCVT,       AArch64::AEK_CMPBR,
       AArch64::AEK_LSUI,         AArch64::AEK_OCCMO,
       AArch64::AEK_PCDPHINT,     AArch64::AEK_POPS,
-  };
+      AArch64::AEK_SVEAES};
 
   std::vector<StringRef> Features;
 
@@ -1369,6 +1369,7 @@ TEST(TargetParserTest, AArch64ExtensionFeatures) {
   EXPECT_TRUE(llvm::is_contained(Features, "+sve-bfscale"));
   EXPECT_TRUE(llvm::is_contained(Features, "+sve-f16f32mm"));
   EXPECT_TRUE(llvm::is_contained(Features, "+sve2"));
+  EXPECT_TRUE(llvm::is_contained(Features, "+sve-aes"));
   EXPECT_TRUE(llvm::is_contained(Features, "+sve2-aes"));
   EXPECT_TRUE(llvm::is_contained(Features, "+sve2-sm4"));
   EXPECT_TRUE(llvm::is_contained(Features, "+sve2-sha3"));
@@ -1538,6 +1539,7 @@ TEST(TargetParserTest, AArch64ArchExtFeature) {
       {"sve-bfscale", "nosve-bfscale", "+sve-bfscale", "-sve-bfscale"},
       {"sve-f16f32mm", "nosve-f16f32mm", "+sve-f16f32mm", "-sve-f16f32mm"},
       {"sve2", "nosve2", "+sve2", "-sve2"},
+      {"sve-aes", "nosve-aes", "+sve-aes", "-sve-aes"},
       {"sve2-aes", "nosve2-aes", "+sve2-aes", "-sve2-aes"},
       {"sve2-sm4", "nosve2-sm4", "+sve2-sm4", "-sve2-sm4"},
       {"sve2-sha3", "nosve2-sha3", "+sve2-sha3", "-sve2-sha3"},
@@ -1840,7 +1842,11 @@ AArch64ExtensionDependenciesBaseArchTestParams
          {},
          {"sve", "sve-f16f32mm"}},
 
-        // sve2 -> {sve2p1, sve2-bitperm, sve2-sha3, sve2-sm4}
+        // aes -> {sve-aes}
+        {AArch64::ARMV8A, {"noaes", "sve-aes"}, {"aes", "sve-aes"}, {}},
+        {AArch64::ARMV8A, {"sve-aes", "noaes"}, {}, {"aes", "sve-aes"}},
+
+        // sve2 -> {sve2p1, sve2-bitperm, sve2-sha3, sve2-sm4, sve2-aes}
         {AArch64::ARMV8A, {"nosve2", "sve2p1"}, {"sve2", "sve2p1"}, {}},
         {AArch64::ARMV8A, {"sve2p1", "nosve2"}, {}, {"sve2", "sve2p1"}},
         {AArch64::ARMV8A,
@@ -1855,6 +1861,8 @@ AArch64ExtensionDependenciesBaseArchTestParams
         {AArch64::ARMV8A, {"sve2-sha3", "nosve2"}, {}, {"sve2", "sve2-sha3"}},
         {AArch64::ARMV8A, {"nosve2", "sve2-sm4"}, {"sve2", "sve2-sm4"}, {}},
         {AArch64::ARMV8A, {"sve2-sm4", "nosve2"}, {}, {"sve2", "sve2-sm4"}},
+        {AArch64::ARMV8A, {"nosve2", "sve2-aes"}, {"sve2", "sve2-aes"}, {}},
+        {AArch64::ARMV8A, {"sve2-aes", "nosve2"}, {}, {"sve2", "sve2-aes"}},
 
         // sve-b16b16 -> {sme-b16b16}
         {AArch64::ARMV9_4A,
@@ -1955,16 +1963,23 @@ AArch64ExtensionDependenciesBaseArchTestParams
         {AArch64::ARMV8A, {"norcpc", "rcpc3"}, {"rcpc", "rcpc3"}, {}},
         {AArch64::ARMV8A, {"rcpc3", "norcpc"}, {}, {"rcpc", "rcpc3"}},
 
-        // sve2-aes -> ssve-aes
+        // sve-aes -> {ssve-aes, sve2-aes}
         {AArch64::ARMV9_6A,
-         {"nosve2-aes", "ssve-aes"},
-         {"sve2-aes", "ssve-aes"},
+         {"nosve-aes", "ssve-aes"},
+         {"sve-aes", "ssve-aes"},
          {}},
         {AArch64::ARMV9_6A,
-         {"ssve-aes", "nosve2-aes"},
+         {"ssve-aes", "nosve-aes"},
          {},
-         {"ssve-aes", "sve2-aes"}},
-};
+         {"ssve-aes", "sve-aes"}},
+        {AArch64::ARMV9_6A,
+         {"nosve-aes", "sve2-aes"},
+         {"sve2-aes", "sve-aes"},
+         {}},
+        {AArch64::ARMV9_6A,
+         {"sve2-aes", "nosve-aes"},
+         {},
+         {"sve2-aes", "sve-aes"}}};
 
 INSTANTIATE_TEST_SUITE_P(
     AArch64ExtensionDependenciesBaseArch,


        
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