llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT--> @llvm/pr-subscribers-clang Author: Lei Huang (lei137) <details> <summary>Changes</summary> Fix 64-bit PowerPC part of https://github.com/llvm/llvm-project/issues/102783. --- Full diff: https://github.com/llvm/llvm-project/pull/118004.diff 9 Files Affected: - (modified) clang/lib/Basic/Targets/OSTargets.h (+1-1) - (modified) clang/lib/Basic/Targets/PPC.h (+3-3) - (modified) clang/test/CodeGen/target-data.c (+9-9) - (modified) llvm/lib/IR/AutoUpgrade.cpp (+1-1) - (modified) llvm/lib/Target/PowerPC/PPCTargetMachine.cpp (+1-1) - (modified) llvm/test/Analysis/CostModel/PowerPC/load-to-trunc.ll (+2-2) - (added) llvm/test/CodeGen/PowerPC/data-align.ll (+24) - (modified) llvm/test/Transforms/AtomicExpand/PowerPC/cmpxchg.ll (+3-3) - (modified) llvm/unittests/Bitcode/DataLayoutUpgradeTest.cpp (+1-1) ``````````diff diff --git a/clang/lib/Basic/Targets/OSTargets.h b/clang/lib/Basic/Targets/OSTargets.h index 75f53e96ce28f6..c0351f26e9bee6 100644 --- a/clang/lib/Basic/Targets/OSTargets.h +++ b/clang/lib/Basic/Targets/OSTargets.h @@ -473,7 +473,7 @@ class LLVM_LIBRARY_VISIBILITY PS3PPUTargetInfo : public OSTargetInfo<Target> { this->IntMaxType = TargetInfo::SignedLongLong; this->Int64Type = TargetInfo::SignedLongLong; this->SizeType = TargetInfo::UnsignedInt; - this->resetDataLayout("E-m:e-p:32:32-Fi64-i64:64-n32:64"); + this->resetDataLayout("E-m:e-p:32:32-Fi64-i64:64-i128:128-n32:64"); } }; diff --git a/clang/lib/Basic/Targets/PPC.h b/clang/lib/Basic/Targets/PPC.h index b0833d30550af4..3cd0fcad172939 100644 --- a/clang/lib/Basic/Targets/PPC.h +++ b/clang/lib/Basic/Targets/PPC.h @@ -462,12 +462,12 @@ class LLVM_LIBRARY_VISIBILITY PPC64TargetInfo : public PPCTargetInfo { if (Triple.isOSAIX()) { // TODO: Set appropriate ABI for AIX platform. - DataLayout = "E-m:a-Fi64-i64:64-n32:64"; + DataLayout = "E-m:a-Fi64-i64:64-i128:128-n32:64"; LongDoubleWidth = 64; LongDoubleAlign = DoubleAlign = 32; LongDoubleFormat = &llvm::APFloat::IEEEdouble(); } else if ((Triple.getArch() == llvm::Triple::ppc64le)) { - DataLayout = "e-m:e-Fn32-i64:64-n32:64"; + DataLayout = "e-m:e-Fn32-i64:64-i128:128-n32:64"; ABI = "elfv2"; } else { DataLayout = "E-m:e"; @@ -478,7 +478,7 @@ class LLVM_LIBRARY_VISIBILITY PPC64TargetInfo : public PPCTargetInfo { ABI = "elfv1"; DataLayout += "-Fi64"; } - DataLayout += "-i64:64-n32:64"; + DataLayout += "-i64:64-i128:128-n32:64"; } if (Triple.isOSFreeBSD() || Triple.isOSOpenBSD() || Triple.isMusl()) { diff --git a/clang/test/CodeGen/target-data.c b/clang/test/CodeGen/target-data.c index cb89fad941c832..2c758567faa1f6 100644 --- a/clang/test/CodeGen/target-data.c +++ b/clang/test/CodeGen/target-data.c @@ -88,7 +88,7 @@ // RUN: %clang_cc1 -triple powerpc64-lv2 -o - -emit-llvm %s | \ // RUN: FileCheck %s -check-prefix=PS3 -// PS3: target datalayout = "E-m:e-p:32:32-Fi64-i64:64-n32:64" +// PS3: target datalayout = "E-m:e-p:32:32-Fi64-i64:64-i128:128-n32:64" // RUN: %clang_cc1 -triple i686-nacl -o - -emit-llvm %s | \ // RUN: FileCheck %s -check-prefix=I686-NACL @@ -128,35 +128,35 @@ // RUN: %clang_cc1 -triple powerpc64-freebsd -o - -emit-llvm %s | \ // RUN: FileCheck %s -check-prefix=PPC64-FREEBSD -// PPC64-FREEBSD: target datalayout = "E-m:e-Fn32-i64:64-n32:64" +// PPC64-FREEBSD: target datalayout = "E-m:e-Fn32-i64:64-i128:128-n32:64" // RUN: %clang_cc1 -triple powerpc64le-freebsd -o - -emit-llvm %s | \ // RUN: FileCheck %s -check-prefix=PPC64LE-FREEBSD -// PPC64LE-FREEBSD: target datalayout = "e-m:e-Fn32-i64:64-n32:64" +// PPC64LE-FREEBSD: target datalayout = "e-m:e-Fn32-i64:64-i128:128-n32:64" // RUN: %clang_cc1 -triple powerpc64-linux -o - -emit-llvm %s | \ // RUN: FileCheck %s -check-prefix=PPC64-LINUX -// PPC64-LINUX: target datalayout = "E-m:e-Fi64-i64:64-n32:64-S128-v256:256:256-v512:512:512" +// PPC64-LINUX: target datalayout = "E-m:e-Fi64-i64:64-i128:128-n32:64-S128-v256:256:256-v512:512:512" // RUN: %clang_cc1 -triple powerpc64-linux -o - -emit-llvm -target-cpu future %s | \ // RUN: FileCheck %s -check-prefix=PPC64-FUTURE -// PPC64-FUTURE: target datalayout = "E-m:e-Fi64-i64:64-n32:64-S128-v256:256:256-v512:512:512" +// PPC64-FUTURE: target datalayout = "E-m:e-Fi64-i64:64-i128:128-n32:64-S128-v256:256:256-v512:512:512" // RUN: %clang_cc1 -triple powerpc64-linux -o - -emit-llvm -target-cpu pwr10 %s | \ // RUN: FileCheck %s -check-prefix=PPC64-P10 -// PPC64-P10: target datalayout = "E-m:e-Fi64-i64:64-n32:64-S128-v256:256:256-v512:512:512" +// PPC64-P10: target datalayout = "E-m:e-Fi64-i64:64-i128:128-n32:64-S128-v256:256:256-v512:512:512" // RUN: %clang_cc1 -triple powerpc64le-linux -o - -emit-llvm %s | \ // RUN: FileCheck %s -check-prefix=PPC64LE-LINUX -// PPC64LE-LINUX: target datalayout = "e-m:e-Fn32-i64:64-n32:64-S128-v256:256:256-v512:512:512" +// PPC64LE-LINUX: target datalayout = "e-m:e-Fn32-i64:64-i128:128-n32:64-S128-v256:256:256-v512:512:512" // RUN: %clang_cc1 -triple powerpc64le-linux -o - -emit-llvm -target-cpu future %s | \ // RUN: FileCheck %s -check-prefix=PPC64LE-FUTURE -// PPC64LE-FUTURE: target datalayout = "e-m:e-Fn32-i64:64-n32:64-S128-v256:256:256-v512:512:512" +// PPC64LE-FUTURE: target datalayout = "e-m:e-Fn32-i64:64-i128:128-n32:64-S128-v256:256:256-v512:512:512" // RUN: %clang_cc1 -triple powerpc64le-linux -o - -emit-llvm -target-cpu pwr10 %s | \ // RUN: FileCheck %s -check-prefix=PPC64LE-P10 -// PPC64LE-P10: target datalayout = "e-m:e-Fn32-i64:64-n32:64-S128-v256:256:256-v512:512:512" +// PPC64LE-P10: target datalayout = "e-m:e-Fn32-i64:64-i128:128-n32:64-S128-v256:256:256-v512:512:512" // RUN: %clang_cc1 -triple nvptx-unknown -o - -emit-llvm %s | \ // RUN: FileCheck %s -check-prefix=NVPTX diff --git a/llvm/lib/IR/AutoUpgrade.cpp b/llvm/lib/IR/AutoUpgrade.cpp index e73538da282e99..d54176a7878b5a 100644 --- a/llvm/lib/IR/AutoUpgrade.cpp +++ b/llvm/lib/IR/AutoUpgrade.cpp @@ -5559,7 +5559,7 @@ std::string llvm::UpgradeDataLayoutString(StringRef DL, StringRef TT) { return Res; } - if (T.isSPARC() || (T.isMIPS64() && !DL.contains("m:m"))) { + if (T.isSPARC() || (T.isMIPS64() && !DL.contains("m:m")) || T.isPPC64()) { // Mips64 with o32 ABI did not add "-i128:128". // Add "-i128:128" std::string I64 = "-i64:64"; diff --git a/llvm/lib/Target/PowerPC/PPCTargetMachine.cpp b/llvm/lib/Target/PowerPC/PPCTargetMachine.cpp index 2b64ab9aa6973d..a027049b9e9d47 100644 --- a/llvm/lib/Target/PowerPC/PPCTargetMachine.cpp +++ b/llvm/lib/Target/PowerPC/PPCTargetMachine.cpp @@ -190,7 +190,7 @@ static std::string getDataLayoutString(const Triple &T) { // PPC64 has 32 and 64 bit registers, PPC32 has only 32 bit ones. if (is64Bit) - Ret += "-n32:64"; + Ret += "-i128:128-n32:64"; else Ret += "-n32"; diff --git a/llvm/test/Analysis/CostModel/PowerPC/load-to-trunc.ll b/llvm/test/Analysis/CostModel/PowerPC/load-to-trunc.ll index 57a6e98cfb4ee6..b78d121ff4f389 100644 --- a/llvm/test/Analysis/CostModel/PowerPC/load-to-trunc.ll +++ b/llvm/test/Analysis/CostModel/PowerPC/load-to-trunc.ll @@ -7,7 +7,7 @@ ; Check that cost is 1 for unusual load to register sized load. define i32 @loadUnusualIntegerWithTrunc(ptr %ptr) { ; CHECK-LABEL: 'loadUnusualIntegerWithTrunc' -; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %out = load i128, ptr %ptr, align 8 +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %out = load i128, ptr %ptr, align 16 ; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %trunc = trunc i128 %out to i32 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 %trunc ; @@ -18,7 +18,7 @@ define i32 @loadUnusualIntegerWithTrunc(ptr %ptr) { define i128 @loadUnusualInteger(ptr %ptr) { ; CHECK-LABEL: 'loadUnusualInteger' -; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %out = load i128, ptr %ptr, align 8 +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %out = load i128, ptr %ptr, align 16 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i128 %out ; %out = load i128, ptr %ptr diff --git a/llvm/test/CodeGen/PowerPC/data-align.ll b/llvm/test/CodeGen/PowerPC/data-align.ll new file mode 100644 index 00000000000000..bfedec139369c0 --- /dev/null +++ b/llvm/test/CodeGen/PowerPC/data-align.ll @@ -0,0 +1,24 @@ +; RUN: llc < %s -mtriple=powerpc-unknown-linux | FileCheck %s +; RUN: llc < %s -mtriple=powerpc64-unknown-linux | FileCheck %s +; RUN: llc < %s -mtriple=powerpc64le-unknown-linux | FileCheck %s + +; CHECK: .set .Li8, +; CHECK-NEXT: .size .Li8, 1 +@i8 = private constant i8 42 + +; CHECK: .set .Li16, +; CHECK-NEXT: .size .Li16, 2 +@i16 = private constant i16 42 + +; CHECK: .set .Li32, +; CHECK-NEXT: .size .Li32, 4 +@i32 = private constant i32 42 + +; CHECK: .set .Li64, +; CHECK-NEXT: .size .Li64, 8 +@i64 = private constant i64 42 + +; CHECK: .set .Li128, +; CHECK-NEXT: .size .Li128, 16 +@i128 = private constant i128 42 + diff --git a/llvm/test/Transforms/AtomicExpand/PowerPC/cmpxchg.ll b/llvm/test/Transforms/AtomicExpand/PowerPC/cmpxchg.ll index b94023b97a2950..cc51a00db415ca 100644 --- a/llvm/test/Transforms/AtomicExpand/PowerPC/cmpxchg.ll +++ b/llvm/test/Transforms/AtomicExpand/PowerPC/cmpxchg.ll @@ -30,11 +30,11 @@ define i1 @test_cmpxchg_seq_cst(ptr %addr, i128 %desire, i128 %new) { ; ; PWR7-LABEL: @test_cmpxchg_seq_cst( ; PWR7-NEXT: entry: -; PWR7-NEXT: [[TMP0:%.*]] = alloca i128, align 8 +; PWR7-NEXT: [[TMP0:%.*]] = alloca i128, align 16 ; PWR7-NEXT: call void @llvm.lifetime.start.p0(i64 16, ptr [[TMP0]]) -; PWR7-NEXT: store i128 [[DESIRE:%.*]], ptr [[TMP0]], align 8 +; PWR7-NEXT: store i128 [[DESIRE:%.*]], ptr [[TMP0]], align 16 ; PWR7-NEXT: [[TMP1:%.*]] = call zeroext i1 @__atomic_compare_exchange_16(ptr [[ADDR:%.*]], ptr [[TMP0]], i128 [[NEW:%.*]], i32 5, i32 5) -; PWR7-NEXT: [[TMP2:%.*]] = load i128, ptr [[TMP0]], align 8 +; PWR7-NEXT: [[TMP2:%.*]] = load i128, ptr [[TMP0]], align 16 ; PWR7-NEXT: call void @llvm.lifetime.end.p0(i64 16, ptr [[TMP0]]) ; PWR7-NEXT: [[TMP3:%.*]] = insertvalue { i128, i1 } poison, i128 [[TMP2]], 0 ; PWR7-NEXT: [[TMP4:%.*]] = insertvalue { i128, i1 } [[TMP3]], i1 [[TMP1]], 1 diff --git a/llvm/unittests/Bitcode/DataLayoutUpgradeTest.cpp b/llvm/unittests/Bitcode/DataLayoutUpgradeTest.cpp index 795646b22b945a..67dccb3849f93c 100644 --- a/llvm/unittests/Bitcode/DataLayoutUpgradeTest.cpp +++ b/llvm/unittests/Bitcode/DataLayoutUpgradeTest.cpp @@ -118,7 +118,7 @@ TEST(DataLayoutUpgradeTest, NoDataLayoutUpgrade) { "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-i128:128:128" "-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64" "-f80:128:128-n8:16:32:64-S128"); - EXPECT_EQ(DL2, "e-m:e-i64:64-n32:64"); + EXPECT_EQ(DL2, "e-m:e-i64:64-i128:128-n32:64"); EXPECT_EQ(DL3, "e-m:o-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-n32:" "64-S128-Fn32"); `````````` </details> https://github.com/llvm/llvm-project/pull/118004 _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
