jaykang10 added a comment. In https://reviews.llvm.org/D30810#702548, @ahatanak wrote:
> In https://reviews.llvm.org/D30810#701141, @jaykang10 wrote: > > > In https://reviews.llvm.org/D30810#701132, @ahatanak wrote: > > > > > Actually, it's not a mis-compile. The record layout shows that there is a > > > padding before field f2 and f2 starts at byte 16. So using "store <4 x > > > float>" doesn't overwrite the field. > > > > > > It depends on float3's alignment. I guess the float3's alignment is 16 on > > your target so there is a padding bytes before f2 to be aligned by 16. If > > you add __attribute__((packed)) on struct type, you could see overwrite. > > > I looked at ItaniumRecordLayoutBuilder to understand how > __attribute__((packed)) affects the struct's layout. > > If the number of elements of a vector is not a power of 2, > ASTContext::getTypeInfoImpl rounds up the width and alignment to the next > power of 2. So the size of float3 is 16 bytes. __attribute__((packed)) can > change the alignment of float3, but it doesn't change its size, so there is a > 4-byte padding between field f1 and f2. Oops, I am sorry, I was wrong. I did not imagine the size has same behavior with alignment. Thank you for pointing out it! :) Additionally, I wonder why the non-power-of-2 length vector's size has same behavior with alignment... Do you know something about the reason? https://reviews.llvm.org/D30810 _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
