llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT--> @llvm/pr-subscribers-backend-hexagon Author: Ikhlas Ajbar (iajbar) <details> <summary>Changes</summary> Set the default compilation target to V68 if no Hexagon processor is specified at the command-line. Add the elf header changes for v81/v83/v85 architectures. --- Full diff: https://github.com/llvm/llvm-project/pull/125239.diff 3 Files Affected: - (modified) clang/lib/Driver/ToolChains/Hexagon.cpp (+1-1) - (added) clang/test/Driver/hexagon-cpu-default.c (+4) - (modified) llvm/include/llvm/BinaryFormat/ELF.h (+10) ``````````diff diff --git a/clang/lib/Driver/ToolChains/Hexagon.cpp b/clang/lib/Driver/ToolChains/Hexagon.cpp index 76cedf312d68a1..91dd582eb05a00 100644 --- a/clang/lib/Driver/ToolChains/Hexagon.cpp +++ b/clang/lib/Driver/ToolChains/Hexagon.cpp @@ -803,7 +803,7 @@ bool HexagonToolChain::isAutoHVXEnabled(const llvm::opt::ArgList &Args) { // if no Hexagon processor is selected at the command-line. // StringRef HexagonToolChain::GetDefaultCPU() { - return "hexagonv60"; + return "hexagonv68"; } StringRef HexagonToolChain::GetTargetCPUVersion(const ArgList &Args) { diff --git a/clang/test/Driver/hexagon-cpu-default.c b/clang/test/Driver/hexagon-cpu-default.c new file mode 100644 index 00000000000000..31fb839f216569 --- /dev/null +++ b/clang/test/Driver/hexagon-cpu-default.c @@ -0,0 +1,4 @@ +// CHECK: "-target-cpu" "hexagonv68" + +// RUN: %clang -c %s -### --target=hexagon-unknown-elf \ +// RUN: 2>&1 | FileCheck %s diff --git a/llvm/include/llvm/BinaryFormat/ELF.h b/llvm/include/llvm/BinaryFormat/ELF.h index 48ae0db80f43ee..8853c4a88b0b59 100644 --- a/llvm/include/llvm/BinaryFormat/ELF.h +++ b/llvm/include/llvm/BinaryFormat/ELF.h @@ -619,6 +619,7 @@ enum { EF_HEXAGON_MACH_V5 = 0x00000004, // Hexagon V5 EF_HEXAGON_MACH_V55 = 0x00000005, // Hexagon V55 EF_HEXAGON_MACH_V60 = 0x00000060, // Hexagon V60 + EF_HEXAGON_MACH_V61 = 0x00000061, // Hexagon V61 EF_HEXAGON_MACH_V62 = 0x00000062, // Hexagon V62 EF_HEXAGON_MACH_V65 = 0x00000065, // Hexagon V65 EF_HEXAGON_MACH_V66 = 0x00000066, // Hexagon V66 @@ -630,7 +631,11 @@ enum { EF_HEXAGON_MACH_V71T = 0x00008071, // Hexagon V71T EF_HEXAGON_MACH_V73 = 0x00000073, // Hexagon V73 EF_HEXAGON_MACH_V75 = 0x00000075, // Hexagon V75 + EF_HEXAGON_MACH_V77 = 0x00000077, // Hexagon V77 EF_HEXAGON_MACH_V79 = 0x00000079, // Hexagon V79 + EF_HEXAGON_MACH_V81 = 0x00000081, // Hexagon V81 + EF_HEXAGON_MACH_V83 = 0x00000083, // Hexagon V83 + EF_HEXAGON_MACH_V85 = 0x00000085, // Hexagon V85 EF_HEXAGON_MACH = 0x000003ff, // Hexagon V.. // Highest ISA version flags @@ -642,6 +647,7 @@ enum { EF_HEXAGON_ISA_V5 = 0x00000040, // Hexagon V5 ISA EF_HEXAGON_ISA_V55 = 0x00000050, // Hexagon V55 ISA EF_HEXAGON_ISA_V60 = 0x00000060, // Hexagon V60 ISA + EF_HEXAGON_ISA_V61 = 0x00000061, // Hexagon V61 ISA EF_HEXAGON_ISA_V62 = 0x00000062, // Hexagon V62 ISA EF_HEXAGON_ISA_V65 = 0x00000065, // Hexagon V65 ISA EF_HEXAGON_ISA_V66 = 0x00000066, // Hexagon V66 ISA @@ -651,7 +657,11 @@ enum { EF_HEXAGON_ISA_V71 = 0x00000071, // Hexagon V71 ISA EF_HEXAGON_ISA_V73 = 0x00000073, // Hexagon V73 ISA EF_HEXAGON_ISA_V75 = 0x00000075, // Hexagon V75 ISA + EF_HEXAGON_ISA_V77 = 0x00000077, // Hexagon V77 ISA EF_HEXAGON_ISA_V79 = 0x00000079, // Hexagon V79 ISA + EF_HEXAGON_ISA_V81 = 0x00000081, // Hexagon V81 ISA + EF_HEXAGON_ISA_V83 = 0x00000083, // Hexagon V83 ISA + EF_HEXAGON_ISA_V85 = 0x00000085, // Hexagon V85 ISA EF_HEXAGON_ISA = 0x000003ff, // Hexagon V.. ISA }; `````````` </details> https://github.com/llvm/llvm-project/pull/125239 _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
