github-actions[bot] wrote:
<!--LLVM CODE FORMAT COMMENT: {clang-format}-->
:warning: C/C++ code formatter, clang-format found issues in your code.
:warning:
<details>
<summary>
You can test this locally with the following command:
</summary>
``````````bash
git-clang-format --diff HEAD~1 HEAD --extensions cpp,h --
llvm/lib/Target/X86/X86SuppressAPXForReloc.cpp
llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h llvm/lib/Target/X86/X86.h
llvm/lib/Target/X86/X86InstrInfo.cpp llvm/lib/Target/X86/X86TargetMachine.cpp
``````````
</details>
<details>
<summary>
View the diff from clang-format here.
</summary>
``````````diff
diff --git a/llvm/lib/Target/X86/X86SuppressAPXForReloc.cpp
b/llvm/lib/Target/X86/X86SuppressAPXForReloc.cpp
index 903c6441b..28319beec 100644
--- a/llvm/lib/Target/X86/X86SuppressAPXForReloc.cpp
+++ b/llvm/lib/Target/X86/X86SuppressAPXForReloc.cpp
@@ -85,7 +85,7 @@ static bool handleInstructionWithEGPR(MachineFunction &MF,
return false;
auto suppressEGPRInInstrWithReloc = [&](MachineInstr &MI,
- ArrayRef<unsigned> OpNoArray) {
+ ArrayRef<unsigned> OpNoArray) {
int MemOpNo = X86II::getMemoryOperandNo(MI.getDesc().TSFlags) +
X86II::getOperandBias(MI.getDesc());
auto &MO = MI.getOperand(X86::AddrDisp + MemOpNo);
@@ -165,10 +165,9 @@ static bool handleNDDOrNFInstructions(MachineFunction &MF,
LLVM_DEBUG(dbgs() << "Transform instruction with relocation type:\n
"
<< MI);
Register Reg = MRI->createVirtualRegister(&X86::GR64_NOREX2RegClass);
- auto &CopyMI =
- BuildMI(MBB, MI, MI.getDebugLoc(), TII->get(TargetOpcode::COPY),
- Reg)
- .addReg(MI.getOperand(1).getReg());
+ auto &CopyMI = BuildMI(MBB, MI, MI.getDebugLoc(),
+ TII->get(TargetOpcode::COPY), Reg)
+ .addReg(MI.getOperand(1).getReg());
MI.getOperand(1).setReg(Reg);
const MCInstrDesc &NewDesc = TII->get(X86::ADD64rm);
MI.setDesc(NewDesc);
@@ -187,10 +186,9 @@ static bool handleNDDOrNFInstructions(MachineFunction &MF,
<< MI);
suppressEGPRRegClass(MF, MI, 0);
Register Reg = MRI->createVirtualRegister(&X86::GR64_NOREX2RegClass);
- auto &CopyMI =
- BuildMI(MBB, MI, MI.getDebugLoc(), TII->get(TargetOpcode::COPY),
- Reg)
- .addReg(MI.getOperand(6).getReg());
+ auto &CopyMI = BuildMI(MBB, MI, MI.getDebugLoc(),
+ TII->get(TargetOpcode::COPY), Reg)
+ .addReg(MI.getOperand(6).getReg());
auto &NewMI =
BuildMI(MBB, MI, MI.getDebugLoc(), TII->get(X86::ADD64rm),
MI.getOperand(0).getReg())
``````````
</details>
https://github.com/llvm/llvm-project/pull/136660
_______________________________________________
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
