================ @@ -0,0 +1,18 @@ +//===----------------------------------------------------------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +_CLC_OVERLOAD _CLC_DEF __CLC_GENTYPE __clc_maxmag(__CLC_GENTYPE x, + __CLC_GENTYPE y) { + const __CLC_GENTYPE res = __clc_select( + y, x, + __CLC_CONVERT_BIT_INTN(__clc_isgreater(__clc_fabs(x), __clc_fabs(y)))); + return __clc_select( + res, __clc_fmax(x, y), + __CLC_CONVERT_BIT_INTN(__clc_isnan(x) || __clc_isnan(y) || + __clc_isequal(__clc_fabs(x), __clc_fabs(y)))); ---------------- arsenm wrote:
This seems like a lot more code than is needed. Why the isequal or conversions? This should be 1 fmax, 2 fabs + 2 select? https://github.com/llvm/llvm-project/pull/137982 _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
