================
@@ -45,6 +45,13 @@ class RISCVReg64<RISCVReg32 subreg>
   let SubRegIndices = [sub_32];
 }
 
+def sub_64 : SubRegIndex<64>;
+class RISCVReg128<RISCVReg64 subreg>
+    : RISCVRegWithSubRegs<subreg.HWEncoding{4 -0}, subreg.AsmName, [subreg],
----------------
topperc wrote:

Remove the space in `4 -0`

https://github.com/llvm/llvm-project/pull/139369
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