https://github.com/jthackray created https://github.com/llvm/llvm-project/pull/141743
None >From a76663bd47510c46b7c4415d4b5d97642ce69967 Mon Sep 17 00:00:00 2001 From: Jonathan Thackray <jonathan.thack...@arm.com> Date: Wed, 28 May 2025 11:47:00 +0100 Subject: [PATCH] [NFC][AArch64] Add relnote saying modal FP8 intrinsics now fully implemented by ACLE --- clang/docs/ReleaseNotes.rst | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/clang/docs/ReleaseNotes.rst b/clang/docs/ReleaseNotes.rst index ee74431cf33a7..0e375d72b62b4 100644 --- a/clang/docs/ReleaseNotes.rst +++ b/clang/docs/ReleaseNotes.rst @@ -849,6 +849,10 @@ X86 Support Arm and AArch64 Support ^^^^^^^^^^^^^^^^^^^^^^^ +- Implementation of modal 8-bit floating point intrinsics in accordance with + the Arm C Language Extensions (ACLE) + `as specified here <https://github.com/ARM-software/acle/blob/main/main/acle.md#modal-8-bit-floating-point-extensions>_` + is now available. - Support has been added for the following processors (command-line identifiers in parentheses): - Arm Cortex-A320 (``cortex-a320``) - For ARM targets, cc1as now considers the FPU's features for the selected CPU or Architecture. _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
