https://github.com/s-perron updated
https://github.com/llvm/llvm-project/pull/143412
>From fadeeac5a79cbae0edffbabbe383d7451c254afb Mon Sep 17 00:00:00 2001
From: Steven Perron <stevenper...@google.com>
Date: Mon, 9 Jun 2025 12:53:06 -0400
Subject: [PATCH 1/2] [HLSL][SPIRV] Use resource names
The SPIR-V backend does not have access to the original name of a
resource in the source, so it tries to create a name. This leads to some
problems with reflection.
That is why start to pass the name of the resource from Clang to the
SPIR-V backend.
Fixes #138533
---
clang/lib/CodeGen/CGHLSLRuntime.cpp | 4 +-
llvm/include/llvm/IR/IntrinsicsSPIRV.td | 16 ++--
llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp | 94 +------------------
llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.h | 1 +
.../Target/SPIRV/SPIRVInstructionSelector.cpp | 16 ++--
llvm/lib/Target/SPIRV/SPIRVUtils.cpp | 10 ++
llvm/lib/Target/SPIRV/SPIRVUtils.h | 4 +
.../SPIRV/hlsl-resources/BufferLoad.ll | 8 +-
.../SPIRV/hlsl-resources/BufferLoadStore.ll | 14 +--
.../SPIRV/hlsl-resources/BufferStore.ll | 4 +-
.../CodeGen/SPIRV/hlsl-resources/Packed.ll | 8 +-
.../hlsl-resources/ScalarResourceType.ll | 11 ++-
.../hlsl-resources/StorageImageDynIdx.ll | 6 +-
.../StorageImageNonUniformIdx.ll | 6 +-
.../SPIRV/hlsl-resources/StructuredBuffer.ll | 13 +--
.../SPIRV/hlsl-resources/UnknownBufferLoad.ll | 7 +-
.../hlsl-resources/UnknownBufferStore.ll | 4 +-
.../SPIRV/hlsl-resources/spirv.layout.type.ll | 16 +++-
.../pointers/resource-addrspacecast-2.ll | 6 +-
.../SPIRV/pointers/resource-addrspacecast.ll | 6 +-
.../CodeGen/SPIRV/spirv-explicit-layout.ll | 29 +++---
21 files changed, 117 insertions(+), 166 deletions(-)
diff --git a/clang/lib/CodeGen/CGHLSLRuntime.cpp
b/clang/lib/CodeGen/CGHLSLRuntime.cpp
index 6d267e6164845..d7f73318b3f5a 100644
--- a/clang/lib/CodeGen/CGHLSLRuntime.cpp
+++ b/clang/lib/CodeGen/CGHLSLRuntime.cpp
@@ -243,7 +243,7 @@ CGHLSLRuntime::getCreateHandleFromBindingIntrinsic() {
case llvm::Triple::dxil:
return std::pair(llvm::Intrinsic::dx_resource_handlefrombinding, true);
case llvm::Triple::spirv:
- return std::pair(llvm::Intrinsic::spv_resource_handlefrombinding, false);
+ return std::pair(llvm::Intrinsic::spv_resource_handlefrombinding, true);
default:
llvm_unreachable("Intrinsic resource_handlefrombinding not supported by "
"target architecture");
@@ -258,7 +258,7 @@
CGHLSLRuntime::getCreateHandleFromImplicitBindingIntrinsic() {
true);
case llvm::Triple::spirv:
return std::pair(llvm::Intrinsic::spv_resource_handlefromimplicitbinding,
- false);
+ true);
default:
llvm_unreachable(
"Intrinsic resource_handlefromimplicitbinding not supported by "
diff --git a/llvm/include/llvm/IR/IntrinsicsSPIRV.td
b/llvm/include/llvm/IR/IntrinsicsSPIRV.td
index 8d984d6ce58df..6e6074a0d8582 100644
--- a/llvm/include/llvm/IR/IntrinsicsSPIRV.td
+++ b/llvm/include/llvm/IR/IntrinsicsSPIRV.td
@@ -115,15 +115,15 @@ let TargetPrefix = "spv" in {
// array size of the binding, as well as an index and an indicator
// whether that index may be non-uniform.
def int_spv_resource_handlefrombinding
- : DefaultAttrsIntrinsic<
- [llvm_any_ty],
- [llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i1_ty],
- [IntrNoMem]>;
+ : DefaultAttrsIntrinsic<[llvm_any_ty],
+ [llvm_i32_ty, llvm_i32_ty, llvm_i32_ty,
+ llvm_i32_ty, llvm_i1_ty, llvm_ptr_ty],
+ [IntrNoMem]>;
def int_spv_resource_handlefromimplicitbinding
- : DefaultAttrsIntrinsic<
- [llvm_any_ty],
- [llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i1_ty],
- [IntrNoMem]>;
+ : DefaultAttrsIntrinsic<[llvm_any_ty],
+ [llvm_i32_ty, llvm_i32_ty, llvm_i32_ty,
+ llvm_i32_ty, llvm_i1_ty, llvm_ptr_ty],
+ [IntrNoMem]>;
def int_spv_firstbituhigh :
DefaultAttrsIntrinsic<[LLVMScalarOrSameVectorWidth<0, llvm_i32_ty>],
[llvm_anyint_ty], [IntrNoMem]>;
def int_spv_firstbitshigh :
DefaultAttrsIntrinsic<[LLVMScalarOrSameVectorWidth<0, llvm_i32_ty>],
[llvm_anyint_ty], [IntrNoMem]>;
diff --git a/llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
b/llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
index c5e8269efd25a..292b83e05b56d 100644
--- a/llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
+++ b/llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
@@ -799,107 +799,15 @@ Register SPIRVGlobalRegistry::buildGlobalVariable(
return Reg;
}
-static std::string GetSpirvImageTypeName(const SPIRVType *Type,
- MachineIRBuilder &MIRBuilder,
- const std::string &Prefix,
- SPIRVGlobalRegistry &GR);
-
// Returns a name based on the Type. Notes that this does not look at
// decorations, and will return the same string for two types that are the same
// except for decorations.
-static std::string buildSpirvTypeName(const SPIRVType *Type,
- MachineIRBuilder &MIRBuilder,
- SPIRVGlobalRegistry &GR) {
- switch (Type->getOpcode()) {
- case SPIRV::OpTypeSampledImage: {
- return GetSpirvImageTypeName(Type, MIRBuilder, "sampled_image_", GR);
- }
- case SPIRV::OpTypeImage: {
- return GetSpirvImageTypeName(Type, MIRBuilder, "image_", GR);
- }
- case SPIRV::OpTypeArray: {
- MachineRegisterInfo *MRI = MIRBuilder.getMRI();
- Register ElementTypeReg = Type->getOperand(1).getReg();
- auto *ElementType = MRI->getUniqueVRegDef(ElementTypeReg);
- uint32_t ArraySize = getArrayComponentCount(MRI, Type);
- return (buildSpirvTypeName(ElementType, MIRBuilder, GR) + Twine("[") +
- Twine(ArraySize) + Twine("]"))
- .str();
- }
- case SPIRV::OpTypeFloat:
- return ("f" + Twine(Type->getOperand(1).getImm())).str();
- case SPIRV::OpTypeSampler:
- return ("sampler");
- case SPIRV::OpTypeInt:
- if (Type->getOperand(2).getImm())
- return ("i" + Twine(Type->getOperand(1).getImm())).str();
- return ("u" + Twine(Type->getOperand(1).getImm())).str();
- case SPIRV::OpTypePointer: {
- uint32_t StorageClass = GR.getPointerStorageClass(Type);
- SPIRVType *PointeeType = GR.getPointeeType(Type);
- return ("p_" + Twine(StorageClass) + Twine("_") +
- buildSpirvTypeName(PointeeType, MIRBuilder, GR))
- .str();
- }
- case SPIRV::OpTypeStruct: {
- std::string TypeName = "{";
- for (uint32_t I = 1; I < Type->getNumOperands(); ++I) {
- SPIRVType *MemberType =
- GR.getSPIRVTypeForVReg(Type->getOperand(I).getReg());
- TypeName += '_' + buildSpirvTypeName(MemberType, MIRBuilder, GR);
- }
- return TypeName + "}";
- }
- case SPIRV::OpTypeVector: {
- MachineRegisterInfo *MRI = MIRBuilder.getMRI();
- Register ElementTypeReg = Type->getOperand(1).getReg();
- auto *ElementType = MRI->getUniqueVRegDef(ElementTypeReg);
- uint32_t VectorSize = GR.getScalarOrVectorComponentCount(Type);
- return (buildSpirvTypeName(ElementType, MIRBuilder, GR) + Twine("[") +
- Twine(VectorSize) + Twine("]"))
- .str();
- }
- case SPIRV::OpTypeRuntimeArray: {
- MachineRegisterInfo *MRI = MIRBuilder.getMRI();
- Register ElementTypeReg = Type->getOperand(1).getReg();
- auto *ElementType = MRI->getUniqueVRegDef(ElementTypeReg);
- uint32_t ArraySize = 0;
- return (buildSpirvTypeName(ElementType, MIRBuilder, GR) + Twine("[") +
- Twine(ArraySize) + Twine("]"))
- .str();
- }
- default:
- llvm_unreachable("Trying to the the name of an unknown type.");
- }
-}
-
-static std::string GetSpirvImageTypeName(const SPIRVType *Type,
- MachineIRBuilder &MIRBuilder,
- const std::string &Prefix,
- SPIRVGlobalRegistry &GR) {
- Register SampledTypeReg = Type->getOperand(1).getReg();
- auto *SampledType = MIRBuilder.getMRI()->getUniqueVRegDef(SampledTypeReg);
- std::string TypeName =
- Prefix + buildSpirvTypeName(SampledType, MIRBuilder, GR);
- for (uint32_t I = 2; I < Type->getNumOperands(); ++I) {
- TypeName = (TypeName + '_' + Twine(Type->getOperand(I).getImm())).str();
- }
- return TypeName;
-}
-
Register SPIRVGlobalRegistry::getOrCreateGlobalVariableWithBinding(
- const SPIRVType *VarType, uint32_t Set, uint32_t Binding,
+ const SPIRVType *VarType, uint32_t Set, uint32_t Binding, StringRef Name,
MachineIRBuilder &MIRBuilder) {
Register VarReg =
MIRBuilder.getMRI()->createVirtualRegister(&SPIRV::iIDRegClass);
- // TODO(138533): The name should come from the llvm-ir, but how that name
will
- // be passed from the HLSL to the backend has not been decided. Using this
- // place holder for now.
- std::string Name =
- ("__resource_" + buildSpirvTypeName(VarType, MIRBuilder, *this) + "_" +
- Twine(Set) + "_" + Twine(Binding))
- .str();
buildGlobalVariable(VarReg, VarType, Name, nullptr,
getPointerStorageClass(VarType), nullptr, false, false,
SPIRV::LinkageType::Import, MIRBuilder, false);
diff --git a/llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.h
b/llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.h
index 3b481b3aba0c1..35f616a1981d2 100644
--- a/llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.h
+++ b/llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.h
@@ -548,6 +548,7 @@ class SPIRVGlobalRegistry : public SPIRVIRMapping {
bool IsInstSelector);
Register getOrCreateGlobalVariableWithBinding(const SPIRVType *VarType,
uint32_t Set, uint32_t Binding,
+ StringRef Name,
MachineIRBuilder &MIRBuilder);
// Convenient helpers for getting types with check for duplicates.
diff --git a/llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
b/llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
index 2dae0721886c7..8edd0b533b9fa 100644
--- a/llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
+++ b/llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
@@ -322,7 +322,7 @@ class SPIRVInstructionSelector : public InstructionSelector
{
SPIRV::StorageClass::StorageClass SC,
uint32_t Set, uint32_t Binding,
uint32_t ArraySize, Register IndexReg,
- bool IsNonUniform,
+ bool IsNonUniform, StringRef Name,
MachineIRBuilder MIRBuilder) const;
SPIRVType *widenTypeToVec4(const SPIRVType *Type, MachineInstr &I) const;
bool extractSubvector(Register &ResVReg, const SPIRVType *ResType,
@@ -3380,14 +3380,14 @@ bool
SPIRVInstructionSelector::selectImageWriteIntrinsic(
Register SPIRVInstructionSelector::buildPointerToResource(
const SPIRVType *SpirvResType, SPIRV::StorageClass::StorageClass SC,
uint32_t Set, uint32_t Binding, uint32_t ArraySize, Register IndexReg,
- bool IsNonUniform, MachineIRBuilder MIRBuilder) const {
+ bool IsNonUniform, StringRef Name, MachineIRBuilder MIRBuilder) const {
const Type *ResType = GR.getTypeForSPIRVType(SpirvResType);
if (ArraySize == 1) {
SPIRVType *PtrType =
GR.getOrCreateSPIRVPointerType(ResType, MIRBuilder, SC);
assert(GR.getPointeeType(PtrType) == SpirvResType &&
"SpirvResType did not have an explicit layout.");
- return GR.getOrCreateGlobalVariableWithBinding(PtrType, Set, Binding,
+ return GR.getOrCreateGlobalVariableWithBinding(PtrType, Set, Binding, Name,
MIRBuilder);
}
@@ -3395,7 +3395,7 @@ Register SPIRVInstructionSelector::buildPointerToResource(
SPIRVType *VarPointerType =
GR.getOrCreateSPIRVPointerType(VarType, MIRBuilder, SC);
Register VarReg = GR.getOrCreateGlobalVariableWithBinding(
- VarPointerType, Set, Binding, MIRBuilder);
+ VarPointerType, Set, Binding, Name, MIRBuilder);
SPIRVType *ResPointerType =
GR.getOrCreateSPIRVPointerType(ResType, MIRBuilder, SC);
@@ -4081,6 +4081,9 @@ bool SPIRVInstructionSelector::loadHandleBeforePosition(
uint32_t ArraySize = foldImm(HandleDef.getOperand(4), MRI);
Register IndexReg = HandleDef.getOperand(5).getReg();
bool IsNonUniform = ArraySize > 1 && foldImm(HandleDef.getOperand(6), MRI);
+ std::string Name =
+ getStringValueFromReg(HandleDef.getOperand(7).getReg(), *MRI);
+
bool IsStructuredBuffer = ResType->getOpcode() == SPIRV::OpTypePointer;
MachineIRBuilder MIRBuilder(HandleDef);
SPIRVType *VarType = ResType;
@@ -4091,8 +4094,9 @@ bool SPIRVInstructionSelector::loadHandleBeforePosition(
SC = GR.getPointerStorageClass(ResType);
}
- Register VarReg = buildPointerToResource(VarType, SC, Set, Binding,
ArraySize,
- IndexReg, IsNonUniform, MIRBuilder);
+ Register VarReg =
+ buildPointerToResource(VarType, SC, Set, Binding, ArraySize, IndexReg,
+ IsNonUniform, Name, MIRBuilder);
if (IsNonUniform)
buildOpDecorate(HandleReg, HandleDef, TII,
SPIRV::Decoration::NonUniformEXT,
diff --git a/llvm/lib/Target/SPIRV/SPIRVUtils.cpp
b/llvm/lib/Target/SPIRV/SPIRVUtils.cpp
index 725a7979d3e5b..768efb96a53e9 100644
--- a/llvm/lib/Target/SPIRV/SPIRVUtils.cpp
+++ b/llvm/lib/Target/SPIRV/SPIRVUtils.cpp
@@ -80,6 +80,16 @@ std::string getStringImm(const MachineInstr &MI, unsigned
StartIndex) {
return getSPIRVStringOperand(MI, StartIndex);
}
+std::string getStringValueFromReg(Register Reg, MachineRegisterInfo &MRI) {
+ MachineInstr *Def = getVRegDef(MRI, Reg);
+ assert(Def && Def->getOpcode() == TargetOpcode::G_GLOBAL_VALUE &&
+ "Expected G_GLOBAL_VALUE");
+ const GlobalValue *GV = Def->getOperand(1).getGlobal();
+ Value *V = GV->getOperand(0);
+ const ConstantDataArray *CDA = cast<ConstantDataArray>(V);
+ return CDA->getAsCString().str();
+}
+
void addNumImm(const APInt &Imm, MachineInstrBuilder &MIB) {
const auto Bitwidth = Imm.getBitWidth();
if (Bitwidth == 1)
diff --git a/llvm/lib/Target/SPIRV/SPIRVUtils.h
b/llvm/lib/Target/SPIRV/SPIRVUtils.h
index f14a7d356ea58..d732188f9289f 100644
--- a/llvm/lib/Target/SPIRV/SPIRVUtils.h
+++ b/llvm/lib/Target/SPIRV/SPIRVUtils.h
@@ -125,6 +125,10 @@ void addStringImm(const StringRef &Str, IRBuilder<> &B,
// the reverse of the logic in addStringImm.
std::string getStringImm(const MachineInstr &MI, unsigned StartIndex);
+// Returns the string constant that the register refers to. It is assumed that
+// Reg is a global value that contains a string.
+std::string getStringValueFromReg(Register Reg, MachineRegisterInfo &MRI);
+
// Add the given numerical immediate to MIB.
void addNumImm(const APInt &Imm, MachineInstrBuilder &MIB);
diff --git a/llvm/test/CodeGen/SPIRV/hlsl-resources/BufferLoad.ll
b/llvm/test/CodeGen/SPIRV/hlsl-resources/BufferLoad.ll
index 58252fe297f3e..b14b6af156caf 100644
--- a/llvm/test/CodeGen/SPIRV/hlsl-resources/BufferLoad.ll
+++ b/llvm/test/CodeGen/SPIRV/hlsl-resources/BufferLoad.ll
@@ -1,6 +1,8 @@
; RUN: llc -O0 -verify-machineinstrs -mtriple=spirv-vulkan-library %s -o - |
FileCheck %s
; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv-vulkan-library %s -o -
-filetype=obj | spirv-val %}
+@.str.b0 = private unnamed_addr constant [3 x i8] c"B0\00", align 1
+
; CHECK-NOT: OpCapability StorageImageReadWithoutFormat
; CHECK-DAG: OpDecorate [[IntBufferVar:%[0-9]+]] DescriptorSet 16
@@ -20,7 +22,7 @@ define void @RWBufferLoad_Vec4_I32() #0 {
; CHECK: [[buffer:%[0-9]+]] = OpLoad [[RWBufferTypeInt]] [[IntBufferVar]]
%buffer0 = call target("spirv.Image", i32, 5, 2, 0, 0, 2, 24)
@llvm.spv.resource.handlefrombinding.tspirv.Image_i32_5_2_0_0_2_24(
- i32 16, i32 7, i32 1, i32 0, i1 false)
+ i32 16, i32 7, i32 1, i32 0, i1 false, ptr nonnull @.str.b0)
; CHECK: OpImageRead [[v4_int]] [[buffer]] [[zero]]
%data0 = call <4 x i32> @llvm.spv.resource.load.typedbuffer(
@@ -35,7 +37,7 @@ define void @RWBufferLoad_I32() #0 {
; CHECK: [[buffer:%[0-9]+]] = OpLoad [[RWBufferTypeInt]] [[IntBufferVar]]
%buffer1 = call target("spirv.Image", i32, 5, 2, 0, 0, 2, 24)
@llvm.spv.resource.handlefrombinding.tspirv.Image_i32_5_2_0_0_2_24(
- i32 16, i32 7, i32 1, i32 0, i1 false)
+ i32 16, i32 7, i32 1, i32 0, i1 false, ptr nonnull @.str.b0)
; CHECK: [[V:%[0-9]+]] = OpImageRead [[v4_int]] [[buffer]] [[zero]]
; CHECK: OpCompositeExtract [[int]] [[V]] 0
@@ -51,7 +53,7 @@ define void @RWBufferLoad_Vec2_I32() #0 {
; CHECK: [[buffer:%[0-9]+]] = OpLoad [[RWBufferTypeInt]] [[IntBufferVar]]
%buffer0 = call target("spirv.Image", i32, 5, 2, 0, 0, 2, 24)
@llvm.spv.resource.handlefrombinding.tspirv.Image_i32_5_2_0_0_2_24(
- i32 16, i32 7, i32 1, i32 0, i1 false)
+ i32 16, i32 7, i32 1, i32 0, i1 false, ptr nonnull @.str.b0)
; CHECK: [[V:%[0-9]+]] = OpImageRead [[v4_int]] [[buffer]] [[zero]]
; CHECK: [[e0:%[0-9]+]] = OpCompositeExtract [[int]] [[V]] 0
diff --git a/llvm/test/CodeGen/SPIRV/hlsl-resources/BufferLoadStore.ll
b/llvm/test/CodeGen/SPIRV/hlsl-resources/BufferLoadStore.ll
index d810ef9ccecc4..22fb4c3e78dcc 100644
--- a/llvm/test/CodeGen/SPIRV/hlsl-resources/BufferLoadStore.ll
+++ b/llvm/test/CodeGen/SPIRV/hlsl-resources/BufferLoadStore.ll
@@ -1,6 +1,8 @@
; RUN: llc -O0 -verify-machineinstrs -mtriple=spirv-vulkan-library %s -o - |
FileCheck %s
; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv-vulkan-library %s -o -
-filetype=obj | spirv-val %}
+@.str.b0 = private unnamed_addr constant [3 x i8] c"B0\00", align 1
+
; CHECK-DAG: [[float:%[0-9]+]] = OpTypeFloat 32
; CHECK-DAG: [[v2float:%[0-9]+]] = OpTypeVector [[float]] 2
; CHECK-DAG: [[v4float:%[0-9]+]] = OpTypeVector [[float]] 4
@@ -18,7 +20,7 @@
define void @main_scalar() local_unnamed_addr #0 {
entry:
; CHECK: [[H:%[0-9]+]] = OpLoad [[ImageType]] [[Var]]
- %s_h.i = tail call target("spirv.Image", float, 5, 2, 0, 0, 2, 1)
@llvm.spv.resource.handlefrombinding.tspirv.Image_f32_5_2_0_0_2_0t(i32 3, i32
5, i32 1, i32 0, i1 false)
+ %s_h.i = tail call target("spirv.Image", float, 5, 2, 0, 0, 2, 1)
@llvm.spv.resource.handlefrombinding.tspirv.Image_f32_5_2_0_0_2_0t(i32 3, i32
5, i32 1, i32 0, i1 false, ptr nonnull @.str.b0)
; CHECK: [[R:%[0-9]+]] = OpImageRead [[v4float]] [[H]] [[one]]
; CHECK: [[V:%[0-9]+]] = OpCompositeExtract [[float]] [[R]] 0
@@ -57,7 +59,7 @@ bb_both:
define void @main_vector2() local_unnamed_addr #0 {
entry:
; CHECK: [[H:%[0-9]+]] = OpLoad [[ImageType]] [[Var]]
- %s_h.i = tail call target("spirv.Image", float, 5, 2, 0, 0, 2, 1)
@llvm.spv.resource.handlefrombinding.tspirv.Image_f32_5_2_0_0_2_0t(i32 3, i32
5, i32 1, i32 0, i1 false)
+ %s_h.i = tail call target("spirv.Image", float, 5, 2, 0, 0, 2, 1)
@llvm.spv.resource.handlefrombinding.tspirv.Image_f32_5_2_0_0_2_0t(i32 3, i32
5, i32 1, i32 0, i1 false, ptr nonnull @.str.b0)
; CHECK: [[R:%[0-9]+]] = OpImageRead [[v4float]] [[H]] [[one]]
; CHECK: [[E0:%[0-9]+]] = OpCompositeExtract [[float]] [[R]] 0
@@ -100,7 +102,7 @@ bb_both:
define void @main_vector4() local_unnamed_addr #0 {
entry:
; CHECK: [[H:%[0-9]+]] = OpLoad [[ImageType]] [[Var]]
- %s_h.i = tail call target("spirv.Image", float, 5, 2, 0, 0, 2, 1)
@llvm.spv.resource.handlefrombinding.tspirv.Image_f32_5_2_0_0_2_0t(i32 3, i32
5, i32 1, i32 0, i1 false)
+ %s_h.i = tail call target("spirv.Image", float, 5, 2, 0, 0, 2, 1)
@llvm.spv.resource.handlefrombinding.tspirv.Image_f32_5_2_0_0_2_0t(i32 3, i32
5, i32 1, i32 0, i1 false, ptr nonnull @.str.b0)
; CHECK: [[R:%[0-9]+]] = OpImageRead [[v4float]] [[H]] [[one]]
%0 = tail call noundef nonnull align 4 dereferenceable(4) ptr
@llvm.spv.resource.getpointer.p0.tspirv.Image_f32_5_2_0_0_2_0t(target("spirv.Image",
float, 5, 2, 0, 0, 2, 1) %s_h.i, i32 1)
@@ -132,11 +134,5 @@ bb_both:
ret void
}
-; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn
memory(none)
-declare ptr
@llvm.spv.resource.getpointer.p0.tspirv.Image_f32_5_2_0_0_2_0t(target("spirv.Image",
float, 5, 2, 0, 0, 2, 1), i32) #1
-
-; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn
memory(none)
-declare target("spirv.Image", float, 5, 2, 0, 0, 2, 1)
@llvm.spv.resource.handlefrombinding.tspirv.Image_f32_5_2_0_0_2_0t(i32, i32,
i32, i32, i1) #1
-
attributes #0 = { mustprogress nofree noinline norecurse nosync nounwind
willreturn memory(readwrite, inaccessiblemem: none) "frame-pointer"="all"
"hlsl.numthreads"="1,1,1" "hlsl.shader"="compute" "no-trapping-math"="true"
"stack-protector-buffer-size"="8" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn
memory(none) }
diff --git a/llvm/test/CodeGen/SPIRV/hlsl-resources/BufferStore.ll
b/llvm/test/CodeGen/SPIRV/hlsl-resources/BufferStore.ll
index 812e20e45565b..ee976f1a4110e 100644
--- a/llvm/test/CodeGen/SPIRV/hlsl-resources/BufferStore.ll
+++ b/llvm/test/CodeGen/SPIRV/hlsl-resources/BufferStore.ll
@@ -1,6 +1,8 @@
; RUN: llc -O3 -verify-machineinstrs -mtriple=spirv-vulkan-library %s -o - |
FileCheck %s
; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv-vulkan-library %s -o -
-filetype=obj | spirv-val %}
+@.str.b = private unnamed_addr constant [2 x i8] c"B\00", align 1
+
; CHECK-NOT: OpCapability StorageImageReadWithoutFormat
; CHECK-DAG: OpDecorate [[IntBufferVar:%[0-9]+]] DescriptorSet 16
@@ -22,7 +24,7 @@ declare <4 x i32> @get_data() #1
define void @RWBufferStore_Vec4_I32() #0 {
%buffer0 = call target("spirv.Image", i32, 5, 2, 0, 0, 2, 24)
@llvm.spv.resource.handlefrombinding.tspirv.Image_i32_5_2_0_0_2_24(
- i32 16, i32 7, i32 1, i32 0, i1 false)
+ i32 16, i32 7, i32 1, i32 0, i1 false, ptr nonnull @.str.b)
; CHECK: [[data:%[0-9]+]] = OpFunctionCall
%data = call <4 x i32> @get_data()
diff --git a/llvm/test/CodeGen/SPIRV/hlsl-resources/Packed.ll
b/llvm/test/CodeGen/SPIRV/hlsl-resources/Packed.ll
index d5f6545180147..5e9d88fd9af0e 100644
--- a/llvm/test/CodeGen/SPIRV/hlsl-resources/Packed.ll
+++ b/llvm/test/CodeGen/SPIRV/hlsl-resources/Packed.ll
@@ -3,6 +3,10 @@
target datalayout =
"e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-n8:16:32:64-G1"
+
+@.str.unpacked = private unnamed_addr constant [12 x i8] c"UnpackedRes\00",
align 1
+@.str.packed = private unnamed_addr constant [10 x i8] c"PackedRes\00", align 1
+
; CHECK-DAG: OpName [[unpacked:%[0-9]+]] "unpacked"
; CHECK-DAG: OpName [[packed:%[0-9]+]] "packed"
@@ -22,7 +26,7 @@ target datalayout =
"e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:
define external i32 @unpacked_vulkan_buffer_load() {
entry:
- %handle = tail call target("spirv.VulkanBuffer", [0 x %unpacked], 12, 0)
@llvm.spv.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false)
+ %handle = tail call target("spirv.VulkanBuffer", [0 x %unpacked], 12, 0)
@llvm.spv.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr
nonnull @.str.unpacked)
%0 = tail call noundef nonnull align 4 dereferenceable(4) ptr addrspace(11)
@llvm.spv.resource.getpointer(target("spirv.VulkanBuffer", [0 x %unpacked], 12,
0) %handle, i32 1)
%1 = load i32, ptr addrspace(11) %0, align 4
ret i32 %1
@@ -30,7 +34,7 @@ entry:
define external i32 @packed_vulkan_buffer_load() {
entry:
- %handle = tail call target("spirv.VulkanBuffer", [0 x %packed], 12, 0)
@llvm.spv.resource.handlefrombinding(i32 0, i32 1, i32 1, i32 0, i1 false)
+ %handle = tail call target("spirv.VulkanBuffer", [0 x %packed], 12, 0)
@llvm.spv.resource.handlefrombinding(i32 0, i32 1, i32 1, i32 0, i1 false, ptr
nonnull @.str.packed)
%0 = tail call noundef nonnull align 4 dereferenceable(4) ptr addrspace(11)
@llvm.spv.resource.getpointer(target("spirv.VulkanBuffer", [0 x %packed], 12,
0) %handle, i32 1)
%1 = load i32, ptr addrspace(11) %0, align 4
ret i32 %1
diff --git a/llvm/test/CodeGen/SPIRV/hlsl-resources/ScalarResourceType.ll
b/llvm/test/CodeGen/SPIRV/hlsl-resources/ScalarResourceType.ll
index f52fd44bf3801..03b41ae0df31f 100644
--- a/llvm/test/CodeGen/SPIRV/hlsl-resources/ScalarResourceType.ll
+++ b/llvm/test/CodeGen/SPIRV/hlsl-resources/ScalarResourceType.ll
@@ -1,6 +1,9 @@
; RUN: llc -O0 -verify-machineinstrs -mtriple=spirv-vulkan-library %s -o - |
FileCheck %s
; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv-vulkan-library %s -o -
-filetype=obj | spirv-val %}
+@.str.int_buf = private unnamed_addr constant [7 x i8] c"IntBuf\00", align 1
+@.str.float_buf = private unnamed_addr constant [9 x i8] c"FloatBuf\00", align
1
+
; CHECK-DAG: OpDecorate [[IntBufferVar:%[0-9]+]] DescriptorSet 16
; CHECK-DAG: OpDecorate [[IntBufferVar]] Binding 7
; CHECK-DAG: OpDecorate [[FloatBufferVar:%[0-9]+]] DescriptorSet 16
@@ -21,7 +24,7 @@ define void @RWBufferLoad() #0 {
; CHECK: [[buffer:%[0-9]+]] = OpLoad [[RWBufferTypeInt]] [[IntBufferVar]]
%buffer0 = call target("spirv.Image", i32, 5, 2, 0, 0, 2, 24)
@llvm.spv.resource.handlefrombinding.tspirv.Image_f32_5_2_0_0_2_24(
- i32 16, i32 7, i32 1, i32 0, i1 false)
+ i32 16, i32 7, i32 1, i32 0, i1 false, ptr nonnull @.str.int_buf)
%ptr0 = tail call noundef nonnull align 4 dereferenceable(4) ptr
@llvm.spv.resource.getpointer.p0.tspirv.Image_f32_5_2_0_0_2_0t(target("spirv.Image",
i32, 5, 2, 0, 0, 2, 24) %buffer0, i32 0)
store i32 0, ptr %ptr0, align 4
@@ -29,7 +32,7 @@ define void @RWBufferLoad() #0 {
; CHECK: [[buffer:%[0-9]+]] = OpLoad [[RWBufferTypeInt]] [[IntBufferVar]]
%buffer1 = call target("spirv.Image", i32, 5, 2, 0, 0, 2, 24)
@llvm.spv.resource.handlefrombinding.tspirv.Image_f32_5_2_0_0_2_24(
- i32 16, i32 7, i32 1, i32 0, i1 false)
+ i32 16, i32 7, i32 1, i32 0, i1 false, ptr nonnull @.str.int_buf)
%ptr1 = tail call noundef nonnull align 4 dereferenceable(4) ptr
@llvm.spv.resource.getpointer.p0.tspirv.Image_f32_5_2_0_0_2_0t(target("spirv.Image",
i32, 5, 2, 0, 0, 2, 24) %buffer1, i32 0)
store i32 0, ptr %ptr1, align 4
ret void
@@ -43,7 +46,7 @@ define void @UseDifferentGlobalVar() #0 {
; CHECK: [[buffer:%[0-9]+]] = OpLoad [[RWBufferTypeFloat]] [[FloatBufferVar]]
%buffer0 = call target("spirv.Image", float, 5, 2, 0, 0, 2, 3)
@llvm.spv.resource.handlefrombinding.tspirv.Image_f32_5_2_0_0_2_3(
- i32 16, i32 7, i32 1, i32 0, i1 false)
+ i32 16, i32 7, i32 1, i32 0, i1 false, ptr nonnull @.str.float_buf )
%ptr0 = tail call noundef nonnull align 4 dereferenceable(4) ptr
@llvm.spv.resource.getpointer.p0.tspirv.Image_f32_5_2_0_0_2_0t(target("spirv.Image",
float, 5, 2, 0, 0, 2, 3) %buffer0, i32 0)
store float 0.0, ptr %ptr0, align 4
ret void
@@ -57,7 +60,7 @@ define void @ReuseGlobalVarFromFirstFunction() #0 {
; CHECK: [[buffer:%[0-9]+]] = OpLoad [[RWBufferTypeInt]] [[IntBufferVar]]
%buffer1 = call target("spirv.Image", i32, 5, 2, 0, 0, 2, 24)
@llvm.spv.resource.handlefrombinding.tspirv.Image_f32_5_2_0_0_2_24(
- i32 16, i32 7, i32 1, i32 0, i1 false)
+ i32 16, i32 7, i32 1, i32 0, i1 false, ptr nonnull @.str.int_buf)
%ptr1 = tail call noundef nonnull align 4 dereferenceable(4) ptr
@llvm.spv.resource.getpointer.p0.tspirv.Image_f32_5_2_0_0_2_0t(target("spirv.Image",
i32, 5, 2, 0, 0, 2, 24) %buffer1, i32 0)
store i32 0, ptr %ptr1, align 4
ret void
diff --git a/llvm/test/CodeGen/SPIRV/hlsl-resources/StorageImageDynIdx.ll
b/llvm/test/CodeGen/SPIRV/hlsl-resources/StorageImageDynIdx.ll
index 6a6d810e6babd..236c5e4ea56a5 100644
--- a/llvm/test/CodeGen/SPIRV/hlsl-resources/StorageImageDynIdx.ll
+++ b/llvm/test/CodeGen/SPIRV/hlsl-resources/StorageImageDynIdx.ll
@@ -1,6 +1,8 @@
; RUN: llc -O0 -verify-machineinstrs -mtriple=spirv1.5-vulkan-library %s -o -
| FileCheck %s
; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv1.5-vulkan-library %s -o -
-filetype=obj | spirv-val %}
+@.str.b0 = private unnamed_addr constant [3 x i8] c"B0\00", align 1
+
; CHECK-DAG: OpCapability Shader
; CHECK-DAG: OpCapability StorageImageArrayDynamicIndexing
; CHECK-DAG: OpCapability Image1D
@@ -26,7 +28,7 @@ define void @main() #0 {
; CHECK: [[buffer:%[0-9]+]] = OpLoad [[BufferType]] [[ac]]
%buffer0 = call target("spirv.Image", i32, 0, 2, 0, 0, 2, 24)
@llvm.spv.resource.handlefrombinding.tspirv.Image_f32_0_2_0_0_2_24(
- i32 3, i32 4, i32 3, i32 0, i1 false)
+ i32 3, i32 4, i32 3, i32 0, i1 false, ptr nonnull @.str.b0)
%ptr0 = tail call noundef nonnull align 4 dereferenceable(4) ptr
@llvm.spv.resource.getpointer.p0.tspirv.Image_f32_5_2_0_0_2_0t(target("spirv.Image",
i32, 0, 2, 0, 0, 2, 24) %buffer0, i32 0)
store i32 0, ptr %ptr0, align 4
@@ -34,7 +36,7 @@ define void @main() #0 {
; CHECK: [[buffer:%[0-9]+]] = OpLoad [[BufferType]] [[ac]]
%buffer1 = call target("spirv.Image", i32, 0, 2, 0, 0, 2, 24)
@llvm.spv.resource.handlefrombinding.tspirv.Image_f32_0_2_0_0_2_24(
- i32 3, i32 4, i32 3, i32 1, i1 false)
+ i32 3, i32 4, i32 3, i32 1, i1 false, ptr nonnull @.str.b0)
%ptr1 = tail call noundef nonnull align 4 dereferenceable(4) ptr
@llvm.spv.resource.getpointer.p0.tspirv.Image_f32_5_2_0_0_2_0t(target("spirv.Image",
i32, 0, 2, 0, 0, 2, 24) %buffer1, i32 0)
store i32 0, ptr %ptr1, align 4
ret void
diff --git
a/llvm/test/CodeGen/SPIRV/hlsl-resources/StorageImageNonUniformIdx.ll
b/llvm/test/CodeGen/SPIRV/hlsl-resources/StorageImageNonUniformIdx.ll
index 16f3724d5d10a..5693f797c798e 100644
--- a/llvm/test/CodeGen/SPIRV/hlsl-resources/StorageImageNonUniformIdx.ll
+++ b/llvm/test/CodeGen/SPIRV/hlsl-resources/StorageImageNonUniformIdx.ll
@@ -1,6 +1,8 @@
; RUN: llc -O0 -verify-machineinstrs -mtriple=spirv1.5-vulkan-library %s -o -
| FileCheck %s
; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv1.5-vulkan-library %s -o -
-filetype=obj | spirv-val %}
+@.str.b0 = private unnamed_addr constant [3 x i8] c"B0\00", align 1
+
; CHECK-DAG: OpCapability Shader
; CHECK-DAG: OpCapability ShaderNonUniformEXT
; CHECK-DAG: OpCapability StorageImageArrayNonUniformIndexing
@@ -33,7 +35,7 @@ define void @main() #0 {
; CHECK: [[ld0]] = OpLoad [[BufferType]] [[ac0]]
%buffer0 = call target("spirv.Image", i32, 0, 2, 0, 0, 2, 24)
@llvm.spv.resource.handlefrombinding.tspirv.Image_f32_0_2_0_0_2_24(
- i32 3, i32 4, i32 3, i32 0, i1 true)
+ i32 3, i32 4, i32 3, i32 0, i1 true, ptr nonnull @.str.b0)
%ptr0 = tail call noundef nonnull align 4 dereferenceable(4) ptr
@llvm.spv.resource.getpointer.p0.tspirv.Image_f32_5_2_0_0_2_0t(target("spirv.Image",
i32, 0, 2, 0, 0, 2, 24) %buffer0, i32 0)
store i32 0, ptr %ptr0, align 4
@@ -41,7 +43,7 @@ define void @main() #0 {
; CHECK: [[ld1]] = OpLoad [[BufferType]] [[ac1]]
%buffer1 = call target("spirv.Image", i32, 0, 2, 0, 0, 2, 24)
@llvm.spv.resource.handlefrombinding.tspirv.Image_f32_0_2_0_0_2_24(
- i32 3, i32 4, i32 3, i32 1, i1 true)
+ i32 3, i32 4, i32 3, i32 1, i1 true, ptr nonnull @.str.b0)
%ptr1 = tail call noundef nonnull align 4 dereferenceable(4) ptr
@llvm.spv.resource.getpointer.p0.tspirv.Image_f32_5_2_0_0_2_0t(target("spirv.Image",
i32, 0, 2, 0, 0, 2, 24) %buffer1, i32 0)
store i32 0, ptr %ptr1, align 4
ret void
diff --git a/llvm/test/CodeGen/SPIRV/hlsl-resources/StructuredBuffer.ll
b/llvm/test/CodeGen/SPIRV/hlsl-resources/StructuredBuffer.ll
index f539fdefa3fa2..e47685cd38a2a 100644
--- a/llvm/test/CodeGen/SPIRV/hlsl-resources/StructuredBuffer.ll
+++ b/llvm/test/CodeGen/SPIRV/hlsl-resources/StructuredBuffer.ll
@@ -3,11 +3,8 @@
target datalayout =
"e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-n8:16:32:64-G1"
-; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn
memory(none)
-declare target("spirv.VulkanBuffer", [0 x i32], 12, 0)
@llvm.spv.resource.handlefrombinding.tspirv.VulkanBuffer_a0i32_12_0t(i32, i32,
i32, i32, i1) #0
-
-; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn
memory(none)
-declare target("spirv.VulkanBuffer", [0 x i32], 12, 1)
@llvm.spv.resource.handlefrombinding.tspirv.VulkanBuffer_a0i32_12_1t(i32, i32,
i32, i32, i1) #0
+@.str.b = private unnamed_addr constant [2 x i8] c"B\00", align 1
+@.str.rwb = private unnamed_addr constant [4 x i8] c"RWB\00", align 1
; CHECK: OpDecorate [[BufferVar:%.+]] DescriptorSet 0
; CHECK: OpDecorate [[BufferVar]] Binding 0
@@ -40,9 +37,9 @@ entry:
; CHECK-DAG: [[BufferHandle:%.+]] = OpCopyObject [[BufferPtrType]]
[[BufferVar]]
; CHECK-DAG: [[BufferHandle2:%.+]] = OpCopyObject [[BufferPtrType]]
[[BufferVar]]
; CHECK-DAG: [[RWBufferHandle:%.+]] = OpCopyObject [[RWBufferPtrType]]
[[RWBufferVar]]
- %BufferHandle = tail call target("spirv.VulkanBuffer", [0 x i32], 12, 0)
@llvm.spv.resource.handlefrombinding.tspirv.VulkanBuffer_a0i32_12_0t(i32 0, i32
0, i32 1, i32 0, i1 false)
- %BufferHandle2 = tail call target("spirv.VulkanBuffer", [0 x i32], 12, 0)
@llvm.spv.resource.handlefrombinding.tspirv.VulkanBuffer_a0i32_12_0t(i32 0, i32
0, i32 1, i32 0, i1 false)
- %RWBufferHandle = tail call target("spirv.VulkanBuffer", [0 x i32], 12, 1)
@llvm.spv.resource.handlefrombinding.tspirv.VulkanBuffer_a0i32_12_1t(i32 0, i32
1, i32 1, i32 0, i1 false)
+ %BufferHandle = tail call target("spirv.VulkanBuffer", [0 x i32], 12, 0)
@llvm.spv.resource.handlefrombinding.tspirv.VulkanBuffer_a0i32_12_0t(i32 0, i32
0, i32 1, i32 0, i1 false, ptr nonnull @.str.b)
+ %BufferHandle2 = tail call target("spirv.VulkanBuffer", [0 x i32], 12, 0)
@llvm.spv.resource.handlefrombinding.tspirv.VulkanBuffer_a0i32_12_0t(i32 0, i32
0, i32 1, i32 0, i1 false, ptr nonnull @.str.b)
+ %RWBufferHandle = tail call target("spirv.VulkanBuffer", [0 x i32], 12, 1)
@llvm.spv.resource.handlefrombinding.tspirv.VulkanBuffer_a0i32_12_1t(i32 0, i32
1, i32 1, i32 0, i1 false, ptr nonnull @.str.rwb)
; CHECK: [[AC:%.+]] = OpAccessChain {{.*}} [[BufferHandle]] [[zero]] [[one]]
%0 = tail call noundef nonnull align 4 dereferenceable(4) ptr addrspace(11)
@llvm.spv.resource.getpointer.p11.tspirv.VulkanBuffer_a0i32_12_0t(target("spirv.VulkanBuffer",
[0 x i32], 12, 0) %BufferHandle, i32 1)
diff --git a/llvm/test/CodeGen/SPIRV/hlsl-resources/UnknownBufferLoad.ll
b/llvm/test/CodeGen/SPIRV/hlsl-resources/UnknownBufferLoad.ll
index 4ec8605f68137..704665d7e52ea 100644
--- a/llvm/test/CodeGen/SPIRV/hlsl-resources/UnknownBufferLoad.ll
+++ b/llvm/test/CodeGen/SPIRV/hlsl-resources/UnknownBufferLoad.ll
@@ -1,8 +1,11 @@
; RUN: llc -O0 -verify-machineinstrs -mtriple=spirv1.6-vulkan1.3-library %s -o
- | FileCheck %s
; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv1.6-vulkan1.3-library %s -o -
-filetype=obj | spirv-val %}
+@.str = private unnamed_addr constant [4 x i8] c"Buf\00", align 1
+
; CHECK: OpCapability StorageImageReadWithoutFormat
-; CHECK-DAG: OpDecorate [[IntBufferVar:%[0-9]+]] DescriptorSet 16
+; CHECK: OpName [[IntBufferVar:%[0-9]+]] "Buf"
+; CHECK-DAG: OpDecorate [[IntBufferVar]] DescriptorSet 16
; CHECK-DAG: OpDecorate [[IntBufferVar]] Binding 7
; CHECK-DAG: [[int:%[0-9]+]] = OpTypeInt 32 0
@@ -18,7 +21,7 @@ define void @RWBufferLoad_Vec4_I32() #0 {
; CHECK: [[buffer:%[0-9]+]] = OpLoad [[RWBufferTypeInt]] [[IntBufferVar]]
%buffer0 = call target("spirv.Image", i32, 5, 2, 0, 0, 2, 0)
@llvm.spv.resource.handlefrombinding.tspirv.Image_f32_5_2_0_0_2_0(
- i32 16, i32 7, i32 1, i32 0, i1 false)
+ i32 16, i32 7, i32 1, i32 0, i1 false, ptr nonnull @.str)
; CHECK: OpImageRead [[v4_int]] [[buffer]] [[zero]]
%data0 = call <4 x i32> @llvm.spv.resource.load.typedbuffer(
diff --git a/llvm/test/CodeGen/SPIRV/hlsl-resources/UnknownBufferStore.ll
b/llvm/test/CodeGen/SPIRV/hlsl-resources/UnknownBufferStore.ll
index a4123c36a4488..27ae6a03797c3 100644
--- a/llvm/test/CodeGen/SPIRV/hlsl-resources/UnknownBufferStore.ll
+++ b/llvm/test/CodeGen/SPIRV/hlsl-resources/UnknownBufferStore.ll
@@ -1,6 +1,8 @@
; RUN: llc -O0 -verify-machineinstrs -mtriple=spirv1.6-vulkan1.3-library %s -o
- | FileCheck %s
; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv1.6-vulkan1.3-library %s -o -
-filetype=obj | spirv-val %}
+@.str.b = private unnamed_addr constant [2 x i8] c"B\00", align 1
+
; CHECK: OpCapability StorageImageWriteWithoutFormat
; CHECK-DAG: OpDecorate [[IntBufferVar:%[0-9]+]] DescriptorSet 16
; CHECK-DAG: OpDecorate [[IntBufferVar]] Binding 7
@@ -20,7 +22,7 @@ declare <4 x i32> @get_data() #1
define void @RWBufferLoad_Vec4_I32() #0 {
%buffer0 = call target("spirv.Image", i32, 5, 2, 0, 0, 2, 0)
@llvm.spv.resource.handlefrombinding.tspirv.Image_f32_5_2_0_0_2_0(
- i32 16, i32 7, i32 1, i32 0, i1 false)
+ i32 16, i32 7, i32 1, i32 0, i1 false, ptr nonnull @.str.b)
; CHECK: [[data:%[0-9]+]] = OpFunctionCall
%data = call <4 x i32> @get_data()
diff --git a/llvm/test/CodeGen/SPIRV/hlsl-resources/spirv.layout.type.ll
b/llvm/test/CodeGen/SPIRV/hlsl-resources/spirv.layout.type.ll
index 14c98b2fd55a5..064251a57dfc6 100644
--- a/llvm/test/CodeGen/SPIRV/hlsl-resources/spirv.layout.type.ll
+++ b/llvm/test/CodeGen/SPIRV/hlsl-resources/spirv.layout.type.ll
@@ -3,6 +3,12 @@
target datalayout =
"e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-n8:16:32:64-G10"
+@.str.b0 = private unnamed_addr constant [3 x i8] c"B0\00", align 1
+@.str.b1 = private unnamed_addr constant [3 x i8] c"B1\00", align 1
+@.str.b2 = private unnamed_addr constant [3 x i8] c"B2\00", align 1
+@.str.b3 = private unnamed_addr constant [3 x i8] c"B3\00", align 1
+@.str.b4 = private unnamed_addr constant [3 x i8] c"B4\00", align 1
+
; CHECK-DAG: OpName [[standard_layout:%[0-9]+]] "standard_layout"
; CHECK-DAG: OpMemberDecorate [[standard_layout]] 0 Offset 0
; CHECK-DAG: OpMemberDecorate [[standard_layout]] 1 Offset 4
@@ -33,11 +39,11 @@ target datalayout =
"e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:
define void @main() local_unnamed_addr #1 {
entry:
- %standard_handle = tail call target("spirv.VulkanBuffer",
target("spirv.Layout", %standard_layout, 8, 0, 4), 2, 0)
@llvm.spv.resource.handlefrombinding.tspirv.VulkanBuffer_tspirv.Layout_s___cblayout_Bs_8_0_4t_2_0t(i32
0, i32 1, i32 1, i32 0, i1 false)
- %standard_handle_with_different_offset = tail call
target("spirv.VulkanBuffer", target("spirv.Layout", %standard_layout, 12, 0,
8), 2, 0)
@llvm.spv.resource.handlefrombinding.tspirv.VulkanBuffer_tspirv.Layout_s___cblayout_Bs_8_0_4t_2_0t(i32
0, i32 1, i32 1, i32 0, i1 false)
- %backwards_handle = tail call target("spirv.VulkanBuffer",
target("spirv.Layout", %backwards_layout, 8, 4, 0), 2, 0)
@llvm.spv.resource.handlefrombinding.tspirv.VulkanBuffer_tspirv.Layout_s___cblayout_Bs_8_0_4t_2_0t(i32
0, i32 1, i32 1, i32 0, i1 false)
- %large_gap_handle = tail call target("spirv.VulkanBuffer",
target("spirv.Layout", %large_gap, 1024, 0, 64, 1020, 4), 2, 0)
@llvm.spv.resource.handlefrombinding.tspirv.VulkanBuffer_tspirv.Layout_s___cblayout_Bs_8_0_4t_2_0t(i32
0, i32 1, i32 1, i32 0, i1 false)
- %mixed_handle = tail call target("spirv.VulkanBuffer",
target("spirv.Layout", %mixed_layout, 16, 0, 8, 4, 12), 2, 0)
@llvm.spv.resource.handlefrombinding.tspirv.VulkanBuffer_tspirv.Layout_s___cblayout_Bs_8_0_4t_2_0t(i32
0, i32 1, i32 1, i32 0, i1 false)
+ %standard_handle = tail call target("spirv.VulkanBuffer",
target("spirv.Layout", %standard_layout, 8, 0, 4), 2, 0)
@llvm.spv.resource.handlefrombinding.tspirv.VulkanBuffer_tspirv.Layout_s___cblayout_Bs_8_0_4t_2_0t(i32
0, i32 1, i32 1, i32 0, i1 false, ptr nonnull @.str.b0)
+ %standard_handle_with_different_offset = tail call
target("spirv.VulkanBuffer", target("spirv.Layout", %standard_layout, 12, 0,
8), 2, 0)
@llvm.spv.resource.handlefrombinding.tspirv.VulkanBuffer_tspirv.Layout_s___cblayout_Bs_8_0_4t_2_0t(i32
0, i32 1, i32 1, i32 0, i1 false, ptr nonnull @.str.b1)
+ %backwards_handle = tail call target("spirv.VulkanBuffer",
target("spirv.Layout", %backwards_layout, 8, 4, 0), 2, 0)
@llvm.spv.resource.handlefrombinding.tspirv.VulkanBuffer_tspirv.Layout_s___cblayout_Bs_8_0_4t_2_0t(i32
0, i32 1, i32 1, i32 0, i1 false, ptr nonnull @.str.b2)
+ %large_gap_handle = tail call target("spirv.VulkanBuffer",
target("spirv.Layout", %large_gap, 1024, 0, 64, 1020, 4), 2, 0)
@llvm.spv.resource.handlefrombinding.tspirv.VulkanBuffer_tspirv.Layout_s___cblayout_Bs_8_0_4t_2_0t(i32
0, i32 1, i32 1, i32 0, i1 false, ptr nonnull @.str.b3)
+ %mixed_handle = tail call target("spirv.VulkanBuffer",
target("spirv.Layout", %mixed_layout, 16, 0, 8, 4, 12), 2, 0)
@llvm.spv.resource.handlefrombinding.tspirv.VulkanBuffer_tspirv.Layout_s___cblayout_Bs_8_0_4t_2_0t(i32
0, i32 1, i32 1, i32 0, i1 false, ptr nonnull @.str.b4)
ret void
}
diff --git a/llvm/test/CodeGen/SPIRV/pointers/resource-addrspacecast-2.ll
b/llvm/test/CodeGen/SPIRV/pointers/resource-addrspacecast-2.ll
index d608529b421cc..d87c175c36916 100644
--- a/llvm/test/CodeGen/SPIRV/pointers/resource-addrspacecast-2.ll
+++ b/llvm/test/CodeGen/SPIRV/pointers/resource-addrspacecast-2.ll
@@ -1,6 +1,8 @@
; RUN: llc -verify-machineinstrs -O3 -mtriple=spirv-unknown-vulkan1.3-compute
%s -o - | FileCheck %s --match-full-lines
; RUN: %if spirv-tools %{ llc -O3 -mtriple=spirv-unknown-vulkan1.3-compute %s
-o - -filetype=obj | spirv-val %}
+@.str = private unnamed_addr constant [3 x i8] c"B0\00", align 1
+
%S2 = type { { [10 x { i32, i32 } ] }, i32 }
; CHECK-DAG: %[[#uint:]] = OpTypeInt 32 0
@@ -21,11 +23,9 @@
; CHECK-DAG: %[[#rarr_struct:]] = OpTypeStruct %[[#rarr]]
; CHECK-DAG: %[[#spirv_VulkanBuffer:]] = OpTypePointer StorageBuffer
%[[#rarr_struct]]
-declare target("spirv.VulkanBuffer", [0 x %S2], 12, 1)
@llvm.spv.resource.handlefrombinding.tspirv.VulkanBuffer_a0s_Ss_12_1t(i32, i32,
i32, i32, i1)
-
define void @main() "hlsl.numthreads"="1,1,1" "hlsl.shader"="compute" {
entry:
- %handle = tail call target("spirv.VulkanBuffer", [0 x %S2], 12, 1)
@llvm.spv.resource.handlefrombinding.tspirv.VulkanBuffer_a0s_Ss_12_1t(i32 0,
i32 0, i32 1, i32 0, i1 false)
+ %handle = tail call target("spirv.VulkanBuffer", [0 x %S2], 12, 1)
@llvm.spv.resource.handlefrombinding.tspirv.VulkanBuffer_a0s_Ss_12_1t(i32 0,
i32 0, i32 1, i32 0, i1 false, ptr nonnull @.str)
; CHECK: %[[#resource:]] = OpVariable %[[#spirv_VulkanBuffer]]
StorageBuffer
%ptr = tail call noundef align 4 dereferenceable(4) ptr addrspace(11)
@llvm.spv.resource.getpointer.p11.tspirv.VulkanBuffer_a0s_Ss_12_1t(target("spirv.VulkanBuffer",
[0 x %S2], 12, 1) %handle, i32 0)
diff --git a/llvm/test/CodeGen/SPIRV/pointers/resource-addrspacecast.ll
b/llvm/test/CodeGen/SPIRV/pointers/resource-addrspacecast.ll
index b1446b7529ea4..5a469a4515b79 100644
--- a/llvm/test/CodeGen/SPIRV/pointers/resource-addrspacecast.ll
+++ b/llvm/test/CodeGen/SPIRV/pointers/resource-addrspacecast.ll
@@ -1,6 +1,8 @@
; RUN: llc -verify-machineinstrs -O3 -mtriple=spirv-unknown-vulkan1.3-compute
%s -o - | FileCheck %s
; RUN: %if spirv-tools %{ llc -O3 -mtriple=spirv-unknown-vulkan1.3-compute %s
-o - -filetype=obj | spirv-val %}
+@.str = private unnamed_addr constant [3 x i8] c"B0\00", align 1
+
%struct.S = type { i32 }
; CHECK-DAG: %[[#uint:]] = OpTypeInt 32 0
@@ -13,11 +15,9 @@
; CHECK-DAG: %[[#rarr_struct:]] = OpTypeStruct %[[#rarr]]
; CHECK-DAG: %[[#spirv_VulkanBuffer:]] = OpTypePointer StorageBuffer
%[[#rarr_struct]]
-declare target("spirv.VulkanBuffer", [0 x %struct.S], 12, 1)
@llvm.spv.resource.handlefrombinding.tspirv.VulkanBuffer_a0s_struct.Ss_12_1t(i32,
i32, i32, i32, i1)
-
define void @main() "hlsl.numthreads"="1,1,1" "hlsl.shader"="compute" {
entry:
- %handle = tail call target("spirv.VulkanBuffer", [0 x %struct.S], 12, 1)
@llvm.spv.resource.handlefrombinding.tspirv.VulkanBuffer_a0s_struct.Ss_12_1t(i32
0, i32 0, i32 1, i32 0, i1 false)
+ %handle = tail call target("spirv.VulkanBuffer", [0 x %struct.S], 12, 1)
@llvm.spv.resource.handlefrombinding.tspirv.VulkanBuffer_a0s_struct.Ss_12_1t(i32
0, i32 0, i32 1, i32 0, i1 false, ptr nonnull @.str)
; CHECK: %[[#resource:]] = OpVariable %[[#spirv_VulkanBuffer]]
StorageBuffer
%ptr = tail call noundef align 4 dereferenceable(4) ptr addrspace(11)
@llvm.spv.resource.getpointer.p11.tspirv.VulkanBuffer_a0s_struct.Ss_12_1t(target("spirv.VulkanBuffer",
[0 x %struct.S], 12, 1) %handle, i32 0)
diff --git a/llvm/test/CodeGen/SPIRV/spirv-explicit-layout.ll
b/llvm/test/CodeGen/SPIRV/spirv-explicit-layout.ll
index 7303471c9929c..4cc07c249be93 100644
--- a/llvm/test/CodeGen/SPIRV/spirv-explicit-layout.ll
+++ b/llvm/test/CodeGen/SPIRV/spirv-explicit-layout.ll
@@ -3,9 +3,14 @@
target datalayout =
"e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-n8:16:32:64-G1"
-; CHECK-DAG: OpName [[ScalarBlock_var:%[0-9]+]] "__resource_p_12_{_u32[0]}_0_0"
-; CHECK-DAG: OpName [[buffer_var:%[0-9]+]]
"__resource_p_12_{_{_{_u32_f32[3]}[10]}[0]}_0_0"
-; CHECK-DAG: OpName [[array_buffer_var:%[0-9]+]]
"__resource_p_12_{_{_{_u32_f32[3]}[10]}[0]}[10]_0_0"
+@.str.scalarblock = private unnamed_addr constant [12 x i8] c"ScalarBlock\00",
align 1
+@.str.buffervar = private unnamed_addr constant [10 x i8] c"BufferVar\00",
align 1
+@.str.arraybuffervar = private unnamed_addr constant [15 x i8]
c"ArrayBufferVar\00", align 1
+
+
+; CHECK-DAG: OpName [[ScalarBlock_var:%[0-9]+]] "ScalarBlock"
+; CHECK-DAG: OpName [[buffer_var:%[0-9]+]] "BufferVar"
+; CHECK-DAG: OpName [[array_buffer_var:%[0-9]+]] "ArrayBufferVar"
; CHECK-DAG: OpMemberDecorate [[ScalarBlock:%[0-9]+]] 0 Offset 0
; CHECK-DAG: OpDecorate [[ScalarBlock]] Block
@@ -63,8 +68,8 @@ target datalayout =
"e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:
define external i32 @scalar_vulkan_buffer_load() {
; CHECK-NEXT: OpLabel
entry:
-; CHECK-NEXT: [[handle:%[0-9]+]] = OpCopyObject [[ScalarBlock_ptr]]
[[ScalarBlock_var]]
- %handle = tail call target("spirv.VulkanBuffer", [0 x i32], 12, 0)
@llvm.spv.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false)
+; CHECK: [[handle:%[0-9]+]] = OpCopyObject [[ScalarBlock_ptr]]
[[ScalarBlock_var]]
+ %handle = tail call target("spirv.VulkanBuffer", [0 x i32], 12, 0)
@llvm.spv.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr
nonnull @.str.scalarblock)
; CHECK-NEXT: [[ptr:%[0-9]+]] = OpAccessChain [[storagebuffer_int_ptr]]
[[handle]] [[zero]] [[one]]
%0 = tail call noundef nonnull align 4 dereferenceable(4) ptr addrspace(11)
@llvm.spv.resource.getpointer(target("spirv.VulkanBuffer", [0 x i32], 12, 0)
%handle, i32 1)
@@ -83,7 +88,7 @@ define external %struct.S @private_load() {
; CHECK-NEXT: OpLabel
entry:
-; CHECK-NEXT: [[ld:%[0-9]+]] = OpLoad [[S]] [[private_var]] Aligned 4
+; CHECK: [[ld:%[0-9]+]] = OpLoad [[S]] [[private_var]] Aligned 4
%1 = load %struct.S, ptr addrspace(10) @private, align 4
; CHECK-NEXT: OpReturnValue [[ld]]
@@ -97,7 +102,7 @@ define external %struct.S @storage_buffer_load() {
; CHECK-NEXT: OpLabel
entry:
-; CHECK-NEXT: [[ld:%[0-9]+]] = OpLoad [[S_explicit]] [[storage_buffer]]
Aligned 4
+; CHECK: [[ld:%[0-9]+]] = OpLoad [[S_explicit]] [[storage_buffer]] Aligned 4
; CHECK-NEXT: [[copy:%[0-9]+]] = OpCopyLogical [[S]] [[ld]]
%1 = load %struct.S, ptr addrspace(11) @storage_buffer, align 4
@@ -111,8 +116,8 @@ entry:
define external %struct.S @vulkan_buffer_load() {
; CHECK-NEXT: OpLabel
entry:
-; CHECK-NEXT: [[handle:%[0-9]+]] = OpCopyObject [[buffer_ptr]] [[buffer_var]]
- %handle = tail call target("spirv.VulkanBuffer", [0 x %struct.S], 12, 0)
@llvm.spv.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false)
+; CHECK: [[handle:%[0-9]+]] = OpCopyObject [[buffer_ptr]] [[buffer_var]]
+ %handle = tail call target("spirv.VulkanBuffer", [0 x %struct.S], 12, 0)
@llvm.spv.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false, ptr
nonnull @.str.buffervar)
; CHECK-NEXT: [[ptr:%[0-9]+]] = OpAccessChain [[storagebuffer_S_ptr]]
[[handle]] [[zero]] [[one]]
%0 = tail call noundef nonnull align 4 dereferenceable(4) ptr addrspace(11)
@llvm.spv.resource.getpointer(target("spirv.VulkanBuffer", [0 x %struct.S], 12,
0) %handle, i32 1)
@@ -131,9 +136,9 @@ entry:
define external %struct.S @array_of_vulkan_buffers_load() {
; CHECK-NEXT: OpLabel
entry:
-; CHECK-NEXT: [[h:%[0-9]+]] = OpAccessChain [[buffer_ptr]]
[[array_buffer_var]] [[one]]
-; CHECK-NEXT: [[handle:%[0-9]+]] = OpCopyObject [[buffer_ptr]] [[h]]
- %handle = tail call target("spirv.VulkanBuffer", [0 x %struct.S], 12, 0)
@llvm.spv.resource.handlefrombinding(i32 0, i32 0, i32 10, i32 1, i1 false)
+; CHECK: [[h:%[0-9]+]] = OpAccessChain [[buffer_ptr]] [[array_buffer_var]]
[[one]]
+; CHECK: [[handle:%[0-9]+]] = OpCopyObject [[buffer_ptr]] [[h]]
+ %handle = tail call target("spirv.VulkanBuffer", [0 x %struct.S], 12, 0)
@llvm.spv.resource.handlefrombinding(i32 0, i32 0, i32 10, i32 1, i1 false, ptr
nonnull @.str.arraybuffervar)
; CHECK-NEXT: [[ptr:%[0-9]+]] = OpAccessChain [[storagebuffer_S_ptr]]
[[handle]] [[zero]] [[one]]
%0 = tail call noundef nonnull align 4 dereferenceable(4) ptr addrspace(11)
@llvm.spv.resource.getpointer(target("spirv.VulkanBuffer", [0 x %struct.S], 12,
0) %handle, i32 1)
>From 462abe1cd721d30b3881be097b9c15bf67da3fd2 Mon Sep 17 00:00:00 2001
From: Steven Perron <stevenper...@google.com>
Date: Wed, 11 Jun 2025 09:54:13 -0400
Subject: [PATCH 2/2] Remove option of generating without a name.
---
clang/lib/CodeGen/CGHLSLBuiltins.cpp | 17 +++++-----
clang/lib/CodeGen/CGHLSLRuntime.cpp | 49 +++++-----------------------
clang/lib/CodeGen/CGHLSLRuntime.h | 13 +++-----
3 files changed, 20 insertions(+), 59 deletions(-)
diff --git a/clang/lib/CodeGen/CGHLSLBuiltins.cpp
b/clang/lib/CodeGen/CGHLSLBuiltins.cpp
index 10dd9fd04eb9e..ad568fbebdd62 100644
--- a/clang/lib/CodeGen/CGHLSLBuiltins.cpp
+++ b/clang/lib/CodeGen/CGHLSLBuiltins.cpp
@@ -295,17 +295,16 @@ Value *CodeGenFunction::EmitHLSLBuiltinExpr(unsigned
BuiltinID,
Value *SpaceOp = EmitScalarExpr(E->getArg(2));
Value *RangeOp = EmitScalarExpr(E->getArg(3));
Value *IndexOp = EmitScalarExpr(E->getArg(4));
+ Value *Name = EmitScalarExpr(E->getArg(5));
// FIXME: NonUniformResourceIndex bit is not yet implemented
// (llvm/llvm-project#135452)
Value *NonUniform =
llvm::ConstantInt::get(llvm::Type::getInt1Ty(getLLVMContext()), false);
- auto [IntrinsicID, HasNameArg] =
+ llvm::Intrinsic::ID IntrinsicID =
CGM.getHLSLRuntime().getCreateHandleFromBindingIntrinsic();
- SmallVector<Value *> Args{SpaceOp, RegisterOp, RangeOp, IndexOp,
- NonUniform};
- if (HasNameArg)
- Args.push_back(EmitScalarExpr(E->getArg(5)));
+ SmallVector<Value *> Args{SpaceOp, RegisterOp, RangeOp,
+ IndexOp, NonUniform, Name};
return Builder.CreateIntrinsic(HandleTy, IntrinsicID, Args);
}
case Builtin::BI__builtin_hlsl_resource_handlefromimplicitbinding: {
@@ -314,16 +313,16 @@ Value *CodeGenFunction::EmitHLSLBuiltinExpr(unsigned
BuiltinID,
Value *RangeOp = EmitScalarExpr(E->getArg(2));
Value *IndexOp = EmitScalarExpr(E->getArg(3));
Value *OrderID = EmitScalarExpr(E->getArg(4));
+ Value *Name = EmitScalarExpr(E->getArg(5));
// FIXME: NonUniformResourceIndex bit is not yet implemented
// (llvm/llvm-project#135452)
Value *NonUniform =
llvm::ConstantInt::get(llvm::Type::getInt1Ty(getLLVMContext()), false);
- auto [IntrinsicID, HasNameArg] =
+ llvm::Intrinsic::ID IntrinsicID =
CGM.getHLSLRuntime().getCreateHandleFromImplicitBindingIntrinsic();
- SmallVector<Value *> Args{OrderID, SpaceOp, RangeOp, IndexOp, NonUniform};
- if (HasNameArg)
- Args.push_back(EmitScalarExpr(E->getArg(5)));
+ SmallVector<Value *> Args{OrderID, SpaceOp, RangeOp,
+ IndexOp, NonUniform, Name};
return Builder.CreateIntrinsic(HandleTy, IntrinsicID, Args);
}
case Builtin::BI__builtin_hlsl_all: {
diff --git a/clang/lib/CodeGen/CGHLSLRuntime.cpp
b/clang/lib/CodeGen/CGHLSLRuntime.cpp
index d7f73318b3f5a..e428443b9a8e5 100644
--- a/clang/lib/CodeGen/CGHLSLRuntime.cpp
+++ b/clang/lib/CodeGen/CGHLSLRuntime.cpp
@@ -237,35 +237,6 @@ static void fillPackoffsetLayout(const HLSLBufferDecl
*BufDecl,
}
}
-std::pair<llvm::Intrinsic::ID, bool>
-CGHLSLRuntime::getCreateHandleFromBindingIntrinsic() {
- switch (getArch()) {
- case llvm::Triple::dxil:
- return std::pair(llvm::Intrinsic::dx_resource_handlefrombinding, true);
- case llvm::Triple::spirv:
- return std::pair(llvm::Intrinsic::spv_resource_handlefrombinding, true);
- default:
- llvm_unreachable("Intrinsic resource_handlefrombinding not supported by "
- "target architecture");
- }
-}
-
-std::pair<llvm::Intrinsic::ID, bool>
-CGHLSLRuntime::getCreateHandleFromImplicitBindingIntrinsic() {
- switch (getArch()) {
- case llvm::Triple::dxil:
- return std::pair(llvm::Intrinsic::dx_resource_handlefromimplicitbinding,
- true);
- case llvm::Triple::spirv:
- return std::pair(llvm::Intrinsic::spv_resource_handlefromimplicitbinding,
- true);
- default:
- llvm_unreachable(
- "Intrinsic resource_handlefromimplicitbinding not supported by "
- "target architecture");
- }
-}
-
// Codegen for HLSLBufferDecl
void CGHLSLRuntime::addBuffer(const HLSLBufferDecl *BufDecl) {
@@ -595,31 +566,27 @@ void CGHLSLRuntime::initializeBufferFromBinding(const
HLSLBufferDecl *BufDecl,
llvm::ConstantInt::get(CGM.IntTy, RBA ? RBA->getSpaceNumber() : 0);
Value *Name = nullptr;
- auto [IntrinsicID, HasNameArg] =
+ llvm::Intrinsic::ID IntrinsicID =
RBA->hasRegisterSlot()
? CGM.getHLSLRuntime().getCreateHandleFromBindingIntrinsic()
: CGM.getHLSLRuntime().getCreateHandleFromImplicitBindingIntrinsic();
- if (HasNameArg) {
- std::string Str(BufDecl->getName());
- std::string GlobalName(Str + ".str");
- Name = CGM.GetAddrOfConstantCString(Str, GlobalName.c_str()).getPointer();
- }
+ std::string Str(BufDecl->getName());
+ std::string GlobalName(Str + ".str");
+ Name = CGM.GetAddrOfConstantCString(Str, GlobalName.c_str()).getPointer();
// buffer with explicit binding
if (RBA->hasRegisterSlot()) {
auto *RegSlot = llvm::ConstantInt::get(CGM.IntTy, RBA->getSlotNumber());
- SmallVector<Value *> Args{Space, RegSlot, RangeSize, Index, NonUniform};
- if (Name)
- Args.push_back(Name);
+ SmallVector<Value *> Args{Space, RegSlot, RangeSize,
+ Index, NonUniform, Name};
initializeBuffer(CGM, GV, IntrinsicID, Args);
} else {
// buffer with implicit binding
auto *OrderID =
llvm::ConstantInt::get(CGM.IntTy, RBA->getImplicitBindingOrderID());
- SmallVector<Value *> Args{OrderID, Space, RangeSize, Index, NonUniform};
- if (Name)
- Args.push_back(Name);
+ SmallVector<Value *> Args{OrderID, Space, RangeSize,
+ Index, NonUniform, Name};
initializeBuffer(CGM, GV, IntrinsicID, Args);
}
}
diff --git a/clang/lib/CodeGen/CGHLSLRuntime.h
b/clang/lib/CodeGen/CGHLSLRuntime.h
index f7ca2077a576b..a86743f384811 100644
--- a/clang/lib/CodeGen/CGHLSLRuntime.h
+++ b/clang/lib/CodeGen/CGHLSLRuntime.h
@@ -117,6 +117,10 @@ class CGHLSLRuntime {
GENERATE_HLSL_INTRINSIC_FUNCTION(CreateResourceGetPointer,
resource_getpointer)
+ GENERATE_HLSL_INTRINSIC_FUNCTION(CreateHandleFromBinding,
+ resource_handlefrombinding)
+ GENERATE_HLSL_INTRINSIC_FUNCTION(CreateHandleFromImplicitBinding,
+ resource_handlefromimplicitbinding)
GENERATE_HLSL_INTRINSIC_FUNCTION(BufferUpdateCounter, resource_updatecounter)
GENERATE_HLSL_INTRINSIC_FUNCTION(GroupMemoryBarrierWithGroupSync,
group_memory_barrier_with_group_sync)
@@ -125,15 +129,6 @@ class CGHLSLRuntime {
// End of reserved area for HLSL intrinsic getters.
//===----------------------------------------------------------------------===//
- // Returns ID of the intrinsic that initializes resource handle from binding
- // and a bool value indicating whether the last argument of the intrinsic is
- // the resource name (not all targets need that).
- std::pair<llvm::Intrinsic::ID, bool> getCreateHandleFromBindingIntrinsic();
-
- // Same as above but for implicit binding.
- std::pair<llvm::Intrinsic::ID, bool>
- getCreateHandleFromImplicitBindingIntrinsic();
-
protected:
CodeGenModule &CGM;
_______________________________________________
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
