https://github.com/phoebewang created https://github.com/llvm/llvm-project/pull/144662
SDM doesn't list any hybrid processors in this feature. Besides, physical machine also reports not supported. >From 353fbfc93faa2c1bad26261b566d3f797b6d1a72 Mon Sep 17 00:00:00 2001 From: "Wang, Phoebe" <phoebe.w...@intel.com> Date: Wed, 18 Jun 2025 16:04:22 +0800 Subject: [PATCH] [X86] Remove CLDEMOTE from Alderlake and later hybrid processors SDM doesn't list any hybrid processors in this feature. Besides, physical machine also reports not supported. --- clang/test/Preprocessor/predefined-arch-macros.c | 4 ++-- llvm/lib/Target/X86/X86.td | 2 +- llvm/lib/TargetParser/X86TargetParser.cpp | 6 +++--- 3 files changed, 6 insertions(+), 6 deletions(-) diff --git a/clang/test/Preprocessor/predefined-arch-macros.c b/clang/test/Preprocessor/predefined-arch-macros.c index 2d17891071aae..9dfeddbd4d5ac 100644 --- a/clang/test/Preprocessor/predefined-arch-macros.c +++ b/clang/test/Preprocessor/predefined-arch-macros.c @@ -2102,7 +2102,7 @@ // CHECK_ADL_M32: #define __AVX__ 1 // CHECK_ADL_M32: #define __BMI2__ 1 // CHECK_ADL_M32: #define __BMI__ 1 -// CHECK_ADL_M32: #define __CLDEMOTE__ 1 +// CHECK_ADL_M32-NOT: #define __CLDEMOTE__ 1 // CHECK_ADL_M32: #define __CLFLUSHOPT__ 1 // CHECK_ADL_M32: #define __CLWB__ 1 // CHECK_ADL_M32: #define __F16C__ 1 @@ -2173,7 +2173,7 @@ // CHECK_ADL_M64: #define __AVX__ 1 // CHECK_ADL_M64: #define __BMI2__ 1 // CHECK_ADL_M64: #define __BMI__ 1 -// CHECK_ADL_M64: #define __CLDEMOTE__ 1 +// CHECK_ADL_M64-NOT: #define __CLDEMOTE__ 1 // CHECK_ADL_M64: #define __CLFLUSHOPT__ 1 // CHECK_ADL_M64: #define __CLWB__ 1 // CHECK_ADL_M64: #define __F16C__ 1 diff --git a/llvm/lib/Target/X86/X86.td b/llvm/lib/Target/X86/X86.td index 2d635835e3ff7..b09891652ad99 100644 --- a/llvm/lib/Target/X86/X86.td +++ b/llvm/lib/Target/X86/X86.td @@ -1284,7 +1284,6 @@ def ProcessorFeatures { FeatureAVXVNNI, FeaturePKU, FeatureHRESET, - FeatureCLDEMOTE, FeatureMOVDIRI, FeatureMOVDIR64B, FeatureWAITPKG]; @@ -1311,6 +1310,7 @@ def ProcessorFeatures { FeatureAVXNECONVERT, FeatureENQCMD, FeatureUINTR, + FeatureCLDEMOTE, FeatureAVXVNNIINT8]; list<SubtargetFeature> SRFFeatures = !listconcat(ADLFeatures, SRFAdditionalFeatures); diff --git a/llvm/lib/TargetParser/X86TargetParser.cpp b/llvm/lib/TargetParser/X86TargetParser.cpp index 21d05ee389e64..4947b05cd0370 100644 --- a/llvm/lib/TargetParser/X86TargetParser.cpp +++ b/llvm/lib/TargetParser/X86TargetParser.cpp @@ -165,11 +165,11 @@ constexpr FeatureBitset FeaturesAlderlake = FeaturesTremont | FeatureADX | FeatureBMI | FeatureBMI2 | FeatureF16C | FeatureFMA | FeatureINVPCID | FeatureLZCNT | FeaturePCONFIG | FeaturePKU | FeatureSERIALIZE | FeatureSHSTK | FeatureVAES | FeatureVPCLMULQDQ | - FeatureCLDEMOTE | FeatureMOVDIR64B | FeatureMOVDIRI | FeatureWAITPKG | - FeatureAVXVNNI | FeatureHRESET | FeatureWIDEKL; + FeatureMOVDIR64B | FeatureMOVDIRI | FeatureWAITPKG | FeatureAVXVNNI | + FeatureHRESET | FeatureWIDEKL; constexpr FeatureBitset FeaturesSierraforest = FeaturesAlderlake | FeatureCMPCCXADD | FeatureAVXIFMA | FeatureUINTR | - FeatureENQCMD | FeatureAVXNECONVERT | FeatureAVXVNNIINT8; + FeatureCLDEMOTE | FeatureENQCMD | FeatureAVXNECONVERT | FeatureAVXVNNIINT8; constexpr FeatureBitset FeaturesArrowlakeS = FeaturesSierraforest | FeatureAVXVNNIINT16 | FeatureSHA512 | FeatureSM3 | FeatureSM4; constexpr FeatureBitset FeaturesPantherlake = _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits