[clang] [llvm] [RISCV] Added the MIPS prefetch extensions for MIPS RV64 P8700. (PR #145647)

[via cfe-commits]

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@@ -535,6 +535,19 @@ static DecodeStatus decodeRTZArg(MCInst &Inst, uint32_t 
Imm, int64_t Address,
   Inst.addOperand(MCOperand::createImm(Imm));
   return MCDisassembler::Success;
 }
+template <int Bits>
+static DecodeStatus DecodeSImm(MCInst &Inst, uint64_t Imm, uint64_t Address,
+                               const MCDisassembler *Decoder) {
+  if (Imm & ~((1LL << Bits) - 1))
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ukalappa-mips wrote:

N/A

https://github.com/llvm/llvm-project/pull/145647
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