llvmbot wrote:

<!--LLVM PR SUMMARY COMMENT-->

@llvm/pr-subscribers-clang

Author: Venkata Ramanaiah Nalamothu (RamNalamothu)

<details>
<summary>Changes</summary>

Fix typo in shadow call stack option name mentioned in 'ShadowCallStack.rst'.

---
Full diff: https://github.com/llvm/llvm-project/pull/151474.diff


1 Files Affected:

- (modified) clang/docs/ShadowCallStack.rst (+1-1) 


``````````diff
diff --git a/clang/docs/ShadowCallStack.rst b/clang/docs/ShadowCallStack.rst
index fc8bea83e1145..9b104cc3b7180 100644
--- a/clang/docs/ShadowCallStack.rst
+++ b/clang/docs/ShadowCallStack.rst
@@ -61,7 +61,7 @@ The instrumentation makes use of the platform register 
``x18`` on AArch64,
 ``x3`` (``gp``) on RISC-V with software shadow stack and ``ssp`` on RISC-V with
 hardware shadow stack, which needs `Zicfiss`_ and ``-fcf-protection=return``.
 Users can choose between the software and hardware based shadow stack
-implementation on RISC-V backend by passing ``-fsanitize=shadowcallstack``
+implementation on RISC-V backend by passing ``-fsanitize=shadow-call-stack``
 or ``Zicfiss`` with ``-fcf-protection=return``.
 For simplicity we will refer to this as the ``SCSReg``. On some platforms,
 ``SCSReg`` is reserved, and on others, it is designated as a scratch register.

``````````

</details>


https://github.com/llvm/llvm-project/pull/151474
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