https://github.com/DanilaZhebryakov updated
https://github.com/llvm/llvm-project/pull/150194
>From 041ff9880939fddcd9a36009d32b234e8d4acc5b Mon Sep 17 00:00:00 2001
From: Danila Zhebryakov <d.zhebrya...@yandex.ru>
Date: Wed, 23 Jul 2025 12:04:17 +0300
Subject: [PATCH 1/3] [PowerPC] fix bug affecting float to int32 conversion on
some PowerPC CPUs
---
llvm/lib/Target/PowerPC/PPCISelLowering.cpp | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
index 459525ed4ee9a..3974d726620b7 100644
--- a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
+++ b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
@@ -8457,10 +8457,10 @@ void PPCTargetLowering::LowerFP_TO_INTForReuse(SDValue
Op, ReuseLoadInfo &RLI,
// Result is a load from the stack slot. If loading 4 bytes, make sure to
// add in a bias on big endian.
- if (Op.getValueType() == MVT::i32 && !i32Stack) {
+ if (Op.getValueType() == MVT::i32 && !i32Stack &&
!Subtarget.isLittleEndian()) {
FIPtr = DAG.getNode(ISD::ADD, dl, FIPtr.getValueType(), FIPtr,
DAG.getConstant(4, dl, FIPtr.getValueType()));
- MPI = MPI.getWithOffset(Subtarget.isLittleEndian() ? 0 : 4);
+ MPI = MPI.getWithOffset(4);
}
RLI.Chain = Chain;
>From e6d776fe8e1dfdc6e9aa092124300ac69e74e950 Mon Sep 17 00:00:00 2001
From: Danila Zhebryakov <d.zhebrya...@yandex.ru>
Date: Mon, 4 Aug 2025 14:38:44 +0300
Subject: [PATCH 2/3] [PowerPC] Add regression test for the previous commit
---
llvm/test/CodeGen/PowerPC/fp_to_uint_endian.ll | 18 ++++++++++++++++++
1 file changed, 18 insertions(+)
create mode 100644 llvm/test/CodeGen/PowerPC/fp_to_uint_endian.ll
diff --git a/llvm/test/CodeGen/PowerPC/fp_to_uint_endian.ll
b/llvm/test/CodeGen/PowerPC/fp_to_uint_endian.ll
new file mode 100644
index 0000000000000..9a272af8795b8
--- /dev/null
+++ b/llvm/test/CodeGen/PowerPC/fp_to_uint_endian.ll
@@ -0,0 +1,18 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
UTC_ARGS: --version 5
+; RUN: llc -verify-machineinstrs < %s -mcpu=440
-mtriple=ppc32le-unknown-unknown | FileCheck %s -check-prefix=CHECK
-check-prefix=CHECK-LE
+; RUN: llc -verify-machineinstrs < %s -mcpu=440 -mtriple=ppc32-unknown-unknown
| FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-BE
+
+define i32 @foo(double %a) {
+; CHECK-LABEL: foo:
+; CHECK-DAG: fctiwz [[FPR_1_i:[0-9]+]], {{[0-9]+}}
+; CHECK-DAG: stfd [[FPR_1_i]], [[#%u,VAL1_ADDR:]](1)
+; CHECK-LE-DAG: lwz {{[0-9]+}}, [[#%u,== VAL1_ADDR]](1)
+; CHECK-BE-DAG: lwz {{[0-9]+}}, [[#%u,== VAL1_ADDR + 4]](1)
+; CHECK-DAG: fctiwz [[FPR_2:[0-9]+]], {{[0-9]+}}
+; CHECK-DAG: stfd [[FPR_2]], [[#%u,VAL2_ADDR:]](1)
+; CHECK-LE-DAG: lwz {{[0-9]+}}, [[#%u,== VAL2_ADDR]](1)
+; CHECK-BE-DAG: lwz {{[0-9]+}}, [[#%u,== VAL2_ADDR + 4]](1)
+entry:
+ %tmp.1 = fptoui double %a to i32 ; <i32> [#uses=1]
+ ret i32 %tmp.1
+}
>From 6b96adba7503e4fb05c7c5f82283deb46beccb1e Mon Sep 17 00:00:00 2001
From: Danila Zhebryakov <d.zhebrya...@yandex.ru>
Date: Fri, 8 Aug 2025 14:16:30 +0300
Subject: [PATCH 3/3] [PowerPC] fix float ABI selection on ppcle
---
clang/lib/CodeGen/CodeGenModule.cpp | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/clang/lib/CodeGen/CodeGenModule.cpp
b/clang/lib/CodeGen/CodeGenModule.cpp
index 236cc3d9e8907..d59a262a6cb63 100644
--- a/clang/lib/CodeGen/CodeGenModule.cpp
+++ b/clang/lib/CodeGen/CodeGenModule.cpp
@@ -188,7 +188,8 @@ createTargetCodeGenInfo(CodeGenModule &CGM) {
return createPPC32TargetCodeGenInfo(CGM, IsSoftFloat);
}
case llvm::Triple::ppcle: {
- bool IsSoftFloat = CodeGenOpts.FloatABI == "soft";
+ bool IsSoftFloat =
+ CodeGenOpts.FloatABI == "soft" || Target.hasFeature("spe");
return createPPC32TargetCodeGenInfo(CGM, IsSoftFloat);
}
case llvm::Triple::ppc64:
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