https://github.com/AditiRM updated
https://github.com/llvm/llvm-project/pull/144874
>From 8e287c19723361b0141c7bf9d1de34b145b9782c Mon Sep 17 00:00:00 2001
From: Aditi-Medhane <aditi.medh...@ibm.com>
Date: Thu, 19 Jun 2025 11:04:12 +0000
Subject: [PATCH 1/7] [PowerPC] Add BCDCOPYSIGN and BCDSETSIGN Instruction
Support
---
clang/include/clang/Basic/BuiltinsPPC.def | 4 ++
clang/lib/Basic/Targets/PPC.cpp | 2 +
clang/lib/Sema/SemaPPC.cpp | 2 +
.../CodeGen/PowerPC/builtins-bcd-helpers.c | 29 ++++++++++++++
llvm/include/llvm/IR/IntrinsicsPowerPC.td | 8 ++++
llvm/lib/Target/PowerPC/PPCInstrAltivec.td | 6 ++-
.../CodeGen/PowerPC/builtins-bcd-helpers.ll | 40 +++++++++++++++++++
7 files changed, 89 insertions(+), 2 deletions(-)
create mode 100644 clang/test/CodeGen/PowerPC/builtins-bcd-helpers.c
create mode 100644 llvm/test/CodeGen/PowerPC/builtins-bcd-helpers.ll
diff --git a/clang/include/clang/Basic/BuiltinsPPC.def
b/clang/include/clang/Basic/BuiltinsPPC.def
index bb7d54bbb793e..c3825822ce0b8 100644
--- a/clang/include/clang/Basic/BuiltinsPPC.def
+++ b/clang/include/clang/Basic/BuiltinsPPC.def
@@ -515,6 +515,10 @@ TARGET_BUILTIN(__builtin_altivec_vctzh, "V8UsV8Us", "",
"power9-vector")
TARGET_BUILTIN(__builtin_altivec_vctzw, "V4UiV4Ui", "", "power9-vector")
TARGET_BUILTIN(__builtin_altivec_vctzd, "V2ULLiV2ULLi", "", "power9-vector")
+//P9 BCD builtins
+TARGET_BUILTIN(__builtin_ppc_bcdcopysign, "V16UcV16UcV16Uc", "",
"power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdsetsign, "V16UcV16UcUc", "t", "power9-vector")
+
// P7 BCD builtins.
TARGET_BUILTIN(__builtin_cdtbcd, "UiUi", "", "isa-v206-instructions")
TARGET_BUILTIN(__builtin_cbcdtd, "UiUi", "", "isa-v206-instructions")
diff --git a/clang/lib/Basic/Targets/PPC.cpp b/clang/lib/Basic/Targets/PPC.cpp
index e6ef0ecc526ba..876348c29b707 100644
--- a/clang/lib/Basic/Targets/PPC.cpp
+++ b/clang/lib/Basic/Targets/PPC.cpp
@@ -88,6 +88,8 @@ bool
PPCTargetInfo::handleTargetFeatures(std::vector<std::string> &Features,
}
static void defineXLCompatMacros(MacroBuilder &Builder) {
+ Builder.defineMacro("__builtin_bcdcopysign", "__builtin_ppc_bcdcopysign");
+ Builder.defineMacro("__builtin_bcdsetsign", "__builtin_ppc_bcdsetsign");
Builder.defineMacro("__cdtbcd", "__builtin_ppc_cdtbcd");
Builder.defineMacro("__cbcdtd", "__builtin_ppc_cbcdtd");
Builder.defineMacro("__addg6s", "__builtin_ppc_addg6s");
diff --git a/clang/lib/Sema/SemaPPC.cpp b/clang/lib/Sema/SemaPPC.cpp
index 9b4d82745f881..71673062044af 100644
--- a/clang/lib/Sema/SemaPPC.cpp
+++ b/clang/lib/Sema/SemaPPC.cpp
@@ -106,6 +106,8 @@ bool SemaPPC::CheckPPCBuiltinFunctionCall(const TargetInfo
&TI,
switch (BuiltinID) {
default:
return false;
+ case PPC::BI__builtin_ppc_bcdsetsign:
+ return SemaRef.BuiltinConstantArgRange(TheCall, 1, 0, 1);
case PPC::BI__builtin_altivec_crypto_vshasigmaw:
case PPC::BI__builtin_altivec_crypto_vshasigmad:
return SemaRef.BuiltinConstantArgRange(TheCall, 1, 0, 1) ||
diff --git a/clang/test/CodeGen/PowerPC/builtins-bcd-helpers.c
b/clang/test/CodeGen/PowerPC/builtins-bcd-helpers.c
new file mode 100644
index 0000000000000..0aeb720e545ed
--- /dev/null
+++ b/clang/test/CodeGen/PowerPC/builtins-bcd-helpers.c
@@ -0,0 +1,29 @@
+// NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
UTC_ARGS: --version 5
+// REQUIRES: powerpc-registered-target
+// RUN: %clang_cc1 -triple powerpc64le-unknown-unknown -O2 -target-cpu pwr9 \
+// RUN: -emit-llvm %s -o - | FileCheck %s
+// RUN: %clang_cc1 -triple powerpc64-unknown-unknown -O2 -target-cpu pwr9 \
+// RUN: -emit-llvm %s -o - | FileCheck %s
+// RUN: %clang_cc1 -triple powerpc-unknown-unknown -O2 -target-cpu pwr9 \
+// RUN: -emit-llvm %s -o - | FileCheck %s
+
+// CHECK-LABEL: test_bcdcopysign
+// CHECK: [[TMP0:%.*]] = tail call <16 x i8> @llvm.ppc.bcdcopysign(<16
x i8> %a, <16 x i8> %b)
+// CHECK-NEXT: ret <16 x i8> [[TMP0]]
+vector unsigned char test_bcdcopysign(vector unsigned char a, vector unsigned
char b) {
+ return __builtin_ppc_bcdcopysign(a, b);
+}
+
+// CHECK-LABEL: test_bcdsetsign_imm0
+// CHECK: [[TMP0:%.*]] = tail call <16 x i8> @llvm.ppc.bcdsetsign(<16
x i8> %a, i32 0)
+// CHECK-NEXT: ret <16 x i8> [[TMP0]]
+vector unsigned char test_bcdsetsign_imm0(vector unsigned char a) {
+ return __builtin_ppc_bcdsetsign(a, '\0');
+}
+
+// CHECK-LABEL: test_bcdsetsign_imm1
+// CHECK: [[TMP0:%.*]] = tail call <16 x i8> @llvm.ppc.bcdsetsign(<16
x i8> %a, i32 1)
+// CHECK-NEXT: ret <16 x i8> [[TMP0]]
+vector unsigned char test_bcdsetsign_imm1(vector unsigned char a) {
+ return __builtin_ppc_bcdsetsign(a, '\1');
+}
diff --git a/llvm/include/llvm/IR/IntrinsicsPowerPC.td
b/llvm/include/llvm/IR/IntrinsicsPowerPC.td
index 84c26599b5b70..bd9d85fdaab92 100644
--- a/llvm/include/llvm/IR/IntrinsicsPowerPC.td
+++ b/llvm/include/llvm/IR/IntrinsicsPowerPC.td
@@ -668,6 +668,14 @@ let TargetPrefix = "ppc" in { // All intrinsics start
with "llvm.ppc.".
def int_ppc_addg6s: ClangBuiltin<"__builtin_addg6s">,
DefaultAttrsIntrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty],
[IntrNoMem]>;
+ // BCD Format conversion intrinsics
+ def int_ppc_bcdcopysign : ClangBuiltin<"__builtin_ppc_bcdcopysign">,
+ DefaultAttrsIntrinsic<[llvm_v16i8_ty], [llvm_v16i8_ty, llvm_v16i8_ty],
[IntrNoMem]>;
+ def int_ppc_bcdsetsign : ClangBuiltin<"__builtin_ppc_bcdsetsign">,
+ DefaultAttrsIntrinsic<[llvm_v16i8_ty], [llvm_v16i8_ty, llvm_i32_ty],
+ [IntrNoMem, ImmArg<ArgIndex<1>>]>;
+
+
def int_ppc_bcdadd : ClangBuiltin<"__builtin_ppc_bcdadd">,
DefaultAttrsIntrinsic<
[llvm_v16i8_ty], [llvm_v16i8_ty, llvm_v16i8_ty, llvm_i32_ty],
diff --git a/llvm/lib/Target/PowerPC/PPCInstrAltivec.td
b/llvm/lib/Target/PowerPC/PPCInstrAltivec.td
index 386c94a324996..bf268a074496b 100644
--- a/llvm/lib/Target/PowerPC/PPCInstrAltivec.td
+++ b/llvm/lib/Target/PowerPC/PPCInstrAltivec.td
@@ -1626,9 +1626,11 @@ def BCDCTSQ_rec : VX_VT5_EO5_VB5_XO9_o <0, 385,
"bcdctsq.", []>;
// Decimal Copy-Sign/Set-Sign
let Defs = [CR6] in
-def BCDCPSGN_rec : VX1_VT5_VA5_VB5<833, "bcdcpsgn.", []>;
+def BCDCPSGN_rec : VX1_VT5_VA5_VB5<833, "bcdcpsgn.",
+ [(set v16i8:$VD, (int_ppc_bcdcopysign v16i8:$VA, v16i8:$VB))]>;
-def BCDSETSGN_rec : VX_VT5_EO5_VB5_PS1_XO9_o<31, 385, "bcdsetsgn.", []>;
+def BCDSETSGN_rec : VX_VT5_EO5_VB5_PS1_XO9_o<31, 385, "bcdsetsgn.",
+ [(set v16i8:$VD, (int_ppc_bcdsetsign v16i8:$VB, i32:$PS))]>;
// Decimal Shift/Unsigned-Shift/Shift-and-Round
def BCDS_rec : VX_VT5_VA5_VB5_PS1_XO9_o<193, "bcds." , []>;
diff --git a/llvm/test/CodeGen/PowerPC/builtins-bcd-helpers.ll
b/llvm/test/CodeGen/PowerPC/builtins-bcd-helpers.ll
new file mode 100644
index 0000000000000..ede86254b1516
--- /dev/null
+++ b/llvm/test/CodeGen/PowerPC/builtins-bcd-helpers.ll
@@ -0,0 +1,40 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
UTC_ARGS: --version 5
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-unknown
-mcpu=pwr9 \
+; RUN: --ppc-asm-full-reg-names < %s | FileCheck %s
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-unknown -mcpu=pwr9
\
+; RUN: --ppc-asm-full-reg-names < %s | FileCheck %s
+; RUN: llc -verify-machineinstrs -mcpu=pwr9 -mtriple=powerpc64-ibm-aix-xcoff \
+; RUN: -ppc-asm-full-reg-names < %s | FileCheck %s
+
+define dso_local <16 x i8> @test_bcdcopysign(<16 x i8> noundef %a, <16 x i8>
noundef %b) {
+; CHECK-LABEL: test_bcdcopysign:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: bcdcpsgn. v2, v2, v3
+; CHECK-NEXT: blr
+entry:
+ %0 = tail call <16 x i8> @llvm.ppc.bcdcopysign(<16 x i8> %a, <16 x i8> %b)
+ ret <16 x i8> %0
+}
+
+define dso_local <16 x i8> @test_bcdsetsign_imm0(<16 x i8> noundef %a) {
+; CHECK-LABEL: test_bcdsetsign_imm0:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: bcdsetsgn. v2, v2, 0
+; CHECK-NEXT: blr
+entry:
+ %0 = tail call <16 x i8> @llvm.ppc.bcdsetsign(<16 x i8> %a, i32 0)
+ ret <16 x i8> %0
+}
+
+define dso_local <16 x i8> @test_bcdsetsign_imm1(<16 x i8> noundef %a) {
+; CHECK-LABEL: test_bcdsetsign_imm1:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: bcdsetsgn. v2, v2, 1
+; CHECK-NEXT: blr
+entry:
+ %0 = tail call <16 x i8> @llvm.ppc.bcdsetsign(<16 x i8> %a, i32 1)
+ ret <16 x i8> %0
+}
+
+declare <16 x i8> @llvm.ppc.bcdcopysign(<16 x i8>, <16 x i8>)
+declare <16 x i8> @llvm.ppc.bcdsetsign(<16 x i8>, i32)
>From 33cd6046c9d23e323db19462ec83d7bda0b989ec Mon Sep 17 00:00:00 2001
From: Aditi-Medhane <aditi.medh...@ibm.com>
Date: Wed, 25 Jun 2025 10:36:34 +0000
Subject: [PATCH 2/7] review comment
---
clang/include/clang/Basic/BuiltinsPPC.def | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/clang/include/clang/Basic/BuiltinsPPC.def
b/clang/include/clang/Basic/BuiltinsPPC.def
index c3825822ce0b8..22fc42cf30db2 100644
--- a/clang/include/clang/Basic/BuiltinsPPC.def
+++ b/clang/include/clang/Basic/BuiltinsPPC.def
@@ -515,10 +515,6 @@ TARGET_BUILTIN(__builtin_altivec_vctzh, "V8UsV8Us", "",
"power9-vector")
TARGET_BUILTIN(__builtin_altivec_vctzw, "V4UiV4Ui", "", "power9-vector")
TARGET_BUILTIN(__builtin_altivec_vctzd, "V2ULLiV2ULLi", "", "power9-vector")
-//P9 BCD builtins
-TARGET_BUILTIN(__builtin_ppc_bcdcopysign, "V16UcV16UcV16Uc", "",
"power9-vector")
-TARGET_BUILTIN(__builtin_ppc_bcdsetsign, "V16UcV16UcUc", "t", "power9-vector")
-
// P7 BCD builtins.
TARGET_BUILTIN(__builtin_cdtbcd, "UiUi", "", "isa-v206-instructions")
TARGET_BUILTIN(__builtin_cbcdtd, "UiUi", "", "isa-v206-instructions")
@@ -539,6 +535,10 @@ TARGET_BUILTIN(__builtin_ppc_bcdadd_p, "iiV16UcV16Uc", "",
TARGET_BUILTIN(__builtin_ppc_bcdsub_p, "iiV16UcV16Uc", "",
"isa-v207-instructions")
+//P9 BCD builtins
+TARGET_BUILTIN(__builtin_ppc_bcdcopysign, "V16UcV16UcV16Uc", "",
"power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdsetsign, "V16UcV16UcUc", "t", "power9-vector")
+
TARGET_BUILTIN(__builtin_altivec_vclzlsbb, "SiV16Uc", "", "power9-vector")
TARGET_BUILTIN(__builtin_altivec_vctzlsbb, "SiV16Uc", "", "power9-vector")
TARGET_BUILTIN(__builtin_altivec_vprtybw, "V4UiV4Ui", "", "power9-vector")
>From 81c40a942f25dfeb126bc3437b60f016e6bdec58 Mon Sep 17 00:00:00 2001
From: Aditi-Medhane <aditi.medh...@ibm.com>
Date: Wed, 30 Jul 2025 07:09:59 +0000
Subject: [PATCH 3/7] Minor fix
---
llvm/include/llvm/IR/IntrinsicsPowerPC.td | 1 -
1 file changed, 1 deletion(-)
diff --git a/llvm/include/llvm/IR/IntrinsicsPowerPC.td
b/llvm/include/llvm/IR/IntrinsicsPowerPC.td
index b0658b0353833..94afa94bfb1ee 100644
--- a/llvm/include/llvm/IR/IntrinsicsPowerPC.td
+++ b/llvm/include/llvm/IR/IntrinsicsPowerPC.td
@@ -682,7 +682,6 @@ let TargetPrefix = "ppc" in { // All intrinsics start with
"llvm.ppc.".
def int_ppc_bcdsetsign : ClangBuiltin<"__builtin_ppc_bcdsetsign">,
DefaultAttrsIntrinsic<[llvm_v16i8_ty], [llvm_v16i8_ty, llvm_i32_ty],
[IntrNoMem, ImmArg<ArgIndex<1>>]>;
-
def int_ppc_bcdadd : ClangBuiltin<"__builtin_ppc_bcdadd">,
DefaultAttrsIntrinsic<
>From 7ae44f6b41e29f242d44891badc78d4cc50a4c93 Mon Sep 17 00:00:00 2001
From: Aditi-Medhane <aditi.medh...@ibm.com>
Date: Fri, 1 Aug 2025 05:49:28 +0000
Subject: [PATCH 4/7] Review Comments
Custom buiiltin and testcase renaming
---
clang/include/clang/Basic/BuiltinsPPC.def | 2 +-
...{builtins-bcd-helpers.c => builtins-bcd-format-conversion.c} | 0
...uiltins-bcd-helpers.ll => builtins-bcd-format-conversion.ll} | 0
3 files changed, 1 insertion(+), 1 deletion(-)
rename clang/test/CodeGen/PowerPC/{builtins-bcd-helpers.c =>
builtins-bcd-format-conversion.c} (100%)
rename llvm/test/CodeGen/PowerPC/{builtins-bcd-helpers.ll =>
builtins-bcd-format-conversion.ll} (100%)
diff --git a/clang/include/clang/Basic/BuiltinsPPC.def
b/clang/include/clang/Basic/BuiltinsPPC.def
index 79df84abd74f0..c7f1b68ec8f9a 100644
--- a/clang/include/clang/Basic/BuiltinsPPC.def
+++ b/clang/include/clang/Basic/BuiltinsPPC.def
@@ -581,7 +581,7 @@ TARGET_BUILTIN(__builtin_ppc_bcdsub_p, "iiV16UcV16Uc", "",
// P9 Binary-coded decimal (BCD) builtins.
TARGET_BUILTIN(__builtin_ppc_bcdcopysign, "V16UcV16UcV16Uc", "",
"power9-vector")
-TARGET_BUILTIN(__builtin_ppc_bcdsetsign, "V16UcV16UcUc", "t", "power9-vector")
+CUSTOM_BUILTIN(__builtin_ppc_bcdsetsign, "V16UcV16UcUc", "", "power9-vector")
TARGET_BUILTIN(__builtin_ppc_national2packed, "V16UcV16UcUc", "t",
"power9-vector")
TARGET_BUILTIN(__builtin_ppc_packed2national, "V16UcV16Uc", "",
"power9-vector")
TARGET_BUILTIN(__builtin_ppc_packed2zoned, "V16UcV16UcUc", "t",
"power9-vector")
diff --git a/clang/test/CodeGen/PowerPC/builtins-bcd-helpers.c
b/clang/test/CodeGen/PowerPC/builtins-bcd-format-conversion.c
similarity index 100%
rename from clang/test/CodeGen/PowerPC/builtins-bcd-helpers.c
rename to clang/test/CodeGen/PowerPC/builtins-bcd-format-conversion.c
diff --git a/llvm/test/CodeGen/PowerPC/builtins-bcd-helpers.ll
b/llvm/test/CodeGen/PowerPC/builtins-bcd-format-conversion.ll
similarity index 100%
rename from llvm/test/CodeGen/PowerPC/builtins-bcd-helpers.ll
rename to llvm/test/CodeGen/PowerPC/builtins-bcd-format-conversion.ll
>From 1b104892c8aa0473253de3d542f46607c7892b46 Mon Sep 17 00:00:00 2001
From: Aditi-Medhane <aditi.medh...@ibm.com>
Date: Fri, 1 Aug 2025 08:42:27 +0000
Subject: [PATCH 5/7] Minor fixes
---
clang/include/clang/Basic/BuiltinsPPC.def | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/clang/include/clang/Basic/BuiltinsPPC.def
b/clang/include/clang/Basic/BuiltinsPPC.def
index c7f1b68ec8f9a..79df84abd74f0 100644
--- a/clang/include/clang/Basic/BuiltinsPPC.def
+++ b/clang/include/clang/Basic/BuiltinsPPC.def
@@ -581,7 +581,7 @@ TARGET_BUILTIN(__builtin_ppc_bcdsub_p, "iiV16UcV16Uc", "",
// P9 Binary-coded decimal (BCD) builtins.
TARGET_BUILTIN(__builtin_ppc_bcdcopysign, "V16UcV16UcV16Uc", "",
"power9-vector")
-CUSTOM_BUILTIN(__builtin_ppc_bcdsetsign, "V16UcV16UcUc", "", "power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdsetsign, "V16UcV16UcUc", "t", "power9-vector")
TARGET_BUILTIN(__builtin_ppc_national2packed, "V16UcV16UcUc", "t",
"power9-vector")
TARGET_BUILTIN(__builtin_ppc_packed2national, "V16UcV16Uc", "",
"power9-vector")
TARGET_BUILTIN(__builtin_ppc_packed2zoned, "V16UcV16UcUc", "t",
"power9-vector")
>From 98e4799c5a665d3ca99bdaa458163644aa1e61bd Mon Sep 17 00:00:00 2001
From: AditiRM <aditimedhan...@gmail.com>
Date: Thu, 14 Aug 2025 06:53:28 +0000
Subject: [PATCH 6/7] Implement CUSTOM_BUILTIN for setsign
---
clang/include/clang/Basic/BuiltinsPPC.def | 2 +-
clang/lib/Sema/SemaPPC.cpp | 1 -
2 files changed, 1 insertion(+), 2 deletions(-)
diff --git a/clang/include/clang/Basic/BuiltinsPPC.def
b/clang/include/clang/Basic/BuiltinsPPC.def
index 79df84abd74f0..3ed9fa8521095 100644
--- a/clang/include/clang/Basic/BuiltinsPPC.def
+++ b/clang/include/clang/Basic/BuiltinsPPC.def
@@ -581,7 +581,7 @@ TARGET_BUILTIN(__builtin_ppc_bcdsub_p, "iiV16UcV16Uc", "",
// P9 Binary-coded decimal (BCD) builtins.
TARGET_BUILTIN(__builtin_ppc_bcdcopysign, "V16UcV16UcV16Uc", "",
"power9-vector")
-TARGET_BUILTIN(__builtin_ppc_bcdsetsign, "V16UcV16UcUc", "t", "power9-vector")
+CUSTOM_BUILTIN(ppc_bcdsetsign, bcdsetsign, "VVi1", false, "power9-vector")
TARGET_BUILTIN(__builtin_ppc_national2packed, "V16UcV16UcUc", "t",
"power9-vector")
TARGET_BUILTIN(__builtin_ppc_packed2national, "V16UcV16Uc", "",
"power9-vector")
TARGET_BUILTIN(__builtin_ppc_packed2zoned, "V16UcV16UcUc", "t",
"power9-vector")
diff --git a/clang/lib/Sema/SemaPPC.cpp b/clang/lib/Sema/SemaPPC.cpp
index b1c1cb3bf5d65..d5c83aedb3008 100644
--- a/clang/lib/Sema/SemaPPC.cpp
+++ b/clang/lib/Sema/SemaPPC.cpp
@@ -106,7 +106,6 @@ bool SemaPPC::CheckPPCBuiltinFunctionCall(const TargetInfo
&TI,
switch (BuiltinID) {
default:
return false;
- case PPC::BI__builtin_ppc_bcdsetsign:
case PPC::BI__builtin_ppc_national2packed:
case PPC::BI__builtin_ppc_packed2zoned:
case PPC::BI__builtin_ppc_zoned2packed:
>From 821a032c179ea208e3d1b2ac887a6d4b5633811c Mon Sep 17 00:00:00 2001
From: AditiRM <aditimedhan...@gmail.com>
Date: Thu, 14 Aug 2025 09:55:30 +0000
Subject: [PATCH 7/7] Rolling back to TARGET_BUILTIN implementation
---
clang/include/clang/Basic/BuiltinsPPC.def | 2 +-
clang/lib/Sema/SemaPPC.cpp | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/clang/include/clang/Basic/BuiltinsPPC.def
b/clang/include/clang/Basic/BuiltinsPPC.def
index 3ed9fa8521095..79df84abd74f0 100644
--- a/clang/include/clang/Basic/BuiltinsPPC.def
+++ b/clang/include/clang/Basic/BuiltinsPPC.def
@@ -581,7 +581,7 @@ TARGET_BUILTIN(__builtin_ppc_bcdsub_p, "iiV16UcV16Uc", "",
// P9 Binary-coded decimal (BCD) builtins.
TARGET_BUILTIN(__builtin_ppc_bcdcopysign, "V16UcV16UcV16Uc", "",
"power9-vector")
-CUSTOM_BUILTIN(ppc_bcdsetsign, bcdsetsign, "VVi1", false, "power9-vector")
+TARGET_BUILTIN(__builtin_ppc_bcdsetsign, "V16UcV16UcUc", "t", "power9-vector")
TARGET_BUILTIN(__builtin_ppc_national2packed, "V16UcV16UcUc", "t",
"power9-vector")
TARGET_BUILTIN(__builtin_ppc_packed2national, "V16UcV16Uc", "",
"power9-vector")
TARGET_BUILTIN(__builtin_ppc_packed2zoned, "V16UcV16UcUc", "t",
"power9-vector")
diff --git a/clang/lib/Sema/SemaPPC.cpp b/clang/lib/Sema/SemaPPC.cpp
index d5c83aedb3008..d58b237c8ec4a 100644
--- a/clang/lib/Sema/SemaPPC.cpp
+++ b/clang/lib/Sema/SemaPPC.cpp
@@ -106,6 +106,7 @@ bool SemaPPC::CheckPPCBuiltinFunctionCall(const TargetInfo
&TI,
switch (BuiltinID) {
default:
return false;
+ case PPC::BI__builtin_ppc_bcdsetsign:
case PPC::BI__builtin_ppc_national2packed:
case PPC::BI__builtin_ppc_packed2zoned:
case PPC::BI__builtin_ppc_zoned2packed:
@@ -118,7 +119,6 @@ bool SemaPPC::CheckPPCBuiltinFunctionCall(const TargetInfo
&TI,
return SemaRef.BuiltinConstantArgRange(TheCall, 0, 0, 3);
case PPC::BI__builtin_tbegin:
case PPC::BI__builtin_tend:
- return SemaRef.BuiltinConstantArgRange(TheCall, 0, 0, 1);
case PPC::BI__builtin_tsr:
return SemaRef.BuiltinConstantArgRange(TheCall, 0, 0, 7);
case PPC::BI__builtin_tabortwc:
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