https://github.com/mmha created https://github.com/llvm/llvm-project/pull/154385
…check
This patch enables the record layout computation of types that are dervied more
than once.
>From 0a0e87c263c56d4fce307e6325cb07a080d7ef94 Mon Sep 17 00:00:00 2001
From: Morris Hafner <mhaf...@nvidia.com>
Date: Tue, 19 Aug 2025 18:58:29 +0200
Subject: [PATCH] [CIR] Add support for derived classes in type info conversion
safety check
This patch enables the record layout computation of types that are dervied more
than once.
---
clang/lib/CIR/CodeGen/CIRGenTypes.cpp | 15 ++++++++-------
clang/test/CIR/CodeGen/class.cpp | 19 +++++++++++++++++++
2 files changed, 27 insertions(+), 7 deletions(-)
diff --git a/clang/lib/CIR/CodeGen/CIRGenTypes.cpp
b/clang/lib/CIR/CodeGen/CIRGenTypes.cpp
index 41433d3f16103..aada6094d0fd5 100644
--- a/clang/lib/CIR/CodeGen/CIRGenTypes.cpp
+++ b/clang/lib/CIR/CodeGen/CIRGenTypes.cpp
@@ -155,13 +155,14 @@ isSafeToConvert(const RecordDecl *rd, CIRGenTypes &cgt,
// out, don't do it. This includes virtual base classes which get laid out
// when a class is translated, even though they aren't embedded by-value into
// the class.
- if (auto *crd = dyn_cast<CXXRecordDecl>(rd)) {
- if (crd->getNumBases() > 0) {
- assert(!cir::MissingFeatures::cxxSupport());
- cgt.getCGModule().errorNYI(rd->getSourceRange(),
- "isSafeToConvert: CXXRecordDecl with bases");
- return false;
- }
+ if (const CXXRecordDecl *crd = dyn_cast<CXXRecordDecl>(rd)) {
+ for (const clang::CXXBaseSpecifier &i : crd->bases())
+ if (!isSafeToConvert(i.getType()
+ ->castAs<RecordType>()
+ ->getOriginalDecl()
+ ->getDefinitionOrSelf(),
+ cgt, alreadyChecked))
+ return false;
}
// If this type would require laying out members that are currently being
laid
diff --git a/clang/test/CIR/CodeGen/class.cpp b/clang/test/CIR/CodeGen/class.cpp
index 43dde12df40f0..eb9d5d73c3616 100644
--- a/clang/test/CIR/CodeGen/class.cpp
+++ b/clang/test/CIR/CodeGen/class.cpp
@@ -100,3 +100,22 @@ int use_base_via_pointer(Derived *d) {
// OGCG: define{{.*}} i32 @_Z20use_base_via_pointerP7Derived
// OGCG: %[[D_A_ADDR:.*]] = getelementptr inbounds nuw %class.Base, ptr
%{{.*}}, i32 0, i32 0
+
+struct EmptyDerived : Base {};
+struct EmptyDerived2 : EmptyDerived {};
+
+void use_empty_derived2() {
+ EmptyDerived2 d2;
+}
+
+// CIR: cir.func{{.*}} @_Z18use_empty_derived2v()
+// CIR: %0 = cir.alloca !rec_EmptyDerived2, !cir.ptr<!rec_EmptyDerived2>,
["d2"]
+// CIR: cir.return
+
+// LLVM: define{{.*}} void @_Z18use_empty_derived2v
+// LLVM: alloca %struct.EmptyDerived2
+// LLVM: ret void
+
+// OGCG: define{{.*}} void @_Z18use_empty_derived2v
+// OGCG: alloca %struct.EmptyDerived2
+// OGCG: ret void
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