================
@@ -52,10 +52,72 @@ let Predicates = [HasStdExtZvqdotq], mayLoad = 0, mayStore
= 0,
defm PseudoVQDOT : VPseudoVQDOT_VV_VX;
defm PseudoVQDOTU : VPseudoVQDOT_VV_VX;
defm PseudoVQDOTSU : VPseudoVQDOT_VV_VX;
+ // VQDOTUS does not have a VV variant
+ foreach m = MxListVF4 in {
+ defm "PseudoVQDOTUS_VX" : VPseudoTernaryWithPolicy<m.vrclass, m.vrclass,
GPR, m>;
+ }
}
defvar AllE32Vectors = [VI32MF2, VI32M1, VI32M2, VI32M4, VI32M8];
defm : VPatBinaryVL_VV_VX<riscv_vqdot_vl, "PseudoVQDOT", AllE32Vectors>;
defm : VPatBinaryVL_VV_VX<riscv_vqdotu_vl, "PseudoVQDOTU", AllE32Vectors>;
defm : VPatBinaryVL_VV_VX<riscv_vqdotsu_vl, "PseudoVQDOTSU", AllE32Vectors>;
+// These VPat definitions are for vqdot because they have a different operand
+// order with other ternary instructions (i.e. vop.vx vd, vs2, rs1)
+multiclass VPatTernaryV_VX_AAXASwapped<string intrinsic, string instruction,
----------------
topperc wrote:
Swapping at this layer seems wrong. Is the assembly instruction defined
incorrectly?
https://github.com/llvm/llvm-project/pull/154915
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