================
@@ -1803,10 +1803,7 @@ SDValue
NVPTXTargetLowering::LowerDYNAMIC_STACKALLOC(SDValue Op,
{Chain, DAG.getZExtOrTrunc(Size, DL, LocalVT),
DAG.getTargetConstant(Align, DL, MVT::i32)});
- SDValue ASC = DAG.getAddrSpaceCast(
- DL, Op.getValueType(), Alloc, ADDRESS_SPACE_LOCAL,
ADDRESS_SPACE_GENERIC);
-
- return DAG.getMergeValues({ASC, SDValue(Alloc.getNode(), 1)}, DL);
+ return Alloc;
----------------
thetheodor wrote:
I removed the node and moved the lowering in TD but I left the function for the
diagnostic. If I simply add the PTX/SM requirements in the TD patterns then
instruction selection crushes and there's no diagnostic. Please let me know if
there's a better way.
https://github.com/llvm/llvm-project/pull/154814
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