================
@@ -937,6 +940,21 @@ bool AArch64DAGToDAGISel::SelectRDVLImm(SDValue N, SDValue
&Imm) {
return false;
}
+// Returns a suitable RDSVL multiplier from a left shift.
+template <signed Low, signed High>
+bool AArch64DAGToDAGISel::SelectRDSVLShiftImm(SDValue N, SDValue &Imm) {
+ if (!isa<ConstantSDNode>(N))
+ return false;
+
+ int64_t MulImm = 1 << cast<ConstantSDNode>(N)->getSExtValue();
----------------
RKSimon wrote:
@kmclaughlin-arm I think this needs to be:
```cpp
int64_t MulImm = 1LL << cast<ConstantSDNode>(N)->getSExtValue();
```
to silence MSVC "result of 32-bit shift implicitly converted to 64 bits"
warnings
https://github.com/llvm/llvm-project/pull/154761
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