================
@@ -130,17 +130,10 @@ void riscv::getRISCVTargetFeatures(const Driver &D, const
llvm::Triple &Triple,
#undef RESERVE_REG
// -mrelax is default, unless -mno-relax is specified.
- if (Args.hasFlag(options::OPT_mrelax, options::OPT_mno_relax, true)) {
+ if (Args.hasFlag(options::OPT_mrelax, options::OPT_mno_relax, true))
Features.push_back("+relax");
- // -gsplit-dwarf -mrelax requires DW_AT_high_pc/DW_AT_ranges/... indexing
- // into .debug_addr, which is currently not implemented.
- Arg *A;
- if (getDebugFissionKind(D, Args, A) != DwarfFissionKind::None)
----------------
lenary wrote:
RISC-V has relocations for PC offsets in debug info. IIRC, `R_RISCV_SET6` and
`R_RISCV_SUB6` would be placed as a pair on the relevant part of the debug
info. There are variants of this for ulebs too, which came later.
https://github.com/llvm/llvm-project/pull/164128
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