https://github.com/jmmartinez created 
https://github.com/llvm/llvm-project/pull/164824

The "t" flag is used to mark the builtin signature as meaningless.
This is done on several builtins taking pointers since otherwise HIP code would 
not compile
during compilation for the host (even if the builtin is only used in
device code, compilation would fail).

The builtins changed by this patch are not affected by this issue, so
they do not need the "t" flag in the first place.

From 3c118e17c77ae5ef766318d17c4b332bab11de71 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Juan=20Manuel=20Martinez=20Caama=C3=B1o?=
 <[email protected]>
Date: Thu, 23 Oct 2025 15:51:15 +0200
Subject: [PATCH 1/2] Pre commit test

---
 .../builtins-amdgcn-raw-buffer-atomic-add.hip | 19 +++++++++++++++++++
 ...tins-amdgcn-raw-buffer-atomic-fmin-max.hip | 19 +++++++++++++++++++
 2 files changed, 38 insertions(+)
 create mode 100644 clang/test/SemaHIP/builtins-amdgcn-raw-buffer-atomic-add.hip
 create mode 100644 
clang/test/SemaHIP/builtins-amdgcn-raw-buffer-atomic-fmin-max.hip

diff --git a/clang/test/SemaHIP/builtins-amdgcn-raw-buffer-atomic-add.hip 
b/clang/test/SemaHIP/builtins-amdgcn-raw-buffer-atomic-add.hip
new file mode 100644
index 0000000000000..8d5ae46cfc91b
--- /dev/null
+++ b/clang/test/SemaHIP/builtins-amdgcn-raw-buffer-atomic-add.hip
@@ -0,0 +1,19 @@
+// RUN: %clang_cc1 -fsyntax-only -triple amdgcn -target-cpu gfx90a -verify %s 
-fcuda-is-device
+// RUN: %clang_cc1 -fsyntax-only -triple x86_64 -aux-triple amdgcn -verify %s
+// expected-no-diagnostics
+
+typedef _Float16 __attribute__((ext_vector_type(2))) float16x2_t;
+
+#define __device__ __attribute__((device))
+
+__device__ void test_raw_ptr_atomics(__amdgpu_buffer_rsrc_t rsrc, int i32, 
float f32, float16x2_t v2f16, int offset, int soffset) {
+  i32 = __builtin_amdgcn_raw_ptr_buffer_atomic_add_i32(i32, rsrc, offset, 
soffset, 0);
+  f32 = __builtin_amdgcn_raw_ptr_buffer_atomic_fadd_f32(f32, rsrc, offset, 
soffset, 0);
+  v2f16 = __builtin_amdgcn_raw_ptr_buffer_atomic_fadd_v2f16(v2f16, rsrc, 
offset, soffset, 0);
+}
+
+__device__ void test_raw_ptr_atomics_err(__amdgpu_buffer_rsrc_t rsrc, int i32, 
float f32, float16x2_t v2f16, int offset, int soffset) {
+  i32 = __builtin_amdgcn_raw_ptr_buffer_atomic_add_i32(i32, rsrc, offset, 
soffset, 0, 4);
+  f32 = __builtin_amdgcn_raw_ptr_buffer_atomic_fadd_f32(f32, rsrc, offset, 
soffset, 0, 4);
+  v2f16 = __builtin_amdgcn_raw_ptr_buffer_atomic_fadd_v2f16(v2f16, rsrc, 
offset, soffset, 0, 4);
+}
diff --git a/clang/test/SemaHIP/builtins-amdgcn-raw-buffer-atomic-fmin-max.hip 
b/clang/test/SemaHIP/builtins-amdgcn-raw-buffer-atomic-fmin-max.hip
new file mode 100644
index 0000000000000..4412877b8415e
--- /dev/null
+++ b/clang/test/SemaHIP/builtins-amdgcn-raw-buffer-atomic-fmin-max.hip
@@ -0,0 +1,19 @@
+// RUN: %clang_cc1 -fsyntax-only -triple amdgcn -target-cpu gfx90a -verify %s 
-fcuda-is-device
+// RUN: %clang_cc1 -fsyntax-only -triple x86_64 -aux-triple amdgcn -verify %s
+// expected-no-diagnostics
+
+#define __device__ __attribute__((device))
+
+__device__ void test_raw_ptr_atomics(__amdgpu_buffer_rsrc_t rsrc, float f32, 
double f64, int offset, int soffset) {
+  f32 = __builtin_amdgcn_raw_ptr_buffer_atomic_fmin_f32(f32, rsrc, offset, 
soffset, 0);
+  f64 = __builtin_amdgcn_raw_ptr_buffer_atomic_fmin_f64(f64, rsrc, offset, 
soffset, 0);
+  f32 = __builtin_amdgcn_raw_ptr_buffer_atomic_fmax_f32(f32, rsrc, offset, 
soffset, 0);
+  f64 = __builtin_amdgcn_raw_ptr_buffer_atomic_fmax_f64(f64, rsrc, offset, 
soffset, 0);
+}
+
+__device__ void test_raw_ptr_atomics_err(__amdgpu_buffer_rsrc_t rsrc, float 
f32, double f64, int offset, int soffset) {
+  f32 = __builtin_amdgcn_raw_ptr_buffer_atomic_fmin_f32(f32, rsrc, offset, 
soffset, 0, 4);
+  f64 = __builtin_amdgcn_raw_ptr_buffer_atomic_fmin_f64(f64, rsrc, offset, 
soffset, 0, 4);
+  f32 = __builtin_amdgcn_raw_ptr_buffer_atomic_fmax_f32(f32, rsrc, offset, 
soffset, 0, 4);
+  f64 = __builtin_amdgcn_raw_ptr_buffer_atomic_fmax_f64(f64, rsrc, offset, 
soffset, 0, 4);
+}

From 3c9a2e2226e0c9fc2fc091d7c8787d0fd5dc881c Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Juan=20Manuel=20Martinez=20Caama=C3=B1o?=
 <[email protected]>
Date: Thu, 23 Oct 2025 16:11:31 +0200
Subject: [PATCH 2/2] [Clang][AMDGPU] Enable type-checking on
 __builtin_amdgcn_raw_ptr_buffer_atomic_{{add|fadd|fmin|fmax}}

The "t" flag is used to disable typechecking. This is done on several
builtins taking pointers since otherwise HIP code would not compile
during compilation for the host (even if the builtin is only used in
device code).

The builtins changed by this patch are not affected by this issue, so
they do not need the "t" flag. Remove it and enable the default
type-checks on them.
---
 clang/include/clang/Basic/BuiltinsAMDGPU.def       | 14 +++++++-------
 .../builtins-amdgcn-raw-buffer-atomic-add.hip      |  7 +++----
 .../builtins-amdgcn-raw-buffer-atomic-fmin-max.hip |  9 ++++-----
 3 files changed, 14 insertions(+), 16 deletions(-)

diff --git a/clang/include/clang/Basic/BuiltinsAMDGPU.def 
b/clang/include/clang/Basic/BuiltinsAMDGPU.def
index 01d121b948b68..d149eec5ea990 100644
--- a/clang/include/clang/Basic/BuiltinsAMDGPU.def
+++ b/clang/include/clang/Basic/BuiltinsAMDGPU.def
@@ -177,15 +177,15 @@ BUILTIN(__builtin_amdgcn_raw_buffer_load_b64, 
"V2UiQbiiIi", "n")
 BUILTIN(__builtin_amdgcn_raw_buffer_load_b96, "V3UiQbiiIi", "n")
 BUILTIN(__builtin_amdgcn_raw_buffer_load_b128, "V4UiQbiiIi", "n")
 
-BUILTIN(__builtin_amdgcn_raw_ptr_buffer_atomic_add_i32, "iiQbiiIi", "t")
+BUILTIN(__builtin_amdgcn_raw_ptr_buffer_atomic_add_i32, "iiQbiiIi", "")
 
-TARGET_BUILTIN(__builtin_amdgcn_raw_ptr_buffer_atomic_fadd_f32, "ffQbiiIi", 
"t", "atomic-fadd-rtn-insts")
-TARGET_BUILTIN(__builtin_amdgcn_raw_ptr_buffer_atomic_fadd_v2f16, 
"V2hV2hQbiiIi", "t", "atomic-buffer-global-pk-add-f16-insts")
+TARGET_BUILTIN(__builtin_amdgcn_raw_ptr_buffer_atomic_fadd_f32, "ffQbiiIi", 
"", "atomic-fadd-rtn-insts")
+TARGET_BUILTIN(__builtin_amdgcn_raw_ptr_buffer_atomic_fadd_v2f16, 
"V2hV2hQbiiIi", "", "atomic-buffer-global-pk-add-f16-insts")
 
-TARGET_BUILTIN(__builtin_amdgcn_raw_ptr_buffer_atomic_fmin_f32, "ffQbiiIi", 
"t", "atomic-fmin-fmax-global-f32")
-TARGET_BUILTIN(__builtin_amdgcn_raw_ptr_buffer_atomic_fmax_f32, "ffQbiiIi", 
"t", "atomic-fmin-fmax-global-f32")
-TARGET_BUILTIN(__builtin_amdgcn_raw_ptr_buffer_atomic_fmin_f64, "ddQbiiIi", 
"t", "atomic-fmin-fmax-global-f64")
-TARGET_BUILTIN(__builtin_amdgcn_raw_ptr_buffer_atomic_fmax_f64, "ddQbiiIi", 
"t", "atomic-fmin-fmax-global-f64")
+TARGET_BUILTIN(__builtin_amdgcn_raw_ptr_buffer_atomic_fmin_f32, "ffQbiiIi", 
"", "atomic-fmin-fmax-global-f32")
+TARGET_BUILTIN(__builtin_amdgcn_raw_ptr_buffer_atomic_fmax_f32, "ffQbiiIi", 
"", "atomic-fmin-fmax-global-f32")
+TARGET_BUILTIN(__builtin_amdgcn_raw_ptr_buffer_atomic_fmin_f64, "ddQbiiIi", 
"", "atomic-fmin-fmax-global-f64")
+TARGET_BUILTIN(__builtin_amdgcn_raw_ptr_buffer_atomic_fmax_f64, "ddQbiiIi", 
"", "atomic-fmin-fmax-global-f64")
 
 TARGET_BUILTIN(__builtin_amdgcn_raw_ptr_buffer_load_lds, "vQbv*3IUiiiIiIi", 
"t", "vmem-to-lds-load-insts")
 TARGET_BUILTIN(__builtin_amdgcn_struct_ptr_buffer_load_lds, 
"vQbv*3IUiiiiIiIi", "t", "vmem-to-lds-load-insts")
diff --git a/clang/test/SemaHIP/builtins-amdgcn-raw-buffer-atomic-add.hip 
b/clang/test/SemaHIP/builtins-amdgcn-raw-buffer-atomic-add.hip
index 8d5ae46cfc91b..e9e076fa312f2 100644
--- a/clang/test/SemaHIP/builtins-amdgcn-raw-buffer-atomic-add.hip
+++ b/clang/test/SemaHIP/builtins-amdgcn-raw-buffer-atomic-add.hip
@@ -1,6 +1,5 @@
 // RUN: %clang_cc1 -fsyntax-only -triple amdgcn -target-cpu gfx90a -verify %s 
-fcuda-is-device
 // RUN: %clang_cc1 -fsyntax-only -triple x86_64 -aux-triple amdgcn -verify %s
-// expected-no-diagnostics
 
 typedef _Float16 __attribute__((ext_vector_type(2))) float16x2_t;
 
@@ -13,7 +12,7 @@ __device__ void test_raw_ptr_atomics(__amdgpu_buffer_rsrc_t 
rsrc, int i32, float
 }
 
 __device__ void test_raw_ptr_atomics_err(__amdgpu_buffer_rsrc_t rsrc, int i32, 
float f32, float16x2_t v2f16, int offset, int soffset) {
-  i32 = __builtin_amdgcn_raw_ptr_buffer_atomic_add_i32(i32, rsrc, offset, 
soffset, 0, 4);
-  f32 = __builtin_amdgcn_raw_ptr_buffer_atomic_fadd_f32(f32, rsrc, offset, 
soffset, 0, 4);
-  v2f16 = __builtin_amdgcn_raw_ptr_buffer_atomic_fadd_v2f16(v2f16, rsrc, 
offset, soffset, 0, 4);
+  i32 = __builtin_amdgcn_raw_ptr_buffer_atomic_add_i32(i32, rsrc, offset, 
soffset, 0, 4); // expected-error{{too many arguments to function call}}
+  f32 = __builtin_amdgcn_raw_ptr_buffer_atomic_fadd_f32(f32, rsrc, offset, 
soffset, 0, 4); // expected-error{{too many arguments to function call}}
+  v2f16 = __builtin_amdgcn_raw_ptr_buffer_atomic_fadd_v2f16(v2f16, rsrc, 
offset, soffset, 0, 4); // expected-error{{too many arguments to function call}}
 }
diff --git a/clang/test/SemaHIP/builtins-amdgcn-raw-buffer-atomic-fmin-max.hip 
b/clang/test/SemaHIP/builtins-amdgcn-raw-buffer-atomic-fmin-max.hip
index 4412877b8415e..a2dc02176099d 100644
--- a/clang/test/SemaHIP/builtins-amdgcn-raw-buffer-atomic-fmin-max.hip
+++ b/clang/test/SemaHIP/builtins-amdgcn-raw-buffer-atomic-fmin-max.hip
@@ -1,6 +1,5 @@
 // RUN: %clang_cc1 -fsyntax-only -triple amdgcn -target-cpu gfx90a -verify %s 
-fcuda-is-device
 // RUN: %clang_cc1 -fsyntax-only -triple x86_64 -aux-triple amdgcn -verify %s
-// expected-no-diagnostics
 
 #define __device__ __attribute__((device))
 
@@ -12,8 +11,8 @@ __device__ void test_raw_ptr_atomics(__amdgpu_buffer_rsrc_t 
rsrc, float f32, dou
 }
 
 __device__ void test_raw_ptr_atomics_err(__amdgpu_buffer_rsrc_t rsrc, float 
f32, double f64, int offset, int soffset) {
-  f32 = __builtin_amdgcn_raw_ptr_buffer_atomic_fmin_f32(f32, rsrc, offset, 
soffset, 0, 4);
-  f64 = __builtin_amdgcn_raw_ptr_buffer_atomic_fmin_f64(f64, rsrc, offset, 
soffset, 0, 4);
-  f32 = __builtin_amdgcn_raw_ptr_buffer_atomic_fmax_f32(f32, rsrc, offset, 
soffset, 0, 4);
-  f64 = __builtin_amdgcn_raw_ptr_buffer_atomic_fmax_f64(f64, rsrc, offset, 
soffset, 0, 4);
+  f32 = __builtin_amdgcn_raw_ptr_buffer_atomic_fmin_f32(f32, rsrc, offset, 
soffset, 0, 4); // expected-error{{too many arguments to function call}}
+  f64 = __builtin_amdgcn_raw_ptr_buffer_atomic_fmin_f64(f64, rsrc, offset, 
soffset, 0, 4); // expected-error{{too many arguments to function call}}
+  f32 = __builtin_amdgcn_raw_ptr_buffer_atomic_fmax_f32(f32, rsrc, offset, 
soffset, 0, 4); // expected-error{{too many arguments to function call}}
+  f64 = __builtin_amdgcn_raw_ptr_buffer_atomic_fmax_f64(f64, rsrc, offset, 
soffset, 0, 4); // expected-error{{too many arguments to function call}}
 }

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