================
@@ -1326,6 +1326,79 @@ bool RegisterCoalescer::reMaterializeDef(const
CoalescerPair &CP,
if (!TII->isAsCheapAsAMove(*DefMI))
return false;
+ // Skip rematerialization for physical registers used as return values within
+ // the same basic block to enable better coalescing.
+ if (DstReg.isPhysical()) {
+ MachineBasicBlock *MBB = CopyMI->getParent();
+ if (DefMI->getParent() == MBB && !MBB->empty()) {
+ // Quick check: is the last instruction a return using DstReg?
+ const MachineInstr &LastInstr = MBB->back();
+ if (LastInstr.isReturn() && LastInstr.readsRegister(DstReg, TRI)) {
+ // This is a return register, perform checks
+
+ // Exception: allow rematerialization for zero-idiom instructions
+ // (e.g., xorps %xmm0, %xmm0) because rematerialization produces
+ // independent zero-latency instructions, which is better than copying
+ const TargetSubtargetInfo &STI = MF->getSubtarget();
+ APInt Mask;
+ if (STI.isZeroIdiom(DefMI, Mask)) {
+ LLVM_DEBUG(dbgs() << "\tAllow remat: zero-idiom instruction\n");
+ } else {
+ // Check for duplicate DefMI before CopyMI
+ bool HasDuplicateDef = false;
+ for (MachineBasicBlock::iterator I = MBB->begin(); &*I != CopyMI;
+ ++I) {
+ if (&*I != DefMI &&
+ I->isIdenticalTo(*DefMI, MachineInstr::IgnoreDefs)) {
----------------
antoniofrighetto wrote:
Why do we need to check for duplicate identical of DefMI? Is this necessary? We
also check for isReturn() twice. I feel like all this first part of the
heuristic could be simplified into something like:
```
MachineInstr *Ret = nullptr;
if (DstReg.isPhysical() && DefMI->getParent() == MBB) {
for (auto I = std::next(CopyMI->getIterator()); I != MBB->end(); ++I) {
if (I->isReturn()) { Ret = &*I; break; }
if (I->modifiesRegister(DstReg, TRI) { RedefinedAfterCopy = true; }
}
}
if (!RedefinedAfterCopy && Ret && Ret->readsRegister(DstReg, TRI)) {
// Check uses...
}
```
https://github.com/llvm/llvm-project/pull/163047
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