Author: Koakuma Date: 2025-11-19T11:07:09+07:00 New Revision: 52ed0f215faedf3ceb26368ccd180fe3e27760e4
URL: https://github.com/llvm/llvm-project/commit/52ed0f215faedf3ceb26368ccd180fe3e27760e4 DIFF: https://github.com/llvm/llvm-project/commit/52ed0f215faedf3ceb26368ccd180fe3e27760e4.diff LOG: [SPARC][clang] Add condition code register names for inline asm (#168498) This follows the list of names used by GCC. Added: clang/test/CodeGen/Sparc/inline-asm-gcc-regs.c Modified: clang/lib/Basic/Targets/Sparc.cpp Removed: ################################################################################ diff --git a/clang/lib/Basic/Targets/Sparc.cpp b/clang/lib/Basic/Targets/Sparc.cpp index d1a891092b0f5..d47eecb3cf058 100644 --- a/clang/lib/Basic/Targets/Sparc.cpp +++ b/clang/lib/Basic/Targets/Sparc.cpp @@ -19,6 +19,7 @@ using namespace clang; using namespace clang::targets; const char *const SparcTargetInfo::GCCRegNames[] = { + // clang-format off // Integer registers "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", "r16", "r17", "r18", "r19", "r20", "r21", @@ -30,6 +31,10 @@ const char *const SparcTargetInfo::GCCRegNames[] = { "f22", "f23", "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31", "f32", "f34", "f36", "f38", "f40", "f42", "f44", "f46", "f48", "f50", "f52", "f54", "f56", "f58", "f60", "f62", + + // Condition code registers + "icc", "fcc0", "fcc1", "fcc2", "fcc3", + // clang-format on }; ArrayRef<const char *> SparcTargetInfo::getGCCRegNames() const { diff --git a/clang/test/CodeGen/Sparc/inline-asm-gcc-regs.c b/clang/test/CodeGen/Sparc/inline-asm-gcc-regs.c new file mode 100644 index 0000000000000..cf83b9afda4b2 --- /dev/null +++ b/clang/test/CodeGen/Sparc/inline-asm-gcc-regs.c @@ -0,0 +1,13 @@ +// RUN: %clang_cc1 -triple sparc-unknown-unknown -emit-llvm %s -o - | FileCheck %s + +// CHECK-LABEL: @icc +// CHECK: call void asm sideeffect "nop", "~{icc}"() +void icc() { + __asm__ __volatile__("nop" ::: "icc"); +} + +// CHECK-LABEL: @fcc +// CHECK: call void asm sideeffect "nop", "~{fcc0},~{fcc1},~{fcc2},~{fcc3}"() +void fcc() { + __asm__ __volatile__("nop" ::: "fcc0", "fcc1", "fcc2", "fcc3"); +} _______________________________________________ cfe-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
