================
@@ -348,6 +350,76 @@ entry:
ret i32 %call
}
+declare i32 @test_explicit_priority._Mmops() #18
+declare i32 @test_explicit_priority._Msve2() #19
+declare i32 @test_explicit_priority._Msve() #20
+declare i32 @test_explicit_priority.default() #0
+
+define weak_odr ptr @test_explicit_priority.resolver() comdat {
+; CHECK-LABEL: define weak_odr ptr @test_explicit_priority.resolver() comdat {
+resolver_entry:
+ tail call void @__init_cpu_features_resolver()
+ %0 = load i64, ptr @__aarch64_cpu_features, align 8
+ %1 = and i64 %0, 1073807616
+ %2 = icmp eq i64 %1, 1073807616
+ br i1 %2, label %common.ret, label %resolver_else
+
+common.ret: ; preds = %resolver_else2,
%resolver_else, %resolver_entry
+ %common.ret.op = phi ptr [ @test_explicit_priority._Msve, %resolver_entry ],
[ @test_explicit_priority._Msve2, %resolver_else ], [
%test_explicit_priority._Mmops.test_explicit_priority.default, %resolver_else2 ]
+ ret ptr %common.ret.op
+
+resolver_else: ; preds = %resolver_entry
+ %3 = and i64 %0, 69793284352
+ %4 = icmp eq i64 %3, 69793284352
+ br i1 %4, label %common.ret, label %resolver_else2
+
+resolver_else2: ; preds = %resolver_else
+ %5 = and i64 %0, 576460752303423488
+ %.not = icmp eq i64 %5, 0
+ %test_explicit_priority._Mmops.test_explicit_priority.default = select i1
%.not, ptr @test_explicit_priority.default, ptr @test_explicit_priority._Mmops
+ br label %common.ret
+}
+
+define i32 @caller8._MmopsMsve2() #21 {
+; CHECK-LABEL: define i32 @caller8._MmopsMsve2(
+; CHECK-SAME: ) local_unnamed_addr #[[ATTR20:[0-9]+]] {
+; CHECK: [[CALL:%.*]] = tail call i32 @test_explicit_priority._Msve2()
+;
+entry:
+ %call = tail call i32 @test_explicit_priority()
+ ret i32 %call
+}
+
+define i32 @caller8._Mmops() #22 {
+; CHECK-LABEL: define i32 @caller8._Mmops(
+; CHECK-SAME: ) local_unnamed_addr #[[ATTR21:[0-9]+]] {
+; CHECK: [[CALL:%.*]] = tail call i32 @test_explicit_priority()
+;
+entry:
+ %call = tail call i32 @test_explicit_priority()
+ ret i32 %call
+}
+
+define i32 @caller8._Msve() #23 {
+; CHECK-LABEL: define i32 @caller8._Msve(
+; CHECK-SAME: ) local_unnamed_addr #[[ATTR22:[0-9]+]] {
+; CHECK: [[CALL:%.*]] = tail call i32 @test_explicit_priority._Msve()
+;
+entry:
+ %call = tail call i32 @test_explicit_priority()
----------------
labrinea wrote:
The rebased revision should not suffer from the issue described in your first
bullet point @efriedma-quic.
The second bullet point was referring to an invalid test case which I have
removed because it contained versions that could not have been selected in a
hypothetical runtime execution (higher priority versions had a subset of the
features of lower priority versions). I will address this scenario (the user
creating unselectable versions by mistake) in a follow up patch.
> What happens if priorities aren't in the same order? Just sorting based on
> the priority means the FeatureMasks aren't sorted, so I'm not sure just
> iterating over the callers works the way you want it to if the priorities
> are reversed.
The `FeatureMask` and the `PriorityMask` should contain the exact same number
of bits set, minus the special priority bits that are only used for sorting.
The other bits correspond to architectural features. Those do not appear in the
same order in the two masks (the order of bits in FeatureMask is part of the
ABI). However this does not matter when comparing two FeatureMask sets, since
we only care about llvm::APInt::isSubsetOf/intersects between the two. I hope
that makes sense.
https://github.com/llvm/llvm-project/pull/150267
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