================
@@ -0,0 +1,217 @@
+// RUN: %clang_cc1 -x c -flax-vector-conversions=none -ffreestanding %s
-triple=x86_64-unknown-linux -target-feature +xop -fclangir -emit-cir -o %t.cir
-Wall -Werror
+// RUN: FileCheck --check-prefix=CIR --input-file=%t.cir %s
+// RUN: %clang_cc1 -x c -flax-vector-conversions=none -ffreestanding %s
-triple=x86_64-unknown-linux -target-feature +xop -fclangir -emit-llvm -o %t.ll
-Wall -Werror
+// RUN: FileCheck --check-prefix=LLVM --input-file=%t.ll %s
+
+// RUN: %clang_cc1 -x c++ -flax-vector-conversions=none -ffreestanding %s
-triple=x86_64-unknown-linux -target-feature +xop -fclangir -emit-cir -o %t.cir
-Wall -Werror
+// RUN: FileCheck --check-prefix=CIR --input-file=%t.cir %s
+// RUN: %clang_cc1 -x c++ -flax-vector-conversions=none -ffreestanding %s
-triple=x86_64-unknown-linux -target-feature +xop -fclangir -emit-llvm -o %t.ll
-Wall -Werror
+// RUN: FileCheck --check-prefix=LLVM --input-file=%t.ll %s
+
+// RUN: %clang_cc1 -x c -flax-vector-conversions=none -ffreestanding %s
-triple=x86_64-unknown-linux -target-feature +xop -emit-llvm -o - -Wall -Werror
| FileCheck %s -check-prefix=OGCG
+// RUN: %clang_cc1 -x c++ -flax-vector-conversions=none -ffreestanding %s
-triple=x86_64-unknown-linux -target-feature +xop -emit-llvm -o - -Wall -Werror
| FileCheck %s -check-prefix=OGCG
+
+// This test mimics clang/test/CodeGen/X86/xop-builtins.c, which eventually
+// CIR shall be able to support fully.
+
+#include <x86intrin.h>
+
+__m128i test_mm_com_epu8(__m128i a, __m128i b) {
+ // CIR-LABEL: test_mm_com_epu8
+ // CIR: %[[A:.*]] = cir.cast bitcast %{{.*}} : !cir.vector<16 x !s8i> ->
!cir.vector<16 x !u8i>
+ // CIR: %[[B:.*]] = cir.cast bitcast %{{.*}} : !cir.vector<16 x !s8i> ->
!cir.vector<16 x !u8i>
+ // CIR: %[[CMP:.*]] = cir.vec.cmp(lt, %[[A]], %[[B]]) : !cir.vector<16 x
!u8i>, !cir.vector<16 x !s8i>
+ // CIR: %[[RES:.*]] = cir.cast bitcast %[[CMP]] : !cir.vector<16 x !s8i> ->
!cir.vector<2 x !s64i>
+
+ // LLVM-LABEL: test_mm_com_epu8
+ // LLVM: %[[CMP:.*]] = icmp ult <16 x i8> %{{.*}}, %{{.*}}
+ // LLVM: %[[RES:.*]] = sext <16 x i1> %[[CMP]] to <16 x i8>
+ // LLVM: %{{.*}} = bitcast <16 x i8> %[[RES]] to <2 x i64>
+
+ // OGCG-LABEL: test_mm_com_epu8
+ // OGCG: %[[CMP:.*]] = icmp ult <16 x i8> %{{.*}}, %{{.*}}
+ // OGCG: %[[RES:.*]] = sext <16 x i1> %[[CMP]] to <16 x i8>
+ // OGCG: %{{.*}} = bitcast <16 x i8> %[[RES]] to <2 x i64>
+ return _mm_com_epu8(a, b, 0);
+}
+
+__m128i test_mm_com_epu16(__m128i a, __m128i b) {
+ // CIR-LABEL: test_mm_com_epu16
+ // CIR: %[[VAL1:.*]] = cir.cast bitcast %{{.*}} : !cir.vector<8 x !s16i> ->
!cir.vector<8 x !u16i>
+ // CIR: %[[VAL2:.*]] = cir.cast bitcast %{{.*}} : !cir.vector<8 x !s16i> ->
!cir.vector<8 x !u16i>
+ // CIR: %[[CMP:.*]] = cir.vec.cmp(lt, %[[VAL1]], %[[VAL2]]) : !cir.vector<8
x !u16i>, !cir.vector<8 x !s16i>
+ // CIR: %[[RES:.*]] = cir.cast bitcast %[[CMP]] : !cir.vector<8 x !s16i> ->
!cir.vector<2 x !s64i>
+
+ // LLVM-LABEL: test_mm_com_epu16
+ // LLVM: %[[CMP:.*]] = icmp ult <8 x i16> %{{.*}}, %{{.*}}
+ // LLVM: %[[RES:.*]] = sext <8 x i1> %[[CMP]] to <8 x i16>
+ // LLVM: %{{.*}} = bitcast <8 x i16> %[[RES]] to <2 x i64>
+
+ // OGCG-LABEL: test_mm_com_epu16
+ // OGCG: %[[CMP:.*]] = icmp ult <8 x i16> %{{.*}}, %{{.*}}
+ // OGCG: %[[RES:.*]] = sext <8 x i1> %[[CMP]] to <8 x i16>
+ // OGCG: %{{.*}} = bitcast <8 x i16> %[[RES]] to <2 x i64>
+ return _mm_com_epu16(a, b, 0);
+}
+
+__m128i test_mm_com_epu32(__m128i a, __m128i b) {
+ // CIR-LABEL: test_mm_com_epu32
+ // CIR: %[[VAL1:.*]] = cir.cast bitcast %{{.*}} : !cir.vector<4 x !s32i> ->
!cir.vector<4 x !u32i>
+ // CIR: %[[VAL2:.*]] = cir.cast bitcast %{{.*}} : !cir.vector<4 x !s32i> ->
!cir.vector<4 x !u32i>
+ // CIR: %[[CMP:.*]] = cir.vec.cmp(lt, %[[VAL1]], %[[VAL2]]) : !cir.vector<4
x !u32i>, !cir.vector<4 x !s32i>
+ // CIR: %[[RES:.*]] = cir.cast bitcast %[[CMP]] : !cir.vector<4 x !s32i> ->
!cir.vector<2 x !s64i>
+
+ // LLVM-LABEL: test_mm_com_epu32
+ // LLVM: %[[CMP:.*]] = icmp ult <4 x i32> %{{.*}}, %{{.*}}
+ // LLVM: %[[RES:.*]] = sext <4 x i1> %[[CMP]] to <4 x i32>
+ // LLVM: %{{.*}} = bitcast <4 x i32> %[[RES]] to <2 x i64>
+
+ // OGCG-LABEL: test_mm_com_epu32
+ // OGCG: %[[CMP:.*]] = icmp ult <4 x i32> %{{.*}}, %{{.*}}
+ // OGCG: %[[RES:.*]] = sext <4 x i1> %[[CMP]] to <4 x i32>
+ // OGCG: %{{.*}} = bitcast <4 x i32> %[[RES]] to <2 x i64>
+ return _mm_com_epu32(a, b, 0);
+}
+
+__m128i test_mm_com_epu64(__m128i a, __m128i b) {
+ // CIR-LABEL: test_mm_com_epu64
+ // CIR: %[[VAL1:.*]] = cir.cast bitcast %{{.*}} : !cir.vector<2 x !s64i> ->
!cir.vector<2 x !u64i>
+ // CIR: %[[VAL2:.*]] = cir.cast bitcast %{{.*}} : !cir.vector<2 x !s64i> ->
!cir.vector<2 x !u64i>
+ // CIR: %[[CMP:.*]] = cir.vec.cmp(lt, %[[VAL1]], %[[VAL2]]) : !cir.vector<2
x !u64i>, !cir.vector<2 x !s64i>
+
+ // LLVM-LABEL: test_mm_com_epu64
+ // LLVM: %[[CMP:.*]] = icmp ult <2 x i64> %{{.*}}, %{{.*}}
+ // LLVM: %[[RES:.*]] = sext <2 x i1> %[[CMP]] to <2 x i64>
+
+ // OGCG-LABEL: test_mm_com_epu64
+ // OGCG: %[[CMP:.*]] = icmp ult <2 x i64> %{{.*}}, %{{.*}}
+ // OGCG: %[[RES:.*]] = sext <2 x i1> %[[CMP]] to <2 x i64>
+ return _mm_com_epu64(a, b, 0);
----------------
andykaylor wrote:
```suggestion
_mm_com_epu64(a, b, 0);
_mm_com_epu64(a, b, 1);
_mm_com_epu64(a, b, 2);
_mm_com_epu64(a, b, 3);
_mm_com_epu64(a, b, 4);
return _mm_com_epu64(a, b, 5);
```
Can you add this along with the corresponding checks here and in
`test_mm_com_epi64`? I don't think every one of these variations needs to test
all of the predicates, but I'd like to see every predicate tested at least once
each for signed and unsigned values.
https://github.com/llvm/llvm-project/pull/170362
_______________________________________________
cfe-commits mailing list
[email protected]
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
