https://github.com/badumbatish updated https://github.com/llvm/llvm-project/pull/170353
>From fe3427ac7b415fa9a1de58973ed8ca0bd8598847 Mon Sep 17 00:00:00 2001 From: Jasmine Tang <[email protected]> Date: Tue, 2 Dec 2025 11:11:48 -0800 Subject: [PATCH] Upstream scatter from ClangIR incubator Remove std::string conversion --- clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp | 91 +++++++++- .../CodeGenBuiltins/X86/avx512f-builtins.c | 168 ++++++++++++++++++ 2 files changed, 257 insertions(+), 2 deletions(-) diff --git a/clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp b/clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp index 2d503ddb08a7d..1b2e3f41479db 100644 --- a/clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp +++ b/clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp @@ -758,7 +758,7 @@ mlir::Value CIRGenFunction::emitX86BuiltinExpr(unsigned builtinID, std::min(cast<cir::VectorType>(ops[0].getType()).getSize(), cast<cir::VectorType>(ops[2].getType()).getSize()); ops[3] = getMaskVecValue(builder, loc, ops[3], minElts); - return emitIntrinsicCallOp(builder, loc, intrinsicName.str(), + return emitIntrinsicCallOp(builder, loc, intrinsicName, convertType(expr->getType()), ops); } case X86::BI__builtin_ia32_scattersiv8df: @@ -784,7 +784,94 @@ mlir::Value CIRGenFunction::emitX86BuiltinExpr(unsigned builtinID, case X86::BI__builtin_ia32_scattersiv4sf: case X86::BI__builtin_ia32_scattersiv4si: case X86::BI__builtin_ia32_scattersiv8sf: - case X86::BI__builtin_ia32_scattersiv8si: + case X86::BI__builtin_ia32_scattersiv8si: { + llvm::StringRef intrinsicName; + switch (builtinID) { + default: + llvm_unreachable("Unexpected builtin"); + case X86::BI__builtin_ia32_scattersiv8df: + intrinsicName = "x86.avx512.mask.scatter.dpd.512"; + break; + case X86::BI__builtin_ia32_scattersiv16sf: + intrinsicName = "x86.avx512.mask.scatter.dps.512"; + break; + case X86::BI__builtin_ia32_scatterdiv8df: + intrinsicName = "x86.avx512.mask.scatter.qpd.512"; + break; + case X86::BI__builtin_ia32_scatterdiv16sf: + intrinsicName = "x86.avx512.mask.scatter.qps.512"; + break; + case X86::BI__builtin_ia32_scattersiv8di: + intrinsicName = "x86.avx512.mask.scatter.dpq.512"; + break; + case X86::BI__builtin_ia32_scattersiv16si: + intrinsicName = "x86.avx512.mask.scatter.dpi.512"; + break; + case X86::BI__builtin_ia32_scatterdiv8di: + intrinsicName = "x86.avx512.mask.scatter.qpq.512"; + break; + case X86::BI__builtin_ia32_scatterdiv16si: + intrinsicName = "x86.avx512.mask.scatter.qpi.512"; + break; + case X86::BI__builtin_ia32_scatterdiv2df: + intrinsicName = "x86.avx512.mask.scatterdiv2.df"; + break; + case X86::BI__builtin_ia32_scatterdiv2di: + intrinsicName = "x86.avx512.mask.scatterdiv2.di"; + break; + case X86::BI__builtin_ia32_scatterdiv4df: + intrinsicName = "x86.avx512.mask.scatterdiv4.df"; + break; + case X86::BI__builtin_ia32_scatterdiv4di: + intrinsicName = "x86.avx512.mask.scatterdiv4.di"; + break; + case X86::BI__builtin_ia32_scatterdiv4sf: + intrinsicName = "x86.avx512.mask.scatterdiv4.sf"; + break; + case X86::BI__builtin_ia32_scatterdiv4si: + intrinsicName = "x86.avx512.mask.scatterdiv4.si"; + break; + case X86::BI__builtin_ia32_scatterdiv8sf: + intrinsicName = "x86.avx512.mask.scatterdiv8.sf"; + break; + case X86::BI__builtin_ia32_scatterdiv8si: + intrinsicName = "x86.avx512.mask.scatterdiv8.si"; + break; + case X86::BI__builtin_ia32_scattersiv2df: + intrinsicName = "x86.avx512.mask.scattersiv2.df"; + break; + case X86::BI__builtin_ia32_scattersiv2di: + intrinsicName = "x86.avx512.mask.scattersiv2.di"; + break; + case X86::BI__builtin_ia32_scattersiv4df: + intrinsicName = "x86.avx512.mask.scattersiv4.df"; + break; + case X86::BI__builtin_ia32_scattersiv4di: + intrinsicName = "x86.avx512.mask.scattersiv4.di"; + break; + case X86::BI__builtin_ia32_scattersiv4sf: + intrinsicName = "x86.avx512.mask.scattersiv4.sf"; + break; + case X86::BI__builtin_ia32_scattersiv4si: + intrinsicName = "x86.avx512.mask.scattersiv4.si"; + break; + case X86::BI__builtin_ia32_scattersiv8sf: + intrinsicName = "x86.avx512.mask.scattersiv8.sf"; + break; + case X86::BI__builtin_ia32_scattersiv8si: + intrinsicName = "x86.avx512.mask.scattersiv8.si"; + break; + } + + mlir::Location loc = getLoc(expr->getExprLoc()); + unsigned minElts = + std::min(cast<cir::VectorType>(ops[2].getType()).getSize(), + cast<cir::VectorType>(ops[3].getType()).getSize()); + ops[1] = getMaskVecValue(builder, loc, ops[1], minElts); + + return emitIntrinsicCallOp(builder, loc, intrinsicName, + convertType(expr->getType()), ops); + } case X86::BI__builtin_ia32_vextractf128_pd256: case X86::BI__builtin_ia32_vextractf128_ps256: case X86::BI__builtin_ia32_vextractf128_si256: diff --git a/clang/test/CIR/CodeGenBuiltins/X86/avx512f-builtins.c b/clang/test/CIR/CodeGenBuiltins/X86/avx512f-builtins.c index a0e50ff9b4017..cdcdad42b2845 100644 --- a/clang/test/CIR/CodeGenBuiltins/X86/avx512f-builtins.c +++ b/clang/test/CIR/CodeGenBuiltins/X86/avx512f-builtins.c @@ -527,3 +527,171 @@ __m512i test_mm512_ror_epi64(__m512i __A) { // OGCG: call <8 x i64> @llvm.fshr.v8i64(<8 x i64> %[[VAR]], <8 x i64> %[[VAR]], <8 x i64> splat (i64 5)) return _mm512_ror_epi64(__A, 5); } + +void test_mm512_i32scatter_pd(void *__addr, __m256i __index, __m512d __v1) { + // CIR-LABEL: test_mm512_i32scatter_pd + // CIR: cir.call_llvm_intrinsic "x86.avx512.mask.scatter.dpd.512" + + // LLVM-LABEL: test_mm512_i32scatter_pd + // LLVM: @llvm.x86.avx512.mask.scatter.dpd.512 + + // OGCG-LABEL: test_mm512_i32scatter_pd + // OGCG: @llvm.x86.avx512.mask.scatter.dpd.512 + return _mm512_i32scatter_pd(__addr, __index, __v1, 2); +} + +void test_mm512_mask_i32scatter_pd(void *__addr, __mmask8 __mask, __m256i __index, __m512d __v1) { + // CIR-LABEL: test_mm512_mask_i32scatter_pd + // CIR: cir.call_llvm_intrinsic "x86.avx512.mask.scatter.dpd.512" + + // LLVM-LABEL: test_mm512_mask_i32scatter_pd + // LLVM: @llvm.x86.avx512.mask.scatter.dpd.512 + + // OGCG-LABEL: test_mm512_mask_i32scatter_pd + // OGCG: @llvm.x86.avx512.mask.scatter.dpd.512 + return _mm512_mask_i32scatter_pd(__addr, __mask, __index, __v1, 2); +} + +void test_mm512_i32scatter_ps(void *__addr, __m512i __index, __m512 __v1) { + // CIR-LABEL: test_mm512_i32scatter_ps + // CIR: cir.call_llvm_intrinsic "x86.avx512.mask.scatter.dps.512" + + // LLVM-LABEL: test_mm512_i32scatter_ps + // LLVM: @llvm.x86.avx512.mask.scatter.dps.512 + + // OGCG-LABEL: test_mm512_i32scatter_ps + // OGCG: @llvm.x86.avx512.mask.scatter.dps.512 + return _mm512_i32scatter_ps(__addr, __index, __v1, 2); +} + +void test_mm512_mask_i32scatter_ps(void *__addr, __mmask16 __mask, __m512i __index, __m512 __v1) { + // CIR-LABEL: test_mm512_mask_i32scatter_ps + // CIR: cir.call_llvm_intrinsic "x86.avx512.mask.scatter.dps.512" + + // LLVM-LABEL: test_mm512_mask_i32scatter_ps + // LLVM: @llvm.x86.avx512.mask.scatter.dps.512 + + // OGCG-LABEL: test_mm512_mask_i32scatter_ps + // OGCG: @llvm.x86.avx512.mask.scatter.dps.512 + return _mm512_mask_i32scatter_ps(__addr, __mask, __index, __v1, 2); +} + +void test_mm512_i64scatter_pd(void *__addr, __m512i __index, __m512d __v1) { + // CIR-LABEL: test_mm512_i64scatter_pd + // CIR: cir.call_llvm_intrinsic "x86.avx512.mask.scatter.qpd.512" + + // LLVM-LABEL: test_mm512_i64scatter_pd + // LLVM: @llvm.x86.avx512.mask.scatter.qpd.512 + + // OGCG-LABEL: test_mm512_i64scatter_pd + // OGCG: @llvm.x86.avx512.mask.scatter.qpd.512 + return _mm512_i64scatter_pd(__addr, __index, __v1, 2); +} + +void test_mm512_mask_i64scatter_pd(void *__addr, __mmask8 __mask, __m512i __index, __m512d __v1) { + // CIR-LABEL: test_mm512_mask_i64scatter_pd + // CIR: cir.call_llvm_intrinsic "x86.avx512.mask.scatter.qpd.512" + + // LLVM-LABEL: test_mm512_mask_i64scatter_pd + // LLVM: @llvm.x86.avx512.mask.scatter.qpd.512 + + // OGCG-LABEL: test_mm512_mask_i64scatter_pd + // OGCG: @llvm.x86.avx512.mask.scatter.qpd.512 + return _mm512_mask_i64scatter_pd(__addr, __mask, __index, __v1, 2); +} + +void test_mm512_i64scatter_ps(void *__addr, __m512i __index, __m256 __v1) { + // CIR-LABEL: test_mm512_i64scatter_ps + // CIR: cir.call_llvm_intrinsic "x86.avx512.mask.scatter.qps.512" + + // LLVM-LABEL: test_mm512_i64scatter_ps + // LLVM: @llvm.x86.avx512.mask.scatter.qps.512 + + // OGCG-LABEL: test_mm512_i64scatter_ps + // OGCG: @llvm.x86.avx512.mask.scatter.qps.512 + return _mm512_i64scatter_ps(__addr, __index, __v1, 2); +} + +void test_mm512_mask_i64scatter_ps(void *__addr, __mmask8 __mask, __m512i __index, __m256 __v1) { + // CIR-LABEL: test_mm512_mask_i64scatter_ps + // CIR: cir.call_llvm_intrinsic "x86.avx512.mask.scatter.qps.512" + + // LLVM-LABEL: test_mm512_mask_i64scatter_ps + // LLVM: @llvm.x86.avx512.mask.scatter.qps.512 + + // OGCG-LABEL: test_mm512_mask_i64scatter_ps + // OGCG: @llvm.x86.avx512.mask.scatter.qps.512 + return _mm512_mask_i64scatter_ps(__addr, __mask, __index, __v1, 2); +} + +void test_mm512_i32scatter_epi32(void *__addr, __m512i __index, __m512i __v1) { + // CIR-LABEL: test_mm512_i32scatter_epi32 + // CIR: cir.call_llvm_intrinsic "x86.avx512.mask.scatter.dpi.512" + + // LLVM-LABEL: test_mm512_i32scatter_epi32 + // LLVM: @llvm.x86.avx512.mask.scatter.dpi.512 + + // OGCG-LABEL: test_mm512_i32scatter_epi32 + // OGCG: @llvm.x86.avx512.mask.scatter.dpi.512 + return _mm512_i32scatter_epi32(__addr, __index, __v1, 2); +} + +void test_mm512_mask_i32scatter_epi32(void *__addr, __mmask16 __mask, __m512i __index, __m512i __v1) { + // CIR-LABEL: test_mm512_mask_i32scatter_epi32 + // CIR: cir.call_llvm_intrinsic "x86.avx512.mask.scatter.dpi.512" + + // LLVM-LABEL: test_mm512_mask_i32scatter_epi32 + // LLVM: @llvm.x86.avx512.mask.scatter.dpi.512 + + // OGCG-LABEL: test_mm512_mask_i32scatter_epi32 + // OGCG: @llvm.x86.avx512.mask.scatter.dpi.512 + return _mm512_mask_i32scatter_epi32(__addr, __mask, __index, __v1, 2); +} + +void test_mm512_i64scatter_epi64(void *__addr, __m512i __index, __m512i __v1) { + // CIR-LABEL: test_mm512_i64scatter_epi64 + // CIR: cir.call_llvm_intrinsic "x86.avx512.mask.scatter.qpq.512" + + // LLVM-LABEL: test_mm512_i64scatter_epi64 + // LLVM: @llvm.x86.avx512.mask.scatter.qpq.512 + + // OGCG-LABEL: test_mm512_i64scatter_epi64 + // OGCG: @llvm.x86.avx512.mask.scatter.qpq.512 + return _mm512_i64scatter_epi64(__addr, __index, __v1, 2); +} + +void test_mm512_mask_i64scatter_epi64(void *__addr, __mmask8 __mask, __m512i __index, __m512i __v1) { + // CIR-LABEL: test_mm512_mask_i64scatter_epi64 + // CIR: cir.call_llvm_intrinsic "x86.avx512.mask.scatter.qpq.512" + + // LLVM-LABEL: test_mm512_mask_i64scatter_epi64 + // LLVM: @llvm.x86.avx512.mask.scatter.qpq.512 + + // OGCG-LABEL: test_mm512_mask_i64scatter_epi64 + // OGCG: @llvm.x86.avx512.mask.scatter.qpq.512 + return _mm512_mask_i64scatter_epi64(__addr, __mask, __index, __v1, 2); +} + +void test_mm512_i64scatter_epi32(void *__addr, __m512i __index, __m256i __v1) { + // CIR-LABEL: test_mm512_i64scatter_epi32 + // CIR: cir.call_llvm_intrinsic "x86.avx512.mask.scatter.qpi.512" + + // LLVM-LABEL: test_mm512_i64scatter_epi32 + // LLVM: @llvm.x86.avx512.mask.scatter.qpi.512 + + // OGCG-LABEL: test_mm512_i64scatter_epi32 + // OGCG: @llvm.x86.avx512.mask.scatter.qpi.512 + return _mm512_i64scatter_epi32(__addr, __index, __v1, 2); +} + +void test_mm512_mask_i64scatter_epi32(void *__addr, __mmask8 __mask, __m512i __index, __m256i __v1) { + // CIR-LABEL: test_mm512_mask_i64scatter_epi32 + // CIR: cir.call_llvm_intrinsic "x86.avx512.mask.scatter.qpi.512" + + // LLVM-LABEL: test_mm512_mask_i64scatter_epi32 + // LLVM: @llvm.x86.avx512.mask.scatter.qpi.512 + + // OGCG-LABEL: test_mm512_mask_i64scatter_epi32 + // OGCG: @llvm.x86.avx512.mask.scatter.qpi.512 + return _mm512_mask_i64scatter_epi32(__addr, __mask, __index, __v1, 2); +} _______________________________________________ cfe-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
