================
@@ -1004,7 +1008,33 @@ mlir::Value CIRGenFunction::emitX86BuiltinExpr(unsigned
builtinID,
case X86::BI__builtin_ia32_insertf64x2_256:
case X86::BI__builtin_ia32_inserti64x2_256:
case X86::BI__builtin_ia32_insertf64x2_512:
- case X86::BI__builtin_ia32_inserti64x2_512:
+ case X86::BI__builtin_ia32_inserti64x2_512: {
+ unsigned dstNumElts = cast<cir::VectorType>(ops[0].getType()).getSize();
+ unsigned srcNumElts = cast<cir::VectorType>(ops[1].getType()).getSize();
+ unsigned subVectors = dstNumElts / srcNumElts;
+ assert(llvm::isPowerOf2_32(subVectors) && "Expected power of 2
subvectors");
+
+ uint64_t index = getZExtIntValueFromConstOp(ops[2]);
+ index &= subVectors - 1; // Remove any extra bits.
+ index *= srcNumElts;
+
+ int64_t indices[16];
+ for (unsigned i = 0; i != dstNumElts; ++i)
----------------
andykaylor wrote:
Can you add an assertion that `dstNumElts` is less than 16?
https://github.com/llvm/llvm-project/pull/170924
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