================
@@ -20,18 +20,20 @@ gpu.module @xevm_module{
%0 = xegpu.create_nd_tdesc %arg0 : memref<8x16xf16>
-> !xegpu.tensor_desc<8x16xf16, #xegpu.layout<lane_layout = [1, 16],
lane_data = [1, 1]>>
%1 = xegpu.load_nd %0[%c0, %c0]
- {layout_result_0 = #xegpu.layout<lane_layout = [1, 16], lane_data = [1,
1]>} :
+ {layout = #xegpu.layout<lane_layout = [1, 16], lane_data = [1, 1]>} :
----------------
Jianhui-Li wrote:
The current MLIR support both as input. But when it prints out, it does print a
different format. Will handle this in separate PR. It touches a lot of test
cases.
https://github.com/llvm/llvm-project/pull/172125
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