================
@@ -545,10 +545,39 @@ LValue CIRGenFunction::emitLValueForFieldInitialization(
return makeAddrLValue(v, fieldType, fieldBaseInfo);
}
+/// Converts a scalar value from its primary IR type (as returned
+/// by ConvertType) to its load/store type (as returned by
+/// convertTypeForLoadStore).
mlir::Value CIRGenFunction::emitToMemory(mlir::Value value, QualType ty) {
- // Bool has a different representation in memory than in registers,
- // but in ClangIR, it is simply represented as a cir.bool value.
- // This function is here as a placeholder for possible future changes.
+ if (auto *atomicTy = ty->getAs<AtomicType>())
+ ty = atomicTy->getValueType();
+
+ if (ty->isExtVectorBoolType()) {
+ cgm.errorNYI("emitToMemory: extVectorBoolType");
+ }
+
+ if (ty->hasBooleanRepresentation() || ty->isBitIntType()) {
+ mlir::Type storeType = convertTypeForLoadStore(ty, value.getType());
+ return builder.createIntCast(value, storeType);
+ }
+
+ return value;
+}
+
+mlir::Value CIRGenFunction::emitFromMemory(mlir::Value value, QualType ty) {
+ if (auto *atomicTy = ty->getAs<AtomicType>())
+ ty = atomicTy->getValueType();
+
+ if (ty->isPackedVectorBoolType(getContext())) {
+ cgm.errorNYI("emitFromMemory: PackedVectorBoolType");
+ }
+
+ if (ty->hasBooleanRepresentation() || ty->isBitIntType() ||
----------------
andykaylor wrote:
Again, I don't think we want this.
https://github.com/llvm/llvm-project/pull/168347
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