[clang] [llvm] [RISCV] Add Spacemit X100 processor definition (PR #173988)

[Mark Zhuang via cfe-commits]

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@@ -761,6 +761,37 @@ def SPACEMIT_X60 : RISCVProcessorModel<"spacemit-x60",
   let MImpID = 0x1000000049772200;
 }
 
+def SPACEMIT_X100 : RISCVProcessorModel<"spacemit-x100",
+                                        NoSchedModel,
+                                       !listconcat(RVA23S64Features,
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zqb-all wrote:

Thanks, addressed and sorted the FeatureStd list in alphabetical order

https://github.com/llvm/llvm-project/pull/173988
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