================
@@ -184,6 +184,37 @@ static mlir::Value emitX86Select(CIRGenBuilderTy &builder,
mlir::Location loc,
return cir::VecTernaryOp::create(builder, loc, mask, op0, op1);
}
+static mlir::Value emitX86ScalarSelect(CIRGenBuilderTy &builder,
+ mlir::Location loc, mlir::Value mask,
+ mlir::Value op0, mlir::Value op1) {
+
+ // If the mask is all ones just return first argument.
+ if (auto c = mlir::dyn_cast_or_null<cir::ConstantOp>(mask.getDefiningOp()))
+ if (c.isAllOnesValue())
+ return op0;
+ // Cast to cir::IntType to safely get the width of a CIR integer
+ unsigned width = 0;
+ if (auto intTy = mlir::dyn_cast<cir::IntType>(mask.getType())) {
+ width = intTy.getWidth();
+ } else {
+ // Fallback or handle unexpected type
+ width = 8;
+ }
+ mlir::Type maskTy = cir::VectorType::get(
+ cir::IntType::get(builder.getContext(), 1, false), width);
+
+ auto cirI64Ty = cir::IntType::get(builder.getContext(), 64, true);
----------------
badumbatish wrote:
```suggestion
auto cirI64Ty = cir::IntType::get(builder.getContext(), 64,
/*isSigned=*/true);
```
https://github.com/llvm/llvm-project/pull/174003
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