================
@@ -83,16 +85,150 @@ static void collectClobbers(const CIRGenFunction &cgf,
const AsmStmt &s,
}
}
+using ConstraintInfos = SmallVector<TargetInfo::ConstraintInfo, 4>;
+
+static void collectInOutConstraintInfos(const CIRGenFunction &cgf,
+ const AsmStmt &s, ConstraintInfos &out,
+ ConstraintInfos &in) {
+
+ for (unsigned i = 0, e = s.getNumOutputs(); i != e; i++) {
+ StringRef name;
+ if (const GCCAsmStmt *gas = dyn_cast<GCCAsmStmt>(&s))
+ name = gas->getOutputName(i);
+ TargetInfo::ConstraintInfo info(s.getOutputConstraint(i), name);
+ bool isValid = cgf.getTarget().validateOutputConstraint(info);
+ (void)isValid;
+ assert(isValid && "Failed to parse output constraint");
+ out.push_back(info);
+ }
+
+ for (unsigned i = 0, e = s.getNumInputs(); i != e; i++) {
+ StringRef name;
+ if (const GCCAsmStmt *gas = dyn_cast<GCCAsmStmt>(&s))
+ name = gas->getInputName(i);
+ TargetInfo::ConstraintInfo info(s.getInputConstraint(i), name);
+ bool isValid = cgf.getTarget().validateInputConstraint(out, info);
+ assert(isValid && "Failed to parse input constraint");
+ (void)isValid;
+ in.push_back(info);
+ }
+}
+
+static void emitAsmStores(CIRGenFunction &cgf, const AsmStmt &s,
+ const llvm::ArrayRef<mlir::Value> regResults,
+ const llvm::ArrayRef<mlir::Type> resultRegTypes,
+ const llvm::ArrayRef<mlir::Type> resultTruncRegTypes,
+ const llvm::ArrayRef<LValue> resultRegDests,
+ const llvm::ArrayRef<QualType> resultRegQualTys,
+ const llvm::BitVector &resultTypeRequiresCast,
+ const llvm::BitVector &resultRegIsFlagReg) {
+ CIRGenBuilderTy &builder = cgf.getBuilder();
+ CIRGenModule &cgm = cgf.cgm;
+ mlir::MLIRContext *ctx = builder.getContext();
+
+ assert(regResults.size() == resultRegTypes.size());
+ assert(regResults.size() == resultTruncRegTypes.size());
+ assert(regResults.size() == resultRegDests.size());
+
+ // ResultRegDests can be also populated by addReturnRegisterOutputs() above,
+ // in which case its size may grow.
+ assert(resultTypeRequiresCast.size() <= resultRegDests.size());
+ assert(resultRegIsFlagReg.size() <= resultRegDests.size());
+
+ for (unsigned i = 0, e = regResults.size(); i != e; ++i) {
+ mlir::Value tmp = regResults[i];
+ mlir::Type truncTy = resultTruncRegTypes[i];
+
+ if (i < resultRegIsFlagReg.size() && resultRegIsFlagReg[i])
+ assert(!cir::MissingFeatures::asmLLVMAssume());
+
+ // If the result type of the LLVM IR asm doesn't match the result type of
+ // the expression, do the conversion.
+ if (resultRegTypes[i] != truncTy) {
+
+ // Truncate the integer result to the right size, note that TruncTy can
be
+ // a pointer.
+ if (mlir::isa<mlir::FloatType>(truncTy)) {
----------------
andykaylor wrote:
```suggestion
if (mlir::isa<cir::FPTypeInterface>(truncTy)) {
```
https://github.com/llvm/llvm-project/pull/176006
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