github-actions[bot] wrote:
<!--LLVM CODE FORMAT COMMENT: {clang-format}-->
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<details>
<summary>
You can test this locally with the following command:
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``````````bash
git-clang-format --diff origin/main HEAD --extensions h,c,cpp --
clang/lib/Basic/Targets.cpp clang/lib/Basic/Targets/TCE.cpp
clang/lib/Basic/Targets/TCE.h clang/lib/CodeGen/CodeGenModule.cpp
clang/lib/Driver/Driver.cpp clang/lib/Driver/ToolChains/TCE.cpp
clang/lib/Driver/ToolChains/TCE.h clang/test/CodeGen/target-data.c
llvm/include/llvm/TargetParser/Triple.h
llvm/lib/TargetParser/TargetDataLayout.cpp llvm/lib/TargetParser/Triple.cpp
--diff_from_common_commit
``````````
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changing `origin/main` to the base branch/commit you want to compare against.
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View the diff from clang-format here.
</summary>
``````````diff
diff --git a/llvm/include/llvm/TargetParser/Triple.h
b/llvm/include/llvm/TargetParser/Triple.h
index 5bfd27dc5..1e5ebff18 100644
--- a/llvm/include/llvm/TargetParser/Triple.h
+++ b/llvm/include/llvm/TargetParser/Triple.h
@@ -84,30 +84,31 @@ public:
sparcel, // Sparc: (endianness = little). NB: 'Sparcle' is a CPU
variant
systemz, // SystemZ: s390x
tce, // OpenASIP (http://openasip.org) / big endian 32b targets:
tce
- tcele, // OpenASIP (http://openasip.org) / little endian 32b
targets: tcele
- tcele64, // OpenASIP (http://openasip.org) / little endian 64b
targets: tcele
- thumb, // Thumb (little endian): thumb, thumbv.*
- thumbeb, // Thumb (big endian): thumbeb
- x86, // X86: i[3-9]86
- x86_64, // X86-64: amd64, x86_64
- xcore, // XCore: xcore
- xtensa, // Tensilica: Xtensa
- nvptx, // NVPTX: 32-bit
- nvptx64, // NVPTX: 64-bit
- amdil, // AMDIL
- amdil64, // AMDIL with 64-bit pointers
- hsail, // AMD HSAIL
- hsail64, // AMD HSAIL with 64-bit pointers
- spir, // SPIR: standard portable IR for OpenCL 32-bit version
- spir64, // SPIR: standard portable IR for OpenCL 64-bit version
- spirv, // SPIR-V with logical memory layout.
- spirv32, // SPIR-V with 32-bit pointers
- spirv64, // SPIR-V with 64-bit pointers
- kalimba, // Kalimba: generic kalimba
- shave, // SHAVE: Movidius vector VLIW processors
- lanai, // Lanai: Lanai 32-bit
- wasm32, // WebAssembly with 32-bit pointers
- wasm64, // WebAssembly with 64-bit pointers
+ tcele, // OpenASIP (http://openasip.org) / little endian 32b targets: tcele
+ tcele64, // OpenASIP (http://openasip.org) / little endian 64b targets:
+ // tcele
+ thumb, // Thumb (little endian): thumb, thumbv.*
+ thumbeb, // Thumb (big endian): thumbeb
+ x86, // X86: i[3-9]86
+ x86_64, // X86-64: amd64, x86_64
+ xcore, // XCore: xcore
+ xtensa, // Tensilica: Xtensa
+ nvptx, // NVPTX: 32-bit
+ nvptx64, // NVPTX: 64-bit
+ amdil, // AMDIL
+ amdil64, // AMDIL with 64-bit pointers
+ hsail, // AMD HSAIL
+ hsail64, // AMD HSAIL with 64-bit pointers
+ spir, // SPIR: standard portable IR for OpenCL 32-bit version
+ spir64, // SPIR: standard portable IR for OpenCL 64-bit version
+ spirv, // SPIR-V with logical memory layout.
+ spirv32, // SPIR-V with 32-bit pointers
+ spirv64, // SPIR-V with 64-bit pointers
+ kalimba, // Kalimba: generic kalimba
+ shave, // SHAVE: Movidius vector VLIW processors
+ lanai, // Lanai: Lanai 32-bit
+ wasm32, // WebAssembly with 32-bit pointers
+ wasm64, // WebAssembly with 64-bit pointers
renderscript32, // 32-bit RenderScript
renderscript64, // 64-bit RenderScript
ve, // NEC SX-Aurora Vector Engine
diff --git a/llvm/lib/TargetParser/Triple.cpp b/llvm/lib/TargetParser/Triple.cpp
index 33929762d..aa0c5655d 100644
--- a/llvm/lib/TargetParser/Triple.cpp
+++ b/llvm/lib/TargetParser/Triple.cpp
@@ -79,7 +79,8 @@ StringRef Triple::getArchTypeName(ArchType Kind) {
case systemz: return "s390x";
case tce: return "tce";
case tcele: return "tcele";
- case tcele64: return "tcele64";
+ case tcele64:
+ return "tcele64";
case thumb: return "thumb";
case thumbeb: return "thumbeb";
case ve: return "ve";
@@ -1900,7 +1901,9 @@ Triple Triple::get32BitArchVariant() const {
case Triple::spirv64:
T.setArch(Triple::spirv32, getSubArch());
break;
- case Triple::tcele64: T.setArch(Triple::tcele); break;
+ case Triple::tcele64:
+ T.setArch(Triple::tcele);
+ break;
case Triple::wasm64: T.setArch(Triple::wasm32); break;
case Triple::x86_64: T.setArch(Triple::x86); break;
}
@@ -1982,7 +1985,9 @@ Triple Triple::get64BitArchVariant() const {
case Triple::spirv32:
T.setArch(Triple::spirv64, getSubArch());
break;
- case Triple::tcele: T.setArch(Triple::tcele64); break;
+ case Triple::tcele:
+ T.setArch(Triple::tcele64);
+ break;
case Triple::thumb: T.setArch(Triple::aarch64); break;
case Triple::thumbeb: T.setArch(Triple::aarch64_be); break;
case Triple::wasm32: T.setArch(Triple::wasm64); break;
``````````
</details>
https://github.com/llvm/llvm-project/pull/176698
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