Author: Ricardo Jesus Date: 2026-01-20T08:23:29Z New Revision: b691522e75e05af5ba594e250dc947a9c27802ba
URL: https://github.com/llvm/llvm-project/commit/b691522e75e05af5ba594e250dc947a9c27802ba DIFF: https://github.com/llvm/llvm-project/commit/b691522e75e05af5ba594e250dc947a9c27802ba.diff LOG: [AArch64] Disable FEAT_RNG on Grace. (#166387) The FIXME in the test changed should be cleared by #176340. Added: Modified: clang/test/Driver/print-enabled-extensions/aarch64-grace.c llvm/lib/Target/AArch64/AArch64Processors.td Removed: ################################################################################ diff --git a/clang/test/Driver/print-enabled-extensions/aarch64-grace.c b/clang/test/Driver/print-enabled-extensions/aarch64-grace.c index b66e649965489..d653476410b32 100644 --- a/clang/test/Driver/print-enabled-extensions/aarch64-grace.c +++ b/clang/test/Driver/print-enabled-extensions/aarch64-grace.c @@ -1,6 +1,7 @@ // REQUIRES: aarch64-registered-target,aarch64-host,system-linux // RUN: %clang --target=aarch64 --print-enabled-extensions -mcpu=grace | FileCheck --strict-whitespace --implicit-check-not=FEAT_ %s -// RUN: env LLVM_CPUINFO=%S/../Inputs/cpunative/grace %clang --target=aarch64 --print-enabled-extensions -mcpu=native | FileCheck --strict-whitespace --implicit-check-not=FEAT_ %s +// FIXME: mcpu=native should disable FEAT_RNG. +// RUN: env LLVM_CPUINFO=%S/../Inputs/cpunative/grace %clang --target=aarch64 --print-enabled-extensions -mcpu=native | FileCheck --check-prefixes=CHECK,NATIVE --strict-whitespace --implicit-check-not=FEAT_ %s // CHECK: Extensions enabled for the given AArch64 target // CHECK-EMPTY: @@ -42,7 +43,7 @@ // CHECK-NEXT: FEAT_PMUv3 Enable Armv8.0-A PMUv3 Performance Monitors extension // CHECK-NEXT: FEAT_RAS, FEAT_RASv1p1 Enable Armv8.0-A Reliability, Availability and Serviceability Extensions // CHECK-NEXT: FEAT_RDM Enable Armv8.1-A Rounding Double Multiply Add/Subtract instructions -// CHECK-NEXT: FEAT_RNG Enable Random Number generation instructions +// NATIVE-NEXT: FEAT_RNG Enable Random Number generation instructions // CHECK-NEXT: FEAT_SB Enable Armv8.5-A Speculation Barrier // CHECK-NEXT: FEAT_SEL2 Enable Armv8.4-A Secure Exception Level 2 extension // CHECK-NEXT: FEAT_SHA1, FEAT_SHA256 Enable SHA1 and SHA256 support diff --git a/llvm/lib/Target/AArch64/AArch64Processors.td b/llvm/lib/Target/AArch64/AArch64Processors.td index 3ebfb002ba2da..8f17adba34cf9 100644 --- a/llvm/lib/Target/AArch64/AArch64Processors.td +++ b/llvm/lib/Target/AArch64/AArch64Processors.td @@ -1385,7 +1385,7 @@ def ProcessorFeatures { FeatureSSBS, FeatureCCIDX, FeatureJS, FeatureLSE, FeatureRAS, FeatureRCPC, FeatureRDM]; list<SubtargetFeature> GB10 = !listconcat(X925, [FeatureSVEAES, FeatureSVESHA3, FeatureSVESM4]); - list<SubtargetFeature> Grace = !listconcat(NeoverseV2, [FeatureSVESM4, FeatureSVEAES, FeatureSVESHA3]); + list<SubtargetFeature> Grace = !listconcat(!listremove(NeoverseV2, [FeatureRandGen]), [FeatureSVESM4, FeatureSVEAES, FeatureSVESHA3]); // ETE and TRBE are future architecture extensions. We temporarily enable them // by default for users targeting generic AArch64. The extensions do not _______________________________________________ cfe-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
