Author: Alexey Bader Date: 2026-02-04T12:56:14-08:00 New Revision: 9e146f757b26944cf639114d49aab7e5e9a24865
URL: https://github.com/llvm/llvm-project/commit/9e146f757b26944cf639114d49aab7e5e9a24865 DIFF: https://github.com/llvm/llvm-project/commit/9e146f757b26944cf639114d49aab7e5e9a24865.diff LOG: [NFC][clang-sycl-linker] Rename runSPIRVCodeGen to runCodeGen. (#179372) `runSPIRVCodeGen` function doesn't use SPIR-V backend explicitly. The backend is chosen based on `-triple` option value. Technically `clang-sycl-linker` tool can emit PTX or a binary format based on the triple value. Fixed comments. Added: Modified: clang/test/Driver/clang-sycl-linker-test.cpp clang/tools/clang-sycl-linker/ClangSYCLLinker.cpp Removed: ################################################################################ diff --git a/clang/test/Driver/clang-sycl-linker-test.cpp b/clang/test/Driver/clang-sycl-linker-test.cpp index 8d26dc074b5e3..55f56bd2958f7 100644 --- a/clang/test/Driver/clang-sycl-linker-test.cpp +++ b/clang/test/Driver/clang-sycl-linker-test.cpp @@ -8,7 +8,7 @@ // RUN: clang-sycl-linker --dry-run -v -triple=spirv64 %t_1.bc %t_2.bc -o a.spv 2>&1 \ // RUN: | FileCheck %s --check-prefix=SIMPLE-FO // SIMPLE-FO: sycl-device-link: inputs: {{.*}}.bc, {{.*}}.bc libfiles: output: [[LLVMLINKOUT:.*]].bc -// SIMPLE-FO-NEXT: SPIR-V Backend: input: [[LLVMLINKOUT]].bc, output: a_0.spv +// SIMPLE-FO-NEXT: LLVM backend: input: [[LLVMLINKOUT]].bc, output: a_0.spv // // Test the dry run of a simple case with device library files specified. // RUN: mkdir -p %t.dir @@ -17,7 +17,7 @@ // RUN: clang-sycl-linker --dry-run -v -triple=spirv64 %t_1.bc %t_2.bc --library-path=%t.dir --device-libs=lib1.bc,lib2.bc -o a.spv 2>&1 \ // RUN: | FileCheck %s --check-prefix=DEVLIBS // DEVLIBS: sycl-device-link: inputs: {{.*}}.bc libfiles: {{.*}}lib1.bc, {{.*}}lib2.bc output: [[LLVMLINKOUT:.*]].bc -// DEVLIBS-NEXT: SPIR-V Backend: input: [[LLVMLINKOUT]].bc, output: a_0.spv +// DEVLIBS-NEXT: LLVM backend: input: [[LLVMLINKOUT]].bc, output: a_0.spv // // Test a simple case with a random file (not bitcode) as input. // RUN: touch %t.o @@ -38,7 +38,7 @@ // RUN: --ocloc-options="-a -b" \ // RUN: | FileCheck %s --check-prefix=AOT-INTEL-GPU // AOT-INTEL-GPU: sycl-device-link: inputs: {{.*}}.bc, {{.*}}.bc libfiles: output: [[LLVMLINKOUT:.*]].bc -// AOT-INTEL-GPU-NEXT: SPIR-V Backend: input: [[LLVMLINKOUT]].bc, output: [[SPIRVTRANSLATIONOUT:.*]]_0.spv +// AOT-INTEL-GPU-NEXT: LLVM backend: input: [[LLVMLINKOUT]].bc, output: [[SPIRVTRANSLATIONOUT:.*]]_0.spv // AOT-INTEL-GPU-NEXT: "{{.*}}ocloc{{.*}}" {{.*}}-device bmg_g21 -a -b {{.*}}-output a_0.out -file [[SPIRVTRANSLATIONOUT]]_0.spv // // Test AOT compilation for an Intel CPU. @@ -46,7 +46,7 @@ // RUN: --opencl-aot-options="-a -b" \ // RUN: | FileCheck %s --check-prefix=AOT-INTEL-CPU // AOT-INTEL-CPU: sycl-device-link: inputs: {{.*}}.bc, {{.*}}.bc libfiles: output: [[LLVMLINKOUT:.*]].bc -// AOT-INTEL-CPU-NEXT: SPIR-V Backend: input: [[LLVMLINKOUT]].bc, output: [[SPIRVTRANSLATIONOUT:.*]]_0.spv +// AOT-INTEL-CPU-NEXT: LLVM backend: input: [[LLVMLINKOUT]].bc, output: [[SPIRVTRANSLATIONOUT:.*]]_0.spv // AOT-INTEL-CPU-NEXT: "{{.*}}opencl-aot{{.*}}" {{.*}}--device=cpu -a -b {{.*}}-o a_0.out [[SPIRVTRANSLATIONOUT]]_0.spv // // Check that the output file must be specified. diff --git a/clang/tools/clang-sycl-linker/ClangSYCLLinker.cpp b/clang/tools/clang-sycl-linker/ClangSYCLLinker.cpp index de20e74360fbc..6c400e39405f6 100644 --- a/clang/tools/clang-sycl-linker/ClangSYCLLinker.cpp +++ b/clang/tools/clang-sycl-linker/ClangSYCLLinker.cpp @@ -12,6 +12,7 @@ // with the fully linked source bitcode file(s), running several SYCL specific // post-link steps on the fully linked bitcode file(s), and finally generating // target-specific device code. +// //===---------------------------------------------------------------------===// #include "clang/Basic/OffloadArch.h" @@ -54,7 +55,7 @@ using namespace clang; /// Save intermediary results. static bool SaveTemps = false; -/// Print arguments without executing. +/// Print commands/steps with arguments without executing. static bool DryRun = false; /// Print verbose output. @@ -312,13 +313,15 @@ Expected<StringRef> linkDeviceCode(ArrayRef<std::string> InputFiles, return *BitcodeOutput; } -/// Run LLVM to SPIR-V translation. -/// Converts 'File' from LLVM bitcode to SPIR-V format using SPIR-V backend. -/// 'Args' encompasses all arguments required for linking device code and will -/// be parsed to generate options required to be passed into the backend. -static Error runSPIRVCodeGen(StringRef File, const ArgList &Args, - StringRef OutputFile, LLVMContext &C) { - llvm::TimeTraceScope TimeScope("SPIR-V code generation"); +/// Run Code Generation using LLVM backend. +/// \param 'File' The input LLVM IR bitcode file. +/// \param 'Args' encompasses all arguments required for linking device code and +/// will be parsed to generate options required to be passed into the backend. +/// \param 'OutputFile' The output file name. +/// \param 'C' The LLVM context. +static Error runCodeGen(StringRef File, const ArgList &Args, + StringRef OutputFile, LLVMContext &C) { + llvm::TimeTraceScope TimeScope("Code generation"); // Parse input module. SMDiagnostic Err; @@ -332,13 +335,13 @@ static Error runSPIRVCodeGen(StringRef File, const ArgList &Args, Triple TargetTriple(Args.getLastArgValue(OPT_triple_EQ)); M->setTargetTriple(TargetTriple); - // Get a handle to SPIR-V target backend. + // Get a handle to a target backend. std::string Msg; const Target *T = TargetRegistry::lookupTarget(M->getTargetTriple(), Msg); if (!T) return createStringError(Msg + ": " + M->getTargetTriple().str()); - // Allocate SPIR-V target machine. + // Allocate target machine. TargetOptions Options; std::optional<Reloc::Model> RM; std::optional<CodeModel::Model> CM; @@ -358,17 +361,16 @@ static Error runSPIRVCodeGen(StringRef File, const ArgList &Args, return errorCodeToError(EC); auto OS = std::make_unique<llvm::raw_fd_ostream>(FD, true); - // Run SPIR-V codegen passes to generate SPIR-V file. legacy::PassManager CodeGenPasses; TargetLibraryInfoImpl TLII(M->getTargetTriple()); CodeGenPasses.add(new TargetLibraryInfoWrapperPass(TLII)); if (TM->addPassesToEmitFile(CodeGenPasses, *OS, nullptr, CodeGenFileType::ObjectFile)) - return createStringError("Failed to execute SPIR-V Backend"); + return createStringError("Failed to execute LLVM backend"); CodeGenPasses.run(*M); if (Verbose) - errs() << formatv("SPIR-V Backend: input: {0}, output: {1}\n", File, + errs() << formatv("LLVM backend: input: {0}, output: {1}\n", File, OutputFile); return Error::success(); @@ -507,11 +509,11 @@ Error runSYCLLink(ArrayRef<std::string> Files, const ArgList &Args) { bool IsAOTCompileNeeded = IsIntelOffloadArch( StringToOffloadArch(Args.getLastArgValue(OPT_arch_EQ))); - // SPIR-V code generation step. + // Code generation step. for (size_t I = 0, E = SplitModules.size(); I != E; ++I) { StringRef Stem = OutputFile.rsplit('.').first; std::string SPVFile = (Stem + "_" + Twine(I) + ".spv").str(); - if (Error Err = runSPIRVCodeGen(SplitModules[I], Args, SPVFile, C)) + if (Error Err = runCodeGen(SplitModules[I], Args, SPVFile, C)) return Err; if (!IsAOTCompileNeeded) { SplitModules[I] = SPVFile; _______________________________________________ cfe-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
