================
@@ -1026,6 +1036,70 @@ void SystemZAsmPrinter::LowerPATCHABLE_RET(const
MachineInstr &MI,
recordSled(BeginOfSled, MI, SledKind::FUNCTION_EXIT, 2);
}
+void SystemZAsmPrinter::lowerLOAD_TLS_BLOCK_ADDR(const MachineInstr &MI,
+ SystemZMCInstLower &Lower) {
+ Register AddrReg = MI.getOperand(0).getReg();
+ const MachineRegisterInfo &MRI = MI.getParent()->getParent()->getRegInfo();
+
+ // EAR can only load the low subregister so use a shift for %a0 to produce
+ // the GR containing %a0 and %a1.
+ const Register Reg32 =
+ MRI.getTargetRegisterInfo()->getSubReg(AddrReg, SystemZ::subreg_l32);
+
+ // ear <reg>, %a0
+ EmitToStreamer(*OutStreamer,
+
MCInstBuilder(SystemZ::EAR).addReg(Reg32).addReg(SystemZ::A0));
+
+ // sllg <reg>, <reg>, 32
+ EmitToStreamer(*OutStreamer, MCInstBuilder(SystemZ::SLLG)
+ .addReg(AddrReg)
+ .addReg(AddrReg)
+ .addReg(0)
+ .addImm(32));
+
+ // ear <reg>, %a1
+ EmitToStreamer(*OutStreamer,
+
MCInstBuilder(SystemZ::EAR).addReg(Reg32).addReg(SystemZ::A1));
+ return;
----------------
uweigand wrote:
Minor nit: we don't need an explicit return statement here.
https://github.com/llvm/llvm-project/pull/169317
_______________________________________________
cfe-commits mailing list
[email protected]
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
