================
@@ -67,7 +67,7 @@ class X86Subtarget final : public X86GenSubtargetInfo {
bool ATTRIBUTE = DEFAULT;
#include "X86GenSubtargetInfo.inc"
/// ReservedRReg R#i is not available as a general purpose register.
- BitVector ReservedRReg;
+ std::bitset<X86::NUM_TARGET_REGS> ReservedRReg;
----------------
aengelke wrote:
This is only about r8-r31. Why has this 388 bits instead of 24 or 32?
https://github.com/llvm/llvm-project/pull/184606
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