https://github.com/AmrDeveloper created https://github.com/llvm/llvm-project/pull/185279
Add support for the CXXStdInitializerListExpr >From fc1928ed44bb8ee9501813070cade36abd985a6e Mon Sep 17 00:00:00 2001 From: Amr Hesham <[email protected]> Date: Sun, 8 Mar 2026 12:33:54 +0100 Subject: [PATCH] [CIR] Add support for CXXStdInitializerListExpr --- clang/lib/CIR/CodeGen/CIRGenExprAggregate.cpp | 51 ++++++++- clang/test/CIR/CodeGen/instantiate-init.cpp | 105 ++++++++++++++++++ 2 files changed, 154 insertions(+), 2 deletions(-) create mode 100644 clang/test/CIR/CodeGen/instantiate-init.cpp diff --git a/clang/lib/CIR/CodeGen/CIRGenExprAggregate.cpp b/clang/lib/CIR/CodeGen/CIRGenExprAggregate.cpp index d4f354d5dd94d..9f390fec97613 100644 --- a/clang/lib/CIR/CodeGen/CIRGenExprAggregate.cpp +++ b/clang/lib/CIR/CodeGen/CIRGenExprAggregate.cpp @@ -378,10 +378,57 @@ class AggExprEmitter : public StmtVisitor<AggExprEmitter> { cgf.cgm.errorNYI(e->getSourceRange(), "AggExprEmitter: VisitCXXInheritedCtorInitExpr"); } + + /// Emit the initializer for a std::initializer_list initialized with a + /// real initializer list. void VisitCXXStdInitializerListExpr(CXXStdInitializerListExpr *e) { - cgf.cgm.errorNYI(e->getSourceRange(), - "AggExprEmitter: VisitCXXStdInitializerListExpr"); + ASTContext &ctx = cgf.getContext(); + CIRGenBuilderTy builder = cgf.getBuilder(); + mlir::Location loc = cgf.getLoc(e->getExprLoc()); + + LValue array = cgf.emitLValue(e->getSubExpr()); + assert(array.isSimple() && "initializer_list array not a simple lvalue"); + Address arrayPtr = array.getAddress(); + + const ConstantArrayType *arrayType = + ctx.getAsConstantArrayType(e->getSubExpr()->getType()); + assert(arrayType && "std::initializer_list constructed from non-array"); + + auto *record = e->getType()->castAsRecordDecl(); + RecordDecl::field_iterator field = record->field_begin(); + assert(field != record->field_end() && + ctx.hasSameType(field->getType()->getPointeeType(), + arrayType->getElementType()) && + "Expected std::initializer_list first field to be const E *"); + + // Start pointer. + AggValueSlot dest = ensureSlot(loc, e->getType()); + LValue destLV = cgf.makeAddrLValue(dest.getAddress(), e->getType()); + LValue start = + cgf.emitLValueForFieldInitialization(destLV, *field, field->getName()); + + mlir::Value arrayStart = arrayPtr.emitRawPointer(); + cgf.emitStoreThroughLValue(RValue::get(arrayStart), start); + ++field; + assert(field != record->field_end() && + "Expected std::initializer_list to have two fields"); + + cir::ConstantOp size = builder.getConstInt(loc, arrayType->getSize()); + LValue endOrLength = + cgf.emitLValueForFieldInitialization(destLV, *field, field->getName()); + if (ctx.hasSameType(field->getType(), ctx.getSizeType())) { + // Length. + cgf.emitStoreThroughLValue(RValue::get(size), endOrLength); + } else { + cgf.cgm.errorNYI( + "Aggregate VisitCXXStdInitializerListExpr: field type != sizeTy"); + return; + } + + assert(++field == record->field_end() && + "Expected std::initializer_list to only have two fields"); } + void VisitCXXScalarValueInitExpr(CXXScalarValueInitExpr *e) { cgf.cgm.errorNYI(e->getSourceRange(), "AggExprEmitter: VisitCXXScalarValueInitExpr"); diff --git a/clang/test/CIR/CodeGen/instantiate-init.cpp b/clang/test/CIR/CodeGen/instantiate-init.cpp new file mode 100644 index 0000000000000..b7f25eb9fd1ec --- /dev/null +++ b/clang/test/CIR/CodeGen/instantiate-init.cpp @@ -0,0 +1,105 @@ +// RUN: %clang_cc1 -std=c++20 -triple x86_64-unknown-linux-gnu -Wno-unused-value -fclangir -emit-cir %s -o %t.cir +// RUN: FileCheck --input-file=%t.cir %s -check-prefix=CIR +// RUN: %clang_cc1 -std=c++20 -triple x86_64-unknown-linux-gnu -Wno-unused-value -fclangir -emit-llvm %s -o %t-cir.ll +// RUN: FileCheck --input-file=%t-cir.ll %s -check-prefix=LLVM +// RUN: %clang_cc1 -std=c++20 -triple x86_64-unknown-linux-gnu -Wno-unused-value -emit-llvm %s -o %t.ll +// RUN: FileCheck --input-file=%t.ll %s -check-prefix=OGCG + +namespace std { +template <typename T> class initializer_list { + const T *data; + __SIZE_TYPE__ size; + +public: + initializer_list(); +}; +} // namespace std + +struct Vector { + Vector(std::initializer_list<int>); + ~Vector(); +}; + +void init_vec_using_initalizer_list() { + Vector vec = {0, 1, 2}; +} + +// CIR: %[[VEC_ADDR:.*]] = cir.alloca !rec_Vector, !cir.ptr<!rec_Vector>, ["vec", init] +// CIR: cir.scope { +// CIR: %[[AGG_ADDR:.*]] = cir.alloca !rec_std3A3Ainitializer_list3Cint3E, !cir.ptr<!rec_std3A3Ainitializer_list3Cint3E>, ["agg.tmp0"] +// CIR: %[[INIT_LIST_ADDR:.*]] = cir.alloca !cir.array<!s32i x 3>, !cir.ptr<!cir.array<!s32i x 3>>, ["ref.tmp0"] +// CIR: %[[INIT_LIST_PTR:.*]] = cir.cast array_to_ptrdecay %[[INIT_LIST_ADDR]] : !cir.ptr<!cir.array<!s32i x 3>> -> !cir.ptr<!s32i> +// CIR: %[[CONST_S32_0:.*]] = cir.const #cir.int<0> : !s32i +// CIR: cir.store {{.*}} %[[CONST_S32_0]], %[[INIT_LIST_PTR]] : !s32i, !cir.ptr<!s32i> +// CIR: %[[CONST_S64_1:.*]] = cir.const #cir.int<1> : !s64i +// CIR: %[[ELEM_1_PTR:.*]] = cir.ptr_stride %[[INIT_LIST_PTR]], %[[CONST_S64_1]] : (!cir.ptr<!s32i>, !s64i) -> !cir.ptr<!s32i> +// CIR: %[[CONST_S32_1:.*]] = cir.const #cir.int<1> : !s32i +// CIR: cir.store {{.*}} %[[CONST_S32_1]], %[[ELEM_1_PTR]] : !s32i, !cir.ptr<!s32i> +// CIR: %[[CONST_S64_2:.*]] = cir.const #cir.int<2> : !s64i +// CIR: %[[ELEM_2_PTR:.*]] = cir.ptr_stride %[[INIT_LIST_PTR]], %[[CONST_S64_2]] : (!cir.ptr<!s32i>, !s64i) -> !cir.ptr<!s32i> +// CIR: %[[CONST_S32_2:.*]] = cir.const #cir.int<2> : !s32i +// CIR: cir.store {{.*}} %[[CONST_S32_2]], %[[ELEM_2_PTR]] : !s32i, !cir.ptr<!s32i> +// CIR: %[[DATA_PTR:.*]] = cir.get_member %[[AGG_ADDR]][0] {name = "data"} : !cir.ptr<!rec_std3A3Ainitializer_list3Cint3E> -> !cir.ptr<!cir.ptr<!s32i>> +// CIR: %[[DATA_ARR_PTR:.*]] = cir.cast bitcast %[[DATA_PTR]] : !cir.ptr<!cir.ptr<!s32i>> -> !cir.ptr<!cir.ptr<!cir.array<!s32i x 3>>> +// CIR: cir.store {{.*}} %[[INIT_LIST_ADDR]], %[[DATA_ARR_PTR]] : !cir.ptr<!cir.array<!s32i x 3>>, !cir.ptr<!cir.ptr<!cir.array<!s32i x 3>>> +// CIR: %[[CONST_U64_3:.*]] = cir.const #cir.int<3> : !u64i +// CIR: %[[SIZE_PTR:.*]] = cir.get_member %[[AGG_ADDR]][1] {name = "size"} : !cir.ptr<!rec_std3A3Ainitializer_list3Cint3E> -> !cir.ptr<!u64i> +// CIR: cir.store {{.*}} %[[CONST_U64_3]], %[[SIZE_PTR]] : !u64i, !cir.ptr<!u64i> +// CIR: %[[TMP_AGG:.*]] = cir.load {{.*}} %[[AGG_ADDR]] : !cir.ptr<!rec_std3A3Ainitializer_list3Cint3E>, !rec_std3A3Ainitializer_list3Cint3E +// CIR: cir.call @_ZN6VectorC1ESt16initializer_listIiE(%[[VEC_ADDR]], %[[TMP_AGG]]) : (!cir.ptr<!rec_Vector> {llvm.align = 1 : i64, llvm.dereferenceable = 1 : i64, llvm.nonnull, llvm.noundef}, !rec_std3A3Ainitializer_list3Cint3E) -> () +// CIR: } +// CIR: cir.cleanup.scope { +// CIR: cir.yield +// CIR: } cleanup normal { +// CIR: cir.call @_ZN6VectorD1Ev(%[[VEC_ADDR]]) nothrow : (!cir.ptr<!rec_Vector> {llvm.align = 1 : i64, llvm.dereferenceable = 1 : i64, llvm.nonnull, llvm.noundef}) -> () +// CIR: cir.yield +// CIR: } + +// LLVM: %[[AGG_ADDR:.*]] = alloca %"class.std::initializer_list<int>", i64 1, align 8 +// LLVM: %[[INIT_LIST_ADDR:.*]] = alloca [3 x i32], i64 1, align 4 +// LLVM: %[[VEC_ADDR:.*]] = alloca %struct.Vector, i64 1, align 1 +// LLVM: br label %[[SCOPE_START:.*]] +// LLVM: [[SCOPE_START]]: +// LLVM: %[[INIT_LIST_PTR:.*]] = getelementptr i32, ptr %[[INIT_LIST_ADDR]], i32 0 +// LLVM: store i32 0, ptr %[[INIT_LIST_PTR]], align 4 +// LLVM: %[[ELEM_1_PTR:.*]] = getelementptr i32, ptr %[[INIT_LIST_PTR]], i64 1 +// LLVM: store i32 1, ptr %[[ELEM_1_PTR]], align 4 +// LLVM: %[[ELEM_2_PTR:.*]] = getelementptr i32, ptr %[[INIT_LIST_PTR]], i64 2 +// LLVM: store i32 2, ptr %[[ELEM_2_PTR]], align 4 +// LLVM: %[[DATA_PTR:.*]] = getelementptr %"class.std::initializer_list<int>", ptr %[[AGG_ADDR]], i32 0, i32 0 +// LLVM: store ptr %[[INIT_LIST_ADDR]], ptr %[[DATA_PTR]], align 8 +// LLVM: %[[SIZE_PTR:.*]] = getelementptr %"class.std::initializer_list<int>", ptr %[[AGG_ADDR]], i32 0, i32 1 +// LLVM: store i64 3, ptr %[[SIZE_PTR]], align 8 +// LLVM: %[[TMP_AGG:.*]] = load %"class.std::initializer_list<int>", ptr %[[AGG_ADDR]], align 8 +// LLVM: call void @_ZN6VectorC1ESt16initializer_listIiE(ptr noundef nonnull align 1 dereferenceable(1) %[[VEC_ADDR]], %"class.std::initializer_list<int>" %[[TMP_AGG]]) +// LLVM: br label %[[SCOPE_CONT:.*]] +// LLVM: [[SCOPE_CONT]]: +// LLVM: br label %[[CLEANUP_START:.*]] +// LLVM: [[CLEANUP_START]]: +// LLVM: br label %[[CLEANUO_BODY:.*]] +// LLVM: [[CLEANUO_BODY:]]: +// LLVM: call void @_ZN6VectorD1Ev(ptr noundef nonnull align 1 dereferenceable(1) %[[VEC_ADDR]]) +// LLVM: br label %[[CLEANUP_CONT:.*]] +// LLVM: [[CLEANUP_CONT]]: +// LLVM: br label %[[DONE:.*]] +// LLVM: [[DONE]]: +// LLVM: ret void + +// OGCG: %[[VEC_ADDR:.*]] = alloca %struct.Vector, align 1 +// OGCG: %[[AGG_ADDR:.*]] = alloca %"class.std::initializer_list", align 8 +// OGCG: %[[INIT_LIST_ADDR:.*]] = alloca [3 x i32], align 4 +// OGCG: store i32 0, ptr %[[INIT_LIST_ADDR]], align 4 +// OGCG: %[[ELEM_1_PTR:.*]] = getelementptr inbounds i32, ptr %[[INIT_LIST_ADDR]], i64 1 +// OGCG: store i32 1, ptr %[[ELEM_1_PTR]], align 4 +// OGCG: %[[ELEM_2_PTR:.*]] = getelementptr inbounds i32, ptr %[[INIT_LIST_ADDR]], i64 2 +// OGCG: store i32 2, ptr %[[ELEM_2_PTR]], align 4 +// OGCG: %[[DATA_PTR:.*]] = getelementptr inbounds nuw %"class.std::initializer_list", ptr %[[AGG_ADDR]], i32 0, i32 0 +// OGCG: store ptr %ref.tmp, ptr %[[DATA_PTR]], align 8 +// OGCG: %[[SIZE_PTR:.*]] = getelementptr inbounds nuw %"class.std::initializer_list", ptr %[[AGG_ADDR]], i32 0, i32 1 +// OGCG: store i64 3, ptr %[[SIZE_PTR]], align 8 +// OGCG: %[[DATA_PTR:.*]] = getelementptr inbounds nuw { ptr, i64 }, ptr %[[AGG_ADDR]], i32 0, i32 0 +// OGCG: %[[TMP_DATA:.*]] = load ptr, ptr %[[DATA_PTR]], align 8 +// OGCG: %[[SIZE_PTR:.*]] = getelementptr inbounds nuw { ptr, i64 }, ptr %[[AGG_ADDR]], i32 0, i32 1 +// OGCG: %[[TMP_SIZE:.*]] = load i64, ptr %[[SIZE_PTR]], align 8 +// OGCG: call void @_ZN6VectorC1ESt16initializer_listIiE(ptr noundef nonnull align 1 dereferenceable(1) %[[VEC_ADDR]], ptr %[[TMP_DATA]], i64 %[[TMP_SIZE]]) +// OGCG: call void @_ZN6VectorD1Ev(ptr noundef nonnull align 1 dereferenceable(1) %[[VEC_ADDR]]) _______________________________________________ cfe-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
