https://github.com/paperchalice updated https://github.com/llvm/llvm-project/pull/186285
>From 6f52cb823f660d5dfa79e7231c67b278547003cc Mon Sep 17 00:00:00 2001 From: PaperChalice <[email protected]> Date: Thu, 12 Mar 2026 14:52:41 +0800 Subject: [PATCH 1/3] [LLVM] Remove "no-nans-fp-math" attribute support --- clang/lib/CodeGen/BackendUtil.cpp | 1 - clang/lib/CodeGen/CGCall.cpp | 2 - clang/lib/CodeGen/CodeGenFunction.cpp | 1 - clang/test/CodeGen/fp-function-attrs.cpp | 4 +- clang/test/CodeGenOpenCL/amdgpu-ieee.cl | 4 +- clang/test/CodeGenOpenCL/relaxed-fpmath.cl | 6 --- clang/test/OpenMP/amdgcn-attributes.cpp | 4 +- .../flang/Optimizer/Transforms/Passes.td | 2 +- .../lib/Optimizer/Transforms/FunctionAttr.cpp | 4 -- flang/test/Driver/func-attr-fast-math.f90 | 4 +- llvm/include/llvm/CodeGen/CommandFlags.h | 2 - llvm/include/llvm/IR/Attributes.td | 2 - llvm/include/llvm/Target/TargetOptions.h | 8 +--- llvm/lib/CodeGen/CommandFlags.cpp | 9 ---- llvm/lib/Target/TargetMachine.cpp | 1 - .../CostModel/AArch64/sve-arith-fp.ll | 4 +- llvm/test/Analysis/CostModel/X86/arith-fma.ll | 10 ++--- llvm/test/Analysis/CostModel/X86/arith-fp.ll | 22 +++++----- llvm/test/Analysis/CostModel/X86/fround.ll | 18 ++++---- llvm/test/Analysis/CostModel/X86/powi.ll | 8 ++-- llvm/test/CodeGen/AArch64/arm64-fmax.ll | 2 +- llvm/test/CodeGen/AMDGPU/inline-attr.ll | 12 +++--- llvm/test/CodeGen/ARM/fp16-vminmaxnm.ll | 4 +- llvm/test/CodeGen/ARM/vminmaxnm.ll | 2 +- llvm/test/CodeGen/Mips/fmadd1.ll | 6 +-- llvm/test/CodeGen/Mips/fneg.ll | 6 +-- llvm/test/CodeGen/Mips/nmadd.ll | 22 +++++----- llvm/test/CodeGen/PowerPC/fsel.ll | 2 +- .../CodeGen/PowerPC/scalar-min-max-p10.ll | 1 - .../CodeGen/X86/avx512fp16-unsafe-fp-math.ll | 2 +- llvm/test/CodeGen/X86/fabs.ll | 2 +- ...ining-compatible-and-attribute-transfer.ll | 8 ++-- llvm/test/Transforms/Inline/attributes.ll | 42 ------------------- mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td | 1 - mlir/lib/Target/LLVMIR/ModuleImport.cpp | 5 --- mlir/lib/Target/LLVMIR/ModuleTranslation.cpp | 3 -- .../LLVMIR/Import/function-attributes.ll | 12 ------ .../LLVMIR/fp-math-function-attributes.mlir | 18 -------- 38 files changed, 75 insertions(+), 191 deletions(-) diff --git a/clang/lib/CodeGen/BackendUtil.cpp b/clang/lib/CodeGen/BackendUtil.cpp index 754bcc5d12b9b..4b4eaadcf1527 100644 --- a/clang/lib/CodeGen/BackendUtil.cpp +++ b/clang/lib/CodeGen/BackendUtil.cpp @@ -414,7 +414,6 @@ static bool initTargetOptions(const CompilerInstance &CI, if (CodeGenOpts.hasWasmExceptions()) Options.ExceptionModel = llvm::ExceptionHandling::Wasm; - Options.NoNaNsFPMath = LangOpts.NoHonorNaNs; Options.NoZerosInBSS = CodeGenOpts.NoZeroInitializedInBSS; Options.BBAddrMap = CodeGenOpts.BBAddrMap; diff --git a/clang/lib/CodeGen/CGCall.cpp b/clang/lib/CodeGen/CGCall.cpp index 6dfd0f915190a..4c0ea9ec3ea9c 100644 --- a/clang/lib/CodeGen/CGCall.cpp +++ b/clang/lib/CodeGen/CGCall.cpp @@ -2107,8 +2107,6 @@ static void getTrivialDefaultFunctionAttributes( // TODO: Are these all needed? // unsafe/inf/nan/nsz are handled by instruction-level FastMathFlags. - if (LangOpts.NoHonorNaNs) - FuncAttrs.addAttribute("no-nans-fp-math", "true"); if (CodeGenOpts.SoftFloat) FuncAttrs.addAttribute("use-soft-float", "true"); FuncAttrs.addAttribute("stack-protector-buffer-size", diff --git a/clang/lib/CodeGen/CodeGenFunction.cpp b/clang/lib/CodeGen/CodeGenFunction.cpp index 1dee656b5f2d0..fb0d5e450f9d6 100644 --- a/clang/lib/CodeGen/CodeGenFunction.cpp +++ b/clang/lib/CodeGen/CodeGenFunction.cpp @@ -178,7 +178,6 @@ void CodeGenFunction::CGFPOptionsRAII::ConstructorHelper(FPOptions FPFeatures) { if (OldValue != NewValue) CGF.CurFn->addFnAttr(Name, llvm::toStringRef(NewValue)); }; - mergeFnAttrValue("no-nans-fp-math", FPFeatures.getNoHonorNaNs()); mergeFnAttrValue("no-signed-zeros-fp-math", FPFeatures.getNoSignedZero()); } diff --git a/clang/test/CodeGen/fp-function-attrs.cpp b/clang/test/CodeGen/fp-function-attrs.cpp index dc1ca7ef00ea9..3d8d10b7e3fbd 100644 --- a/clang/test/CodeGen/fp-function-attrs.cpp +++ b/clang/test/CodeGen/fp-function-attrs.cpp @@ -53,5 +53,5 @@ float test_contract_on_pragma(float a, float b, float c) { // CHECK: fmul fast float {{%.+}}, {{%.+}} // CHECK: fadd reassoc nnan ninf nsz arcp afn float {{%.+}}, {{%.+}} -// CHECK: attributes [[FAST_ATTRS]] = { {{.*}}"no-nans-fp-math"="true" "no-signed-zeros-fp-math"="true"{{.*}} } -// CHECK: attributes [[PRECISE_ATTRS]] = { {{.*}}"no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false"{{.*}} } +// CHECK: attributes [[FAST_ATTRS]] = { {{.*}}"no-signed-zeros-fp-math"="true"{{.*}} } +// CHECK: attributes [[PRECISE_ATTRS]] = { {{.*}}"no-signed-zeros-fp-math"="false"{{.*}} } diff --git a/clang/test/CodeGenOpenCL/amdgpu-ieee.cl b/clang/test/CodeGenOpenCL/amdgpu-ieee.cl index a29ab47066958..35ddbcfb3d4bf 100644 --- a/clang/test/CodeGenOpenCL/amdgpu-ieee.cl +++ b/clang/test/CodeGenOpenCL/amdgpu-ieee.cl @@ -45,8 +45,8 @@ void fun() { } // ON-NOT: attributes [[ATTRS1]] = {{.*}} "amdgpu-ieee" -// OFF: attributes [[ATTRS1]] = {{.*}} "amdgpu-ieee"="false"{{.*}}"no-nans-fp-math"="true"{{.*}}"no-trapping-math"="true" +// OFF: attributes [[ATTRS1]] = {{.*}} "amdgpu-ieee"="false"{{.*}}"no-trapping-math"="true" // ON-NOT: attributes [[ATTRS2]] = {{.*}} "amdgpu-ieee" -// OFF: attributes [[ATTRS2]] = {{.*}} "amdgpu-ieee"="false"{{.*}}"no-nans-fp-math"="true"{{.*}}"no-trapping-math"="true" +// OFF: attributes [[ATTRS2]] = {{.*}} "amdgpu-ieee"="false"{{.*}}"no-trapping-math"="true" // DIAG: invalid argument '-mno-amdgpu-ieee' only allowed with relaxed NaN handling diff --git a/clang/test/CodeGenOpenCL/relaxed-fpmath.cl b/clang/test/CodeGenOpenCL/relaxed-fpmath.cl index 126947ba8fd7f..9228e2b680f38 100644 --- a/clang/test/CodeGenOpenCL/relaxed-fpmath.cl +++ b/clang/test/CodeGenOpenCL/relaxed-fpmath.cl @@ -30,27 +30,21 @@ float spscalardiv(float a, float b) { // CHECK: attributes // NORMAL-NOT: "less-precise-fpmad" -// NORMAL-NOT: "no-nans-fp-math" // NORMAL-NOT: "no-signed-zeros-fp-math" // FAST: "less-precise-fpmad"="true" -// FAST: "no-nans-fp-math"="true" // FAST: "no-signed-zeros-fp-math"="true" // FINITE-NOT: "less-precise-fpmad" -// FINITE: "no-nans-fp-math"="true" // FINITE-NOT: "no-signed-zeros-fp-math" // UNSAFE: "less-precise-fpmad"="true" -// UNSAFE-NOT: "no-nans-fp-math" // UNSAFE: "no-signed-zeros-fp-math"="true" // MAD: "less-precise-fpmad"="true" -// MAD-NOT: "no-nans-fp-math" // MAD-NOT: "no-signed-zeros-fp-math" // NOSIGNED-NOT: "less-precise-fpmad" -// NOSIGNED-NOT: "no-nans-fp-math" // NOSIGNED: "no-signed-zeros-fp-math"="true" #else diff --git a/clang/test/OpenMP/amdgcn-attributes.cpp b/clang/test/OpenMP/amdgcn-attributes.cpp index 6b7a86477cb4a..9f4900cc09c1f 100644 --- a/clang/test/OpenMP/amdgcn-attributes.cpp +++ b/clang/test/OpenMP/amdgcn-attributes.cpp @@ -33,8 +33,8 @@ int callable(int x) { // DEFAULT: attributes #0 = { convergent mustprogress noinline norecurse nounwind optnone "amdgpu-flat-work-group-size"="1,42" "kernel" "no-trapping-math"="true" "omp_target_thread_limit"="42" "stack-protector-buffer-size"="8" "uniform-work-group-size" } // CPU: attributes #0 = { convergent mustprogress noinline norecurse nounwind optnone "amdgpu-flat-work-group-size"="1,42" "kernel" "no-trapping-math"="true" "omp_target_thread_limit"="42" "stack-protector-buffer-size"="8" "target-cpu"="gfx900" "uniform-work-group-size" } -// NOIEEE: attributes #0 = { convergent mustprogress noinline norecurse nounwind optnone "amdgpu-flat-work-group-size"="1,42" "amdgpu-ieee"="false" "kernel" "no-nans-fp-math"="true" "no-trapping-math"="true" "omp_target_thread_limit"="42" "stack-protector-buffer-size"="8" "uniform-work-group-size" } +// NOIEEE: attributes #0 = { convergent mustprogress noinline norecurse nounwind optnone "amdgpu-flat-work-group-size"="1,42" "amdgpu-ieee"="false" "kernel" "no-trapping-math"="true" "omp_target_thread_limit"="42" "stack-protector-buffer-size"="8" "uniform-work-group-size" } // DEFAULT: attributes #2 = { convergent mustprogress noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" } // CPU: attributes #2 = { convergent mustprogress noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="gfx900" } -// NOIEEE: attributes #2 = { convergent mustprogress noinline nounwind optnone "amdgpu-ieee"="false" "no-nans-fp-math"="true" "no-trapping-math"="true" "stack-protector-buffer-size"="8" } +// NOIEEE: attributes #2 = { convergent mustprogress noinline nounwind optnone "amdgpu-ieee"="false" "no-trapping-math"="true" "stack-protector-buffer-size"="8" } diff --git a/flang/include/flang/Optimizer/Transforms/Passes.td b/flang/include/flang/Optimizer/Transforms/Passes.td index bdee252d14c72..38c5fc8db911c 100644 --- a/flang/include/flang/Optimizer/Transforms/Passes.td +++ b/flang/include/flang/Optimizer/Transforms/Passes.td @@ -443,7 +443,7 @@ def FunctionAttr : Pass<"function-attr", "mlir::func::FuncOp"> { Option<"noInfsFPMath", "no-infs-fp-math", "bool", /*default=*/"false", "Set the ninf flag on instructions in the module.">, Option<"noNaNsFPMath", "no-nans-fp-math", "bool", /*default=*/"false", - "Set the no-nans-fp-math attribute on functions in the module.">, + "Set the nnan flag on instructions in the module.">, Option<"approxFuncFPMath", "approx-func-fp-math", "bool", /*default=*/"false", "Set the afn flag on instructions in the module.">, diff --git a/flang/lib/Optimizer/Transforms/FunctionAttr.cpp b/flang/lib/Optimizer/Transforms/FunctionAttr.cpp index 3879a807fda2f..4655ed6ed0d40 100644 --- a/flang/lib/Optimizer/Transforms/FunctionAttr.cpp +++ b/flang/lib/Optimizer/Transforms/FunctionAttr.cpp @@ -87,10 +87,6 @@ void FunctionAttrPass::runOnOperation() { func->setAttr(mlir::LLVM::LLVMFuncOp::getInstrumentFunctionExitAttrName( llvmFuncOpName), mlir::StringAttr::get(context, instrumentFunctionExit)); - if (noNaNsFPMath) - func->setAttr( - mlir::LLVM::LLVMFuncOp::getNoNansFpMathAttrName(llvmFuncOpName), - mlir::BoolAttr::get(context, true)); if (noSignedZerosFPMath) func->setAttr( mlir::LLVM::LLVMFuncOp::getNoSignedZerosFpMathAttrName(llvmFuncOpName), diff --git a/flang/test/Driver/func-attr-fast-math.f90 b/flang/test/Driver/func-attr-fast-math.f90 index b8f8a0e1c8a63..1878aec403ba3 100644 --- a/flang/test/Driver/func-attr-fast-math.f90 +++ b/flang/test/Driver/func-attr-fast-math.f90 @@ -11,8 +11,8 @@ end subroutine func ! CHECK-OFAST-LABEL: define void @func_() local_unnamed_addr ! CHECK-OFAST-SAME: #[[ATTRS:[0-9]+]] -! CHECK-OFAST: attributes #[[ATTRS]] = { {{.*}}"no-nans-fp-math"="true" {{.*}}"no-signed-zeros-fp-math"="true"{{.*}} } +! CHECK-OFAST: attributes #[[ATTRS]] = { {{.*}}"no-signed-zeros-fp-math"="true"{{.*}} } ! CHECK-FFAST-MATH-LABEL: define void @func_() local_unnamed_addr ! CHECK-FFAST-MATH-SAME: #[[ATTRS:[0-9]+]] -! CHECK-FFAST-MATH: attributes #[[ATTRS]] = { {{.*}}"no-nans-fp-math"="true" {{.*}}"no-signed-zeros-fp-math"="true"{{.*}} } +! CHECK-FFAST-MATH: attributes #[[ATTRS]] = { {{.*}}"no-signed-zeros-fp-math"="true"{{.*}} } diff --git a/llvm/include/llvm/CodeGen/CommandFlags.h b/llvm/include/llvm/CodeGen/CommandFlags.h index c83bce7771878..d111cb9982cb7 100644 --- a/llvm/include/llvm/CodeGen/CommandFlags.h +++ b/llvm/include/llvm/CodeGen/CommandFlags.h @@ -58,8 +58,6 @@ LLVM_ABI CodeGenFileType getFileType(); LLVM_ABI FramePointerKind getFramePointerUsage(); -LLVM_ABI bool getEnableNoNaNsFPMath(); - LLVM_ABI bool getEnableNoSignedZerosFPMath(); LLVM_ABI bool getEnableNoTrappingFPMath(); diff --git a/llvm/include/llvm/IR/Attributes.td b/llvm/include/llvm/IR/Attributes.td index 941251003f5ba..88b30c7e3f71b 100644 --- a/llvm/include/llvm/IR/Attributes.td +++ b/llvm/include/llvm/IR/Attributes.td @@ -419,7 +419,6 @@ def AllowDirectAccessInHotPatchFunction /// Target-independent string attributes. def LessPreciseFPMAD : StrBoolAttr<"less-precise-fpmad">; -def NoNansFPMath : StrBoolAttr<"no-nans-fp-math">; def NoSignedZerosFPMath : StrBoolAttr<"no-signed-zeros-fp-math">; def NoJumpTables : StrBoolAttr<"no-jump-tables">; def NoInlineLineTables : StrBoolAttr<"no-inline-line-tables">; @@ -478,7 +477,6 @@ class MergeRule<string F> { } def : MergeRule<"setAND<LessPreciseFPMADAttr>">; -def : MergeRule<"setAND<NoNansFPMathAttr>">; def : MergeRule<"setAND<NoSignedZerosFPMathAttr>">; def : MergeRule<"setOR<NoImplicitFloatAttr>">; def : MergeRule<"setOR<NoJumpTablesAttr>">; diff --git a/llvm/include/llvm/Target/TargetOptions.h b/llvm/include/llvm/Target/TargetOptions.h index e38ec301ff091..89e29d5f102f6 100644 --- a/llvm/include/llvm/Target/TargetOptions.h +++ b/llvm/include/llvm/Target/TargetOptions.h @@ -119,7 +119,7 @@ enum CodeObjectVersionKind { class TargetOptions { public: TargetOptions() - : NoNaNsFPMath(false), NoTrappingFPMath(true), NoSignedZerosFPMath(false), + : NoTrappingFPMath(true), NoSignedZerosFPMath(false), EnableAIXExtendedAltivecABI(false), HonorSignDependentRoundingFPMathOption(false), NoZerosInBSS(false), GuaranteedTailCallOpt(false), StackSymbolOrdering(true), @@ -155,12 +155,6 @@ class TargetOptions { /// MCAsmInfo::BinutilsVersion. std::pair<int, int> BinutilsVersion{0, 0}; - /// NoNaNsFPMath - This flag is enabled when the - /// -enable-no-nans-fp-math flag is specified on the command line. When - /// this flag is off (the default), the code generator is not allowed to - /// assume the FP arithmetic arguments and results are never NaNs. - unsigned NoNaNsFPMath : 1; - /// NoTrappingFPMath - This flag is enabled when the /// -enable-no-trapping-fp-math is specified on the command line. This /// specifies that there are no trap handlers to handle exceptions. diff --git a/llvm/lib/CodeGen/CommandFlags.cpp b/llvm/lib/CodeGen/CommandFlags.cpp index 24f74dbd28b61..ff06864d3f6a9 100644 --- a/llvm/lib/CodeGen/CommandFlags.cpp +++ b/llvm/lib/CodeGen/CommandFlags.cpp @@ -74,7 +74,6 @@ CGOPT_EXP(uint64_t, LargeDataThreshold) CGOPT(ExceptionHandling, ExceptionModel) CGOPT_EXP(CodeGenFileType, FileType) CGOPT(FramePointerKind, FramePointerUsage) -CGOPT(bool, EnableNoNaNsFPMath) CGOPT(bool, EnableNoSignedZerosFPMath) CGOPT(bool, EnableNoTrappingFPMath) CGOPT(bool, EnableAIXExtendedAltivecABI) @@ -232,12 +231,6 @@ codegen::RegisterCodeGenFlags::RegisterCodeGenFlags() { "Enable frame pointer elimination"))); CGBINDOPT(FramePointerUsage); - static cl::opt<bool> EnableNoNaNsFPMath( - "enable-no-nans-fp-math", - cl::desc("Enable FP math optimizations that assume no NaNs"), - cl::init(false)); - CGBINDOPT(EnableNoNaNsFPMath); - static cl::opt<bool> EnableNoSignedZerosFPMath( "enable-no-signed-zeros-fp-math", cl::desc("Enable FP math optimizations that assume " @@ -589,7 +582,6 @@ TargetOptions codegen::InitTargetOptionsFromCodeGenFlags(const Triple &TheTriple) { TargetOptions Options; Options.AllowFPOpFusion = getFuseFPOps(); - Options.NoNaNsFPMath = getEnableNoNaNsFPMath(); Options.NoSignedZerosFPMath = getEnableNoSignedZerosFPMath(); Options.NoTrappingFPMath = getEnableNoTrappingFPMath(); @@ -739,7 +731,6 @@ void codegen::setFunctionAttributes(StringRef CPU, StringRef Features, if (getStackRealign()) NewAttrs.addAttribute("stackrealign"); - HANDLE_BOOL_ATTR(EnableNoNaNsFPMathView, "no-nans-fp-math"); HANDLE_BOOL_ATTR(EnableNoSignedZerosFPMathView, "no-signed-zeros-fp-math"); if ((DenormalFPMathView->getNumOccurrences() > 0 || diff --git a/llvm/lib/Target/TargetMachine.cpp b/llvm/lib/Target/TargetMachine.cpp index 3494637237c69..9243cdad43e1e 100644 --- a/llvm/lib/Target/TargetMachine.cpp +++ b/llvm/lib/Target/TargetMachine.cpp @@ -158,7 +158,6 @@ void TargetMachine::resetTargetOptions(const Function &F) const { Options.X = F.getFnAttribute(Y).getValueAsBool(); \ } while (0) - RESET_OPTION(NoNaNsFPMath, "no-nans-fp-math"); RESET_OPTION(NoSignedZerosFPMath, "no-signed-zeros-fp-math"); } diff --git a/llvm/test/Analysis/CostModel/AArch64/sve-arith-fp.ll b/llvm/test/Analysis/CostModel/AArch64/sve-arith-fp.ll index a735640311ff6..a7f949d503cb3 100644 --- a/llvm/test/Analysis/CostModel/AArch64/sve-arith-fp.ll +++ b/llvm/test/Analysis/CostModel/AArch64/sve-arith-fp.ll @@ -1,6 +1,6 @@ ; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py -; RUN: opt < %s -enable-no-nans-fp-math -passes="print<cost-model>" -cost-kind=all 2>&1 -disable-output -mtriple=aarch64 -mattr=+fullfp16,+sve | FileCheck %s --check-prefixes=CHECK,CHECK-BASE -; RUN: opt < %s -enable-no-nans-fp-math -passes="print<cost-model>" -cost-kind=all 2>&1 -disable-output -mtriple=aarch64 -mattr=+fullfp16,+sve-b16b16,+sve | FileCheck %s --check-prefixes=CHECK,CHECK-BF16 +; RUN: opt < %s -passes="print<cost-model>" -cost-kind=all 2>&1 -disable-output -mtriple=aarch64 -mattr=+fullfp16,+sve | FileCheck %s --check-prefixes=CHECK,CHECK-BASE +; RUN: opt < %s -passes="print<cost-model>" -cost-kind=all 2>&1 -disable-output -mtriple=aarch64 -mattr=+fullfp16,+sve-b16b16,+sve | FileCheck %s --check-prefixes=CHECK,CHECK-BF16 target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128" diff --git a/llvm/test/Analysis/CostModel/X86/arith-fma.ll b/llvm/test/Analysis/CostModel/X86/arith-fma.ll index 92da04c5c0a83..e561a2c206ce3 100644 --- a/llvm/test/Analysis/CostModel/X86/arith-fma.ll +++ b/llvm/test/Analysis/CostModel/X86/arith-fma.ll @@ -1,9 +1,9 @@ ; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py -; RUN: opt < %s -enable-no-nans-fp-math -passes="print<cost-model>" 2>&1 -disable-output -cost-kind=all -mtriple=x86_64-- -mattr=+xop | FileCheck %s --check-prefixes=XOP -; RUN: opt < %s -enable-no-nans-fp-math -passes="print<cost-model>" 2>&1 -disable-output -cost-kind=all -mtriple=x86_64-- -mattr=+fma,+avx | FileCheck %s --check-prefixes=AVX -; RUN: opt < %s -enable-no-nans-fp-math -passes="print<cost-model>" 2>&1 -disable-output -cost-kind=all -mtriple=x86_64-- -mattr=+fma,+avx2 | FileCheck %s --check-prefixes=AVX -; RUN: opt < %s -enable-no-nans-fp-math -passes="print<cost-model>" 2>&1 -disable-output -cost-kind=all -mtriple=x86_64-- -mattr=+fma,+avx512f | FileCheck %s --check-prefixes=AVX512 -; RUN: opt < %s -enable-no-nans-fp-math -passes="print<cost-model>" 2>&1 -disable-output -cost-kind=all -mtriple=x86_64-- -mattr=+fma,+avx512f,+avx512bw | FileCheck %s --check-prefixes=AVX512 +; RUN: opt < %s -passes="print<cost-model>" 2>&1 -disable-output -cost-kind=all -mtriple=x86_64-- -mattr=+xop | FileCheck %s --check-prefixes=XOP +; RUN: opt < %s -passes="print<cost-model>" 2>&1 -disable-output -cost-kind=all -mtriple=x86_64-- -mattr=+fma,+avx | FileCheck %s --check-prefixes=AVX +; RUN: opt < %s -passes="print<cost-model>" 2>&1 -disable-output -cost-kind=all -mtriple=x86_64-- -mattr=+fma,+avx2 | FileCheck %s --check-prefixes=AVX +; RUN: opt < %s -passes="print<cost-model>" 2>&1 -disable-output -cost-kind=all -mtriple=x86_64-- -mattr=+fma,+avx512f | FileCheck %s --check-prefixes=AVX512 +; RUN: opt < %s -passes="print<cost-model>" 2>&1 -disable-output -cost-kind=all -mtriple=x86_64-- -mattr=+fma,+avx512f,+avx512bw | FileCheck %s --check-prefixes=AVX512 define i32 @fma(i32 %arg) { ; XOP-LABEL: 'fma' diff --git a/llvm/test/Analysis/CostModel/X86/arith-fp.ll b/llvm/test/Analysis/CostModel/X86/arith-fp.ll index 8f9a47c7ef930..e3eb3e60b844c 100644 --- a/llvm/test/Analysis/CostModel/X86/arith-fp.ll +++ b/llvm/test/Analysis/CostModel/X86/arith-fp.ll @@ -1,15 +1,15 @@ ; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py -; RUN: opt < %s -enable-no-nans-fp-math -passes="print<cost-model>" 2>&1 -disable-output -cost-kind=all -mtriple=x86_64-- -mattr=-sse2 | FileCheck %s --check-prefixes=SSE1 -; RUN: opt < %s -enable-no-nans-fp-math -passes="print<cost-model>" 2>&1 -disable-output -cost-kind=all -mtriple=x86_64-- -mattr=+sse2 | FileCheck %s --check-prefixes=SSE2 -; RUN: opt < %s -enable-no-nans-fp-math -passes="print<cost-model>" 2>&1 -disable-output -cost-kind=all -mtriple=x86_64-- -mattr=+sse4.2 | FileCheck %s --check-prefixes=SSE42 -; RUN: opt < %s -enable-no-nans-fp-math -passes="print<cost-model>" 2>&1 -disable-output -cost-kind=all -mtriple=x86_64-- -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1 -; RUN: opt < %s -enable-no-nans-fp-math -passes="print<cost-model>" 2>&1 -disable-output -cost-kind=all -mtriple=x86_64-- -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX2 -; RUN: opt < %s -enable-no-nans-fp-math -passes="print<cost-model>" 2>&1 -disable-output -cost-kind=all -mtriple=x86_64-- -mattr=+avx512f | FileCheck %s --check-prefixes=AVX512 -; RUN: opt < %s -enable-no-nans-fp-math -passes="print<cost-model>" 2>&1 -disable-output -cost-kind=all -mtriple=x86_64-- -mattr=+avx512f,+avx512bw | FileCheck %s --check-prefixes=AVX512 -; -; RUN: opt < %s -enable-no-nans-fp-math -passes="print<cost-model>" 2>&1 -disable-output -cost-kind=all -mtriple=x86_64-- -mcpu=slm | FileCheck %s --check-prefixes=SLM -; RUN: opt < %s -enable-no-nans-fp-math -passes="print<cost-model>" 2>&1 -disable-output -cost-kind=all -mtriple=x86_64-- -mcpu=goldmont | FileCheck %s --check-prefixes=GLM -; RUN: opt < %s -enable-no-nans-fp-math -passes="print<cost-model>" 2>&1 -disable-output -cost-kind=all -mtriple=x86_64-- -mcpu=btver2 | FileCheck %s --check-prefixes=AVX,AVX1 +; RUN: opt < %s -passes="print<cost-model>" 2>&1 -disable-output -cost-kind=all -mtriple=x86_64-- -mattr=-sse2 | FileCheck %s --check-prefixes=SSE1 +; RUN: opt < %s -passes="print<cost-model>" 2>&1 -disable-output -cost-kind=all -mtriple=x86_64-- -mattr=+sse2 | FileCheck %s --check-prefixes=SSE2 +; RUN: opt < %s -passes="print<cost-model>" 2>&1 -disable-output -cost-kind=all -mtriple=x86_64-- -mattr=+sse4.2 | FileCheck %s --check-prefixes=SSE42 +; RUN: opt < %s -passes="print<cost-model>" 2>&1 -disable-output -cost-kind=all -mtriple=x86_64-- -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1 +; RUN: opt < %s -passes="print<cost-model>" 2>&1 -disable-output -cost-kind=all -mtriple=x86_64-- -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX2 +; RUN: opt < %s -passes="print<cost-model>" 2>&1 -disable-output -cost-kind=all -mtriple=x86_64-- -mattr=+avx512f | FileCheck %s --check-prefixes=AVX512 +; RUN: opt < %s -passes="print<cost-model>" 2>&1 -disable-output -cost-kind=all -mtriple=x86_64-- -mattr=+avx512f,+avx512bw | FileCheck %s --check-prefixes=AVX512 +; +; RUN: opt < %s -passes="print<cost-model>" 2>&1 -disable-output -cost-kind=all -mtriple=x86_64-- -mcpu=slm | FileCheck %s --check-prefixes=SLM +; RUN: opt < %s -passes="print<cost-model>" 2>&1 -disable-output -cost-kind=all -mtriple=x86_64-- -mcpu=goldmont | FileCheck %s --check-prefixes=GLM +; RUN: opt < %s -passes="print<cost-model>" 2>&1 -disable-output -cost-kind=all -mtriple=x86_64-- -mcpu=btver2 | FileCheck %s --check-prefixes=AVX,AVX1 define i32 @fadd(i32 %arg) { ; SSE1-LABEL: 'fadd' diff --git a/llvm/test/Analysis/CostModel/X86/fround.ll b/llvm/test/Analysis/CostModel/X86/fround.ll index 570d7d75771b4..ed7965af202d9 100644 --- a/llvm/test/Analysis/CostModel/X86/fround.ll +++ b/llvm/test/Analysis/CostModel/X86/fround.ll @@ -1,14 +1,14 @@ ; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py -; RUN: opt < %s -enable-no-nans-fp-math -passes="print<cost-model>" 2>&1 -disable-output -mtriple=x86_64-apple-macosx10.8.0 -mattr=+sse2 | FileCheck %s --check-prefixes=SSE2 -; RUN: opt < %s -enable-no-nans-fp-math -passes="print<cost-model>" 2>&1 -disable-output -mtriple=x86_64-apple-macosx10.8.0 -mattr=+sse4.2 | FileCheck %s --check-prefixes=SSE42 -; RUN: opt < %s -enable-no-nans-fp-math -passes="print<cost-model>" 2>&1 -disable-output -mtriple=x86_64-apple-macosx10.8.0 -mattr=+avx | FileCheck %s --check-prefixes=AVX -; RUN: opt < %s -enable-no-nans-fp-math -passes="print<cost-model>" 2>&1 -disable-output -mtriple=x86_64-apple-macosx10.8.0 -mattr=+avx2 | FileCheck %s --check-prefixes=AVX -; RUN: opt < %s -enable-no-nans-fp-math -passes="print<cost-model>" 2>&1 -disable-output -mtriple=x86_64-apple-macosx10.8.0 -mattr=+avx512f | FileCheck %s --check-prefixes=AVX512 -; RUN: opt < %s -enable-no-nans-fp-math -passes="print<cost-model>" 2>&1 -disable-output -mtriple=x86_64-apple-macosx10.8.0 -mattr=+avx512f,+avx512bw | FileCheck %s --check-prefixes=AVX512 +; RUN: opt < %s -passes="print<cost-model>" 2>&1 -disable-output -mtriple=x86_64-apple-macosx10.8.0 -mattr=+sse2 | FileCheck %s --check-prefixes=SSE2 +; RUN: opt < %s -passes="print<cost-model>" 2>&1 -disable-output -mtriple=x86_64-apple-macosx10.8.0 -mattr=+sse4.2 | FileCheck %s --check-prefixes=SSE42 +; RUN: opt < %s -passes="print<cost-model>" 2>&1 -disable-output -mtriple=x86_64-apple-macosx10.8.0 -mattr=+avx | FileCheck %s --check-prefixes=AVX +; RUN: opt < %s -passes="print<cost-model>" 2>&1 -disable-output -mtriple=x86_64-apple-macosx10.8.0 -mattr=+avx2 | FileCheck %s --check-prefixes=AVX +; RUN: opt < %s -passes="print<cost-model>" 2>&1 -disable-output -mtriple=x86_64-apple-macosx10.8.0 -mattr=+avx512f | FileCheck %s --check-prefixes=AVX512 +; RUN: opt < %s -passes="print<cost-model>" 2>&1 -disable-output -mtriple=x86_64-apple-macosx10.8.0 -mattr=+avx512f,+avx512bw | FileCheck %s --check-prefixes=AVX512 ; -; RUN: opt < %s -enable-no-nans-fp-math -passes="print<cost-model>" 2>&1 -disable-output -mtriple=x86_64-apple-macosx10.8.0 -mcpu=slm | FileCheck %s --check-prefixes=SSE42 -; RUN: opt < %s -enable-no-nans-fp-math -passes="print<cost-model>" 2>&1 -disable-output -mtriple=x86_64-apple-macosx10.8.0 -mcpu=goldmont | FileCheck %s --check-prefixes=SSE42 -; RUN: opt < %s -enable-no-nans-fp-math -passes="print<cost-model>" 2>&1 -disable-output -mtriple=x86_64-apple-macosx10.8.0 -mcpu=btver2 | FileCheck %s --check-prefixes=AVX +; RUN: opt < %s -passes="print<cost-model>" 2>&1 -disable-output -mtriple=x86_64-apple-macosx10.8.0 -mcpu=slm | FileCheck %s --check-prefixes=SSE42 +; RUN: opt < %s -passes="print<cost-model>" 2>&1 -disable-output -mtriple=x86_64-apple-macosx10.8.0 -mcpu=goldmont | FileCheck %s --check-prefixes=SSE42 +; RUN: opt < %s -passes="print<cost-model>" 2>&1 -disable-output -mtriple=x86_64-apple-macosx10.8.0 -mcpu=btver2 | FileCheck %s --check-prefixes=AVX target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128" target triple = "x86_64-apple-macosx10.8.0" diff --git a/llvm/test/Analysis/CostModel/X86/powi.ll b/llvm/test/Analysis/CostModel/X86/powi.ll index c9ec3df301907..b4bced3903c2b 100644 --- a/llvm/test/Analysis/CostModel/X86/powi.ll +++ b/llvm/test/Analysis/CostModel/X86/powi.ll @@ -1,8 +1,8 @@ ; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py -; RUN: opt < %s -enable-no-nans-fp-math -passes="print<cost-model>" 2>&1 -disable-output -mtriple=x86_64-linux-gnu -mcpu=x86-64 | FileCheck %s --check-prefixes=SSE -; RUN: opt < %s -enable-no-nans-fp-math -passes="print<cost-model>" 2>&1 -disable-output -mtriple=x86_64-linux-gnu -mcpu=x86-64-v2 | FileCheck %s --check-prefixes=AVX1 -; RUN: opt < %s -enable-no-nans-fp-math -passes="print<cost-model>" 2>&1 -disable-output -mtriple=x86_64-linux-gnu -mcpu=x86-64-v3 | FileCheck %s --check-prefixes=AVX2 -; RUN: opt < %s -enable-no-nans-fp-math -passes="print<cost-model>" 2>&1 -disable-output -mtriple=x86_64-linux-gnu -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=AVX512 +; RUN: opt < %s -passes="print<cost-model>" 2>&1 -disable-output -mtriple=x86_64-linux-gnu -mcpu=x86-64 | FileCheck %s --check-prefixes=SSE +; RUN: opt < %s -passes="print<cost-model>" 2>&1 -disable-output -mtriple=x86_64-linux-gnu -mcpu=x86-64-v2 | FileCheck %s --check-prefixes=AVX1 +; RUN: opt < %s -passes="print<cost-model>" 2>&1 -disable-output -mtriple=x86_64-linux-gnu -mcpu=x86-64-v3 | FileCheck %s --check-prefixes=AVX2 +; RUN: opt < %s -passes="print<cost-model>" 2>&1 -disable-output -mtriple=x86_64-linux-gnu -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=AVX512 define i32 @powi_var(i32 %arg) { ; SSE-LABEL: 'powi_var' diff --git a/llvm/test/CodeGen/AArch64/arm64-fmax.ll b/llvm/test/CodeGen/AArch64/arm64-fmax.ll index 85104775339b6..f311139e193a5 100644 --- a/llvm/test/CodeGen/AArch64/arm64-fmax.ll +++ b/llvm/test/CodeGen/AArch64/arm64-fmax.ll @@ -1,5 +1,5 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py -; RUN: llc < %s -mtriple=arm64-eabi -enable-no-nans-fp-math | FileCheck %s +; RUN: llc < %s -mtriple=arm64-eabi | FileCheck %s define double @test_direct(float %in) { ; CHECK-LABEL: test_direct: diff --git a/llvm/test/CodeGen/AMDGPU/inline-attr.ll b/llvm/test/CodeGen/AMDGPU/inline-attr.ll index ad201ded71bc3..e642cf6c33ee8 100644 --- a/llvm/test/CodeGen/AMDGPU/inline-attr.ll +++ b/llvm/test/CodeGen/AMDGPU/inline-attr.ll @@ -1,6 +1,6 @@ ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --check-globals all --version 5 ; RUN: opt -mtriple=amdgcn-amd-amdhsa -S -O3 %s | FileCheck --check-prefixes=GCN,UNSAFE %s -; RUN: opt -mtriple=amdgcn-amd-amdhsa -S -O3 -enable-no-nans-fp-math %s | FileCheck --check-prefixes=GCN,NONANS %s +; RUN: opt -mtriple=amdgcn-amd-amdhsa -S -O3 %s | FileCheck --check-prefixes=GCN,NONANS %s declare void @extern() #0 @@ -36,17 +36,17 @@ entry: } attributes #0 = { nounwind } -attributes #1 = { nounwind "less-precise-fpmad"="true" "no-nans-fp-math"="true" } +attributes #1 = { nounwind "less-precise-fpmad"="true" } ; NOINFS: attributes #[[ATTR0]] = { nounwind } -; NOINFS: attributes #[[ATTR1]] = { nounwind "less-precise-fpmad"="false" "no-nans-fp-math"="false" } +; NOINFS: attributes #[[ATTR1]] = { nounwind "less-precise-fpmad"="false" } ; NOINFS: [[META0]] = !{} ;. ; UNSAFE: attributes #[[ATTR0]] = { nounwind } -; UNSAFE: attributes #[[ATTR1]] = { nounwind "less-precise-fpmad"="false" "no-nans-fp-math"="false" } +; UNSAFE: attributes #[[ATTR1]] = { nounwind "less-precise-fpmad"="false" } ;. -; NONANS: attributes #[[ATTR0]] = { nounwind "no-nans-fp-math"="true" } -; NONANS: attributes #[[ATTR1]] = { nounwind "less-precise-fpmad"="false" "no-nans-fp-math"="true" } +; NONANS: attributes #[[ATTR0]] = { nounwind } +; NONANS: attributes #[[ATTR1]] = { nounwind "less-precise-fpmad"="false" } ;. ; UNSAFE: [[META0]] = !{} ;. diff --git a/llvm/test/CodeGen/ARM/fp16-vminmaxnm.ll b/llvm/test/CodeGen/ARM/fp16-vminmaxnm.ll index 9d0ea0e2d37cf..b35f2059d405d 100644 --- a/llvm/test/CodeGen/ARM/fp16-vminmaxnm.ll +++ b/llvm/test/CodeGen/ARM/fp16-vminmaxnm.ll @@ -1,6 +1,6 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5 -; RUN: llc < %s -mtriple=armv7-none-eabihf -mattr=+fullfp16 -enable-no-nans-fp-math | FileCheck %s -; RUN: llc < %s -mtriple=thumbv7a-none-eabihf -mattr=+fullfp16 -enable-no-nans-fp-math | FileCheck %s +; RUN: llc < %s -mtriple=armv7-none-eabihf -mattr=+fullfp16 | FileCheck %s +; RUN: llc < %s -mtriple=thumbv7a-none-eabihf -mattr=+fullfp16 | FileCheck %s ; TODO: we can't pass half-precision arguments as "half" types yet. We do ; that for the time being by passing "float %f.coerce" and the necessary diff --git a/llvm/test/CodeGen/ARM/vminmaxnm.ll b/llvm/test/CodeGen/ARM/vminmaxnm.ll index be33dbfc61b04..d5c3e2026b323 100644 --- a/llvm/test/CodeGen/ARM/vminmaxnm.ll +++ b/llvm/test/CodeGen/ARM/vminmaxnm.ll @@ -1,5 +1,5 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5 -; RUN: llc < %s -mtriple armv8-none-eabihf -mattr=+neon,+fp-armv8 -enable-no-nans-fp-math | FileCheck %s +; RUN: llc < %s -mtriple armv8-none-eabihf -mattr=+neon,+fp-armv8 | FileCheck %s ; scalars diff --git a/llvm/test/CodeGen/Mips/fmadd1.ll b/llvm/test/CodeGen/Mips/fmadd1.ll index e0ec396ff0040..d91dd26f11837 100644 --- a/llvm/test/CodeGen/Mips/fmadd1.ll +++ b/llvm/test/CodeGen/Mips/fmadd1.ll @@ -16,9 +16,9 @@ ; when +nomadd attribute is specified. ; Output for mips32 and mips64r6 reused since aforementioned instructions are ; not generated in those cases. -; RUN: llc < %s -mtriple=mipsel -mcpu=mips32r2 -enable-no-nans-fp-math -mattr=+nomadd4 | FileCheck %s -check-prefixes=ALL,32-NOMADD -; RUN: llc < %s -mtriple=mips64el -mcpu=mips64 -target-abi=n64 -enable-no-nans-fp-math -mattr=+nomadd4 | FileCheck %s -check-prefixes=ALL,64R6-NOMADD -; RUN: llc < %s -mtriple=mips64el -mcpu=mips64r2 -target-abi=n64 -enable-no-nans-fp-math -mattr=+nomadd4 | FileCheck %s -check-prefixes=ALL,64R6-NOMADD +; RUN: llc < %s -mtriple=mipsel -mcpu=mips32r2 -mattr=+nomadd4 | FileCheck %s -check-prefixes=ALL,32-NOMADD +; RUN: llc < %s -mtriple=mips64el -mcpu=mips64 -target-abi=n64 -mattr=+nomadd4 | FileCheck %s -check-prefixes=ALL,64R6-NOMADD +; RUN: llc < %s -mtriple=mips64el -mcpu=mips64r2 -target-abi=n64 -mattr=+nomadd4 | FileCheck %s -check-prefixes=ALL,64R6-NOMADD ; RUN: llc < %s -mtriple=mipsel -mcpu=mips32r2 -mattr=+nomadd4 | FileCheck %s -check-prefixes=ALL,32-NOMADD ; RUN: llc < %s -mtriple=mips64el -mcpu=mips64 -target-abi=n64 -mattr=+nomadd4 | FileCheck %s -check-prefixes=ALL,64R6-NOMADD ; RUN: llc < %s -mtriple=mips64el -mcpu=mips64r2 -target-abi=n64 -mattr=+nomadd4 | FileCheck %s -check-prefixes=ALL,64R6-NOMADD diff --git a/llvm/test/CodeGen/Mips/fneg.ll b/llvm/test/CodeGen/Mips/fneg.ll index 4fb80fdb4f32f..0a72a34321b3c 100644 --- a/llvm/test/CodeGen/Mips/fneg.ll +++ b/llvm/test/CodeGen/Mips/fneg.ll @@ -1,4 +1,4 @@ -; Check that abs.[ds] is selected and does not depend on -enable-no-nans-fp-math +; Check that abs.[ds] is selected and does not depend on ; They obey the Has2008 and ABS2008 configuration bits which govern the ; conformance to IEEE 754 (1985) and IEEE 754 (2008). When these bits are not ; present, they confirm to 1985. @@ -8,10 +8,10 @@ ; RUN: llc < %s -mtriple=mipsel-linux-gnu -mcpu=mips32 | FileCheck %s ; RUN: llc < %s -mtriple=mipsel-linux-gnu -mcpu=mips32r2 | FileCheck %s -; RUN: llc < %s -mtriple=mipsel-linux-gnu -mcpu=mips32 -enable-no-nans-fp-math | FileCheck %s +; RUN: llc < %s -mtriple=mipsel-linux-gnu -mcpu=mips32 | FileCheck %s ; RUN: llc < %s -mtriple=mips64el-linux-gnu -mcpu=mips64 | FileCheck %s -; RUN: llc < %s -mtriple=mips64el-linux-gnu -mcpu=mips64 -enable-no-nans-fp-math | FileCheck %s +; RUN: llc < %s -mtriple=mips64el-linux-gnu -mcpu=mips64 | FileCheck %s define float @foo0(float %d) nounwind readnone { entry: diff --git a/llvm/test/CodeGen/Mips/nmadd.ll b/llvm/test/CodeGen/Mips/nmadd.ll index 57774b184d8c5..cfebd91989735 100644 --- a/llvm/test/CodeGen/Mips/nmadd.ll +++ b/llvm/test/CodeGen/Mips/nmadd.ll @@ -1,15 +1,15 @@ ; Check whether nmadd/nmsub instructions are properly generated -; RUN: llc < %s -mtriple=mipsel -mcpu=mips32r2 -enable-no-nans-fp-math | FileCheck %s -check-prefixes=ALL,CHECK-NM -; RUN: llc < %s -mtriple=mipsel -mcpu=mips32r2 -mattr=+fp64 -enable-no-nans-fp-math | FileCheck %s -check-prefixes=ALL,CHECK-NM -; RUN: llc < %s -mtriple=mipsel -mcpu=mips32r2 -mattr=micromips -enable-no-nans-fp-math -asm-show-inst | FileCheck %s -check-prefixes=ALL,CHECK-NM,CHECK-MM -; RUN: llc < %s -mtriple=mips64el -mcpu=mips64 -target-abi=n64 -enable-no-nans-fp-math | FileCheck %s -check-prefixes=ALL,CHECK-NM-64 -; RUN: llc < %s -mtriple=mips64el -mcpu=mips64r2 -target-abi=n64 -enable-no-nans-fp-math | FileCheck %s -check-prefixes=ALL,CHECK-NM-64 -; RUN: llc < %s -mtriple=mips64el -mcpu=mips4 -target-abi=n64 -enable-no-nans-fp-math | FileCheck %s -check-prefixes=ALL,CHECK-NM-64 -; RUN: llc < %s -mtriple=mipsel -mcpu=mips32 -enable-no-nans-fp-math | FileCheck %s -check-prefixes=ALL,CHECK-NOT-NM -; RUN: llc < %s -mtriple=mipsel -mcpu=mips32r6 -enable-no-nans-fp-math | FileCheck %s -check-prefixes=ALL,CHECK-NOT-NM -; RUN: llc < %s -mtriple=mips64el -mcpu=mips3 -target-abi=n64 -enable-no-nans-fp-math | FileCheck %s -check-prefixes=ALL,CHECK-NOT-NM-64 -; RUN: llc < %s -mtriple=mipsel -mcpu=mips32r6 -mattr=micromips -enable-no-nans-fp-math | FileCheck %s -check-prefixes=ALL,CHECK-NOT-NM -; RUN: llc < %s -mtriple=mipsel -mcpu=mips32r3 -mattr=micromips -enable-no-nans-fp-math | FileCheck %s -check-prefixes=ALL,CHECK-NM +; RUN: llc < %s -mtriple=mipsel -mcpu=mips32r2 | FileCheck %s -check-prefixes=ALL,CHECK-NM +; RUN: llc < %s -mtriple=mipsel -mcpu=mips32r2 -mattr=+fp64 | FileCheck %s -check-prefixes=ALL,CHECK-NM +; RUN: llc < %s -mtriple=mipsel -mcpu=mips32r2 -mattr=micromips -asm-show-inst | FileCheck %s -check-prefixes=ALL,CHECK-NM,CHECK-MM +; RUN: llc < %s -mtriple=mips64el -mcpu=mips64 -target-abi=n64 | FileCheck %s -check-prefixes=ALL,CHECK-NM-64 +; RUN: llc < %s -mtriple=mips64el -mcpu=mips64r2 -target-abi=n64 | FileCheck %s -check-prefixes=ALL,CHECK-NM-64 +; RUN: llc < %s -mtriple=mips64el -mcpu=mips4 -target-abi=n64 | FileCheck %s -check-prefixes=ALL,CHECK-NM-64 +; RUN: llc < %s -mtriple=mipsel -mcpu=mips32 | FileCheck %s -check-prefixes=ALL,CHECK-NOT-NM +; RUN: llc < %s -mtriple=mipsel -mcpu=mips32r6 | FileCheck %s -check-prefixes=ALL,CHECK-NOT-NM +; RUN: llc < %s -mtriple=mips64el -mcpu=mips3 -target-abi=n64 | FileCheck %s -check-prefixes=ALL,CHECK-NOT-NM-64 +; RUN: llc < %s -mtriple=mipsel -mcpu=mips32r6 -mattr=micromips | FileCheck %s -check-prefixes=ALL,CHECK-NOT-NM +; RUN: llc < %s -mtriple=mipsel -mcpu=mips32r3 -mattr=micromips | FileCheck %s -check-prefixes=ALL,CHECK-NM define float @add1(float %f, float %g, float %h) local_unnamed_addr #0 { entry: diff --git a/llvm/test/CodeGen/PowerPC/fsel.ll b/llvm/test/CodeGen/PowerPC/fsel.ll index 42629e5176696..f0c8fdd2e3af8 100644 --- a/llvm/test/CodeGen/PowerPC/fsel.ll +++ b/llvm/test/CodeGen/PowerPC/fsel.ll @@ -1,5 +1,5 @@ ; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 -mattr=-vsx | FileCheck %s -; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 -enable-no-nans-fp-math -mattr=+vsx | FileCheck -check-prefix=CHECK-VSX %s +; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 -mattr=+vsx | FileCheck -check-prefix=CHECK-VSX %s target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64" target triple = "powerpc64-unknown-linux-gnu" diff --git a/llvm/test/CodeGen/PowerPC/scalar-min-max-p10.ll b/llvm/test/CodeGen/PowerPC/scalar-min-max-p10.ll index 5915bd3b21085..21e240ffb081c 100644 --- a/llvm/test/CodeGen/PowerPC/scalar-min-max-p10.ll +++ b/llvm/test/CodeGen/PowerPC/scalar-min-max-p10.ll @@ -1,7 +1,6 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; RUN: llc -mcpu=pwr10 -ppc-asm-full-reg-names \ ; RUN: -verify-machineinstrs --enable-no-signed-zeros-fp-math \ -; RUN: --enable-no-nans-fp-math \ ; RUN: -mtriple=powerpc64le-unknown-unknown < %s | FileCheck %s ; RUN: llc -mcpu=pwr10 -ppc-asm-full-reg-names -verify-machineinstrs \ ; RUN: -mtriple=powerpc64le-unknown-unknown < %s | FileCheck %s diff --git a/llvm/test/CodeGen/X86/avx512fp16-unsafe-fp-math.ll b/llvm/test/CodeGen/X86/avx512fp16-unsafe-fp-math.ll index 9e86c951d22e6..93083ecf90617 100644 --- a/llvm/test/CodeGen/X86/avx512fp16-unsafe-fp-math.ll +++ b/llvm/test/CodeGen/X86/avx512fp16-unsafe-fp-math.ll @@ -1,5 +1,5 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py -; RUN: llc < %s -mtriple=x86_64 -enable-no-nans-fp-math -mattr=+avx512fp16,+avx512vl | FileCheck %s +; RUN: llc < %s -mtriple=x86_64 -mattr=+avx512fp16,+avx512vl | FileCheck %s define <32 x half> @test_max_v32f16(ptr %a_ptr, <32 x half> %b) { ; CHECK-LABEL: test_max_v32f16: diff --git a/llvm/test/CodeGen/X86/fabs.ll b/llvm/test/CodeGen/X86/fabs.ll index e1992be9e8829..4308c4d7e78e9 100644 --- a/llvm/test/CodeGen/X86/fabs.ll +++ b/llvm/test/CodeGen/X86/fabs.ll @@ -1,6 +1,6 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=-sse,-sse2,-sse3 | FileCheck %s --check-prefix=X87 -; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=-sse,-sse2,-sse3 -enable-no-nans-fp-math | FileCheck %s --check-prefix=X87UNSAFE +; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=-sse,-sse2,-sse3 | FileCheck %s --check-prefix=X87UNSAFE ; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=X64 declare float @llvm.fabs.f32(float) diff --git a/llvm/test/Transforms/IROutliner/outlining-compatible-and-attribute-transfer.ll b/llvm/test/Transforms/IROutliner/outlining-compatible-and-attribute-transfer.ll index 68a640ef8d3df..f13c646c25017 100644 --- a/llvm/test/Transforms/IROutliner/outlining-compatible-and-attribute-transfer.ll +++ b/llvm/test/Transforms/IROutliner/outlining-compatible-and-attribute-transfer.ll @@ -4,7 +4,7 @@ ; This has two compatible regions based on function attributes. We have ; attributes that should be transferred only if it is on all of the regions. -; This includes the attributes, no-nans-fp-math, +; This includes the attributes, ; no-signed-zeros-fp-math, less-precise-fpmad, and ; no-infs-fp-math. Only when each instance of similarity has these attributes ; can we say that the outlined function can have these attributes since that @@ -100,7 +100,7 @@ entry: ret void } -attributes #0 = { "no-nans-fp-math"="true" "no-signed-zeros-fp-math"="true" "less-precise-fpmad"="true" } +attributes #0 = { "no-signed-zeros-fp-math"="true" "less-precise-fpmad"="true" } ; CHECK: define internal void @outlined_ir_func_0(ptr [[ARG0:%.*]], ptr [[ARG1:%.*]], ptr [[ARG2:%.*]]) [[ATTR1:#[0-9]+]] { ; CHECK: entry_to_outline: @@ -121,5 +121,5 @@ attributes #0 = { "no-nans-fp-math"="true" "no-signed-zeros-fp-math"="true" "les ; CHECK-NEXT: [[CL:%.*]] = load i32, ptr [[ARG2]], align 4 -; CHECK: attributes [[ATTR1]] = { minsize optsize "less-precise-fpmad"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" } -; CHECK: attributes [[ATTR]] = { minsize optsize "less-precise-fpmad"="true" "no-nans-fp-math"="true" "no-signed-zeros-fp-math"="true" } +; CHECK: attributes [[ATTR1]] = { minsize optsize "less-precise-fpmad"="false" "no-signed-zeros-fp-math"="false" } +; CHECK: attributes [[ATTR]] = { minsize optsize "less-precise-fpmad"="true" "no-signed-zeros-fp-math"="true" } diff --git a/llvm/test/Transforms/Inline/attributes.ll b/llvm/test/Transforms/Inline/attributes.ll index 762e3bc9a34a4..cfc393ac54faa 100644 --- a/llvm/test/Transforms/Inline/attributes.ll +++ b/llvm/test/Transforms/Inline/attributes.ll @@ -480,46 +480,6 @@ define i32 @test_null-pointer-is-valid2(i32 %i) null_pointer_is_valid { ; CHECK-NEXT: ret i32 } -define i32 @no-nans-fp-math_callee0(i32 %i) "no-nans-fp-math"="false" { - ret i32 %i -; CHECK: @no-nans-fp-math_callee0(i32 %i) [[NO_NANS_FPMATH_FALSE:#[0-9]+]] { -; CHECK-NEXT: ret i32 -} - -define i32 @no-nans-fp-math_callee1(i32 %i) "no-nans-fp-math"="true" { - ret i32 %i -; CHECK: @no-nans-fp-math_callee1(i32 %i) [[NO_NANS_FPMATH_TRUE:#[0-9]+]] { -; CHECK-NEXT: ret i32 -} - -define i32 @test_no-nans-fp-math0(i32 %i) "no-nans-fp-math"="false" { - %1 = call i32 @no-nans-fp-math_callee0(i32 %i) - ret i32 %1 -; CHECK: @test_no-nans-fp-math0(i32 %i) [[NO_NANS_FPMATH_FALSE]] { -; CHECK-NEXT: ret i32 -} - -define i32 @test_no-nans-fp-math1(i32 %i) "no-nans-fp-math"="false" { - %1 = call i32 @no-nans-fp-math_callee1(i32 %i) - ret i32 %1 -; CHECK: @test_no-nans-fp-math1(i32 %i) [[NO_NANS_FPMATH_FALSE]] { -; CHECK-NEXT: ret i32 -} - -define i32 @test_no-nans-fp-math2(i32 %i) "no-nans-fp-math"="true" { - %1 = call i32 @no-nans-fp-math_callee0(i32 %i) - ret i32 %1 -; CHECK: @test_no-nans-fp-math2(i32 %i) [[NO_NANS_FPMATH_FALSE]] { -; CHECK-NEXT: ret i32 -} - -define i32 @test_no-nans-fp-math3(i32 %i) "no-nans-fp-math"="true" { - %1 = call i32 @no-nans-fp-math_callee1(i32 %i) - ret i32 %1 -; CHECK: @test_no-nans-fp-math3(i32 %i) [[NO_NANS_FPMATH_TRUE]] { -; CHECK-NEXT: ret i32 -} - define i32 @no-signed-zeros-fp-math_callee0(i32 %i) "no-signed-zeros-fp-math"="false" { ret i32 %i ; CHECK: @no-signed-zeros-fp-math_callee0(i32 %i) [[NO_SIGNED_ZEROS_FPMATH_FALSE:#[0-9]+]] { @@ -606,8 +566,6 @@ define i32 @loader_replaceable_caller() { ; CHECK: attributes [[NOIMPLICITFLOAT]] = { noimplicitfloat } ; CHECK: attributes [[NOUSEJUMPTABLES]] = { "no-jump-tables"="true" } ; CHECK: attributes [[NULLPOINTERISVALID]] = { null_pointer_is_valid } -; CHECK: attributes [[NO_NANS_FPMATH_FALSE]] = { "no-nans-fp-math"="false" } -; CHECK: attributes [[NO_NANS_FPMATH_TRUE]] = { "no-nans-fp-math"="true" } ; CHECK: attributes [[NO_SIGNED_ZEROS_FPMATH_FALSE]] = { "no-signed-zeros-fp-math"="false" } ; CHECK: attributes [[NO_SIGNED_ZEROS_FPMATH_TRUE]] = { "no-signed-zeros-fp-math"="true" } ; CHECK: attributes [[FNRETTHUNK_EXTERN]] = { fn_ret_thunk_extern } diff --git a/mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td b/mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td index 0b22a3da5c3f0..e781d4c876315 100644 --- a/mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td +++ b/mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td @@ -2030,7 +2030,6 @@ def LLVM_LLVMFuncOp : LLVM_Op<"func", [ OptionalAttr<StrAttr>:$reciprocal_estimates, OptionalAttr<StrAttr>:$prefer_vector_width, OptionalAttr<LLVM_TargetFeaturesAttr>:$target_features, - OptionalAttr<BoolAttr>:$no_nans_fp_math, OptionalAttr<BoolAttr>:$no_signed_zeros_fp_math, OptionalAttr<LLVM_DenormalFPEnvAttr>:$denormal_fpenv, OptionalAttr<StrAttr>:$fp_contract, diff --git a/mlir/lib/Target/LLVMIR/ModuleImport.cpp b/mlir/lib/Target/LLVMIR/ModuleImport.cpp index 30fb18c4f20ed..25aaccecc56a2 100644 --- a/mlir/lib/Target/LLVMIR/ModuleImport.cpp +++ b/mlir/lib/Target/LLVMIR/ModuleImport.cpp @@ -2706,7 +2706,6 @@ static constexpr std::array kExplicitLLVMFuncOpAttributes{ StringLiteral("memory"), StringLiteral("minsize"), StringLiteral("no_caller_saved_registers"), - StringLiteral("no-nans-fp-math"), StringLiteral("no-signed-zeros-fp-math"), StringLiteral("no-builtins"), StringLiteral("nocallback"), @@ -2903,10 +2902,6 @@ void ModuleImport::processFunctionAttributes(llvm::Function *func, attr.isStringAttribute()) funcOp.setPreferVectorWidth(attr.getValueAsString()); - if (llvm::Attribute attr = func->getFnAttribute("no-nans-fp-math"); - attr.isStringAttribute()) - funcOp.setNoNansFpMath(attr.getValueAsBool()); - if (llvm::Attribute attr = func->getFnAttribute("instrument-function-entry"); attr.isStringAttribute()) funcOp.setInstrumentFunctionEntry( diff --git a/mlir/lib/Target/LLVMIR/ModuleTranslation.cpp b/mlir/lib/Target/LLVMIR/ModuleTranslation.cpp index b8ae5fc5ef9e6..f4a6e5f6fc8f6 100644 --- a/mlir/lib/Target/LLVMIR/ModuleTranslation.cpp +++ b/mlir/lib/Target/LLVMIR/ModuleTranslation.cpp @@ -1569,9 +1569,6 @@ LogicalResult ModuleTranslation::convertOneFunction(LLVMFuncOp func) { getLLVMContext(), attr->getMinRange().getInt(), attr->getMaxRange().getInt())); - if (auto noNansFpMath = func.getNoNansFpMath()) - llvmFunc->addFnAttr("no-nans-fp-math", llvm::toStringRef(*noNansFpMath)); - if (auto noSignedZerosFpMath = func.getNoSignedZerosFpMath()) llvmFunc->addFnAttr("no-signed-zeros-fp-math", llvm::toStringRef(*noSignedZerosFpMath)); diff --git a/mlir/test/Target/LLVMIR/Import/function-attributes.ll b/mlir/test/Target/LLVMIR/Import/function-attributes.ll index 60347ec010fc7..6d057f4e11f75 100644 --- a/mlir/test/Target/LLVMIR/Import/function-attributes.ll +++ b/mlir/test/Target/LLVMIR/Import/function-attributes.ll @@ -303,18 +303,6 @@ declare void @align_decl() align 64 ; // ----- -; CHECK-LABEL: @func_attr_no_nans_fp_math_true -; CHECK-SAME: attributes {no_nans_fp_math = true} -declare void @func_attr_no_nans_fp_math_true() "no-nans-fp-math"="true" - -; // ----- - -; CHECK-LABEL: @func_attr_no_nans_fp_math_false -; CHECK-SAME: attributes {no_nans_fp_math = false} -declare void @func_attr_no_nans_fp_math_false() "no-nans-fp-math"="false" - -; // ----- - ; CHECK-LABEL: @func_attr_no_signed_zeros_fp_math_true ; CHECK-SAME: attributes {no_signed_zeros_fp_math = true} declare void @func_attr_no_signed_zeros_fp_math_true() "no-signed-zeros-fp-math"="true" diff --git a/mlir/test/Target/LLVMIR/fp-math-function-attributes.mlir b/mlir/test/Target/LLVMIR/fp-math-function-attributes.mlir index 19317a16467dd..c5f900a89651b 100644 --- a/mlir/test/Target/LLVMIR/fp-math-function-attributes.mlir +++ b/mlir/test/Target/LLVMIR/fp-math-function-attributes.mlir @@ -1,23 +1,5 @@ // RUN: mlir-translate -mlir-to-llvmir -split-input-file %s | FileCheck %s -// CHECK-LABEL: define void @no_nans_fp_math_func_true() -// CHECK-SAME: #[[ATTRS:[0-9]+]] -llvm.func @no_nans_fp_math_func_true() attributes {no_nans_fp_math = true} { - llvm.return -} -// CHECK: attributes #[[ATTRS]] = { "no-nans-fp-math"="true" } - -// ----- - -// CHECK-LABEL: define void @no_nans_fp_math_func_false() -// CHECK-SAME: #[[ATTRS:[0-9]+]] -llvm.func @no_nans_fp_math_func_false() attributes {no_nans_fp_math = false} { - llvm.return -} -// CHECK: attributes #[[ATTRS]] = { "no-nans-fp-math"="false" } - -// ----- - // CHECK-LABEL: define void @no_signed_zeros_fp_math_func_true() // CHECK-SAME: #[[ATTRS:[0-9]+]] llvm.func @no_signed_zeros_fp_math_func_true() attributes {no_signed_zeros_fp_math = true} { >From cb500e18996ad9ea93ffd6e3fe80f64e1a601bc1 Mon Sep 17 00:00:00 2001 From: PaperChalice <[email protected]> Date: Fri, 13 Mar 2026 14:28:40 +0800 Subject: [PATCH 2/3] an oversight in transform --- .../Transforms/Instrumentation/NumericalStabilitySanitizer.cpp | 1 - 1 file changed, 1 deletion(-) diff --git a/llvm/lib/Transforms/Instrumentation/NumericalStabilitySanitizer.cpp b/llvm/lib/Transforms/Instrumentation/NumericalStabilitySanitizer.cpp index f9ef67923ed48..1581ae4f3ce7e 100644 --- a/llvm/lib/Transforms/Instrumentation/NumericalStabilitySanitizer.cpp +++ b/llvm/lib/Transforms/Instrumentation/NumericalStabilitySanitizer.cpp @@ -2020,7 +2020,6 @@ static void moveFastMathFlags(Function &F, F.removeFnAttr(attr); \ FMF.set##setter(); \ } - MOVE_FLAG("no-nans-fp-math", NoNaNs) MOVE_FLAG("no-signed-zeros-fp-math", NoSignedZeros) #undef MOVE_FLAG >From c0b194b6b32414eedff7b6c27b5727c098cf1be8 Mon Sep 17 00:00:00 2001 From: PaperChalice <[email protected]> Date: Fri, 13 Mar 2026 16:26:50 +0800 Subject: [PATCH 3/3] remove redundant tests --- llvm/test/CodeGen/AMDGPU/inline-attr.ll | 1 - llvm/test/CodeGen/Mips/fneg.ll | 2 -- llvm/test/CodeGen/X86/fabs.ll | 17 ++--------------- 3 files changed, 2 insertions(+), 18 deletions(-) diff --git a/llvm/test/CodeGen/AMDGPU/inline-attr.ll b/llvm/test/CodeGen/AMDGPU/inline-attr.ll index e642cf6c33ee8..c8a6db0c02e1d 100644 --- a/llvm/test/CodeGen/AMDGPU/inline-attr.ll +++ b/llvm/test/CodeGen/AMDGPU/inline-attr.ll @@ -1,5 +1,4 @@ ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --check-globals all --version 5 -; RUN: opt -mtriple=amdgcn-amd-amdhsa -S -O3 %s | FileCheck --check-prefixes=GCN,UNSAFE %s ; RUN: opt -mtriple=amdgcn-amd-amdhsa -S -O3 %s | FileCheck --check-prefixes=GCN,NONANS %s declare void @extern() #0 diff --git a/llvm/test/CodeGen/Mips/fneg.ll b/llvm/test/CodeGen/Mips/fneg.ll index 0a72a34321b3c..6ded6de468b7d 100644 --- a/llvm/test/CodeGen/Mips/fneg.ll +++ b/llvm/test/CodeGen/Mips/fneg.ll @@ -8,9 +8,7 @@ ; RUN: llc < %s -mtriple=mipsel-linux-gnu -mcpu=mips32 | FileCheck %s ; RUN: llc < %s -mtriple=mipsel-linux-gnu -mcpu=mips32r2 | FileCheck %s -; RUN: llc < %s -mtriple=mipsel-linux-gnu -mcpu=mips32 | FileCheck %s -; RUN: llc < %s -mtriple=mips64el-linux-gnu -mcpu=mips64 | FileCheck %s ; RUN: llc < %s -mtriple=mips64el-linux-gnu -mcpu=mips64 | FileCheck %s define float @foo0(float %d) nounwind readnone { diff --git a/llvm/test/CodeGen/X86/fabs.ll b/llvm/test/CodeGen/X86/fabs.ll index 4308c4d7e78e9..050460b2acefc 100644 --- a/llvm/test/CodeGen/X86/fabs.ll +++ b/llvm/test/CodeGen/X86/fabs.ll @@ -1,7 +1,6 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py -; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=-sse,-sse2,-sse3 | FileCheck %s --check-prefix=X87 -; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=-sse,-sse2,-sse3 | FileCheck %s --check-prefix=X87UNSAFE -; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=X64 +; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=-sse,-sse2,-sse3 | FileCheck %s --check-prefix=X87 +; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=X64 declare float @llvm.fabs.f32(float) declare x86_fp80 @llvm.fabs.f80(x86_fp80) @@ -13,12 +12,6 @@ define float @test1(float %X) { ; X87-NEXT: fabs ; X87-NEXT: retl ; -; X87UNSAFE-LABEL: test1: -; X87UNSAFE: # %bb.0: -; X87UNSAFE-NEXT: flds {{[0-9]+}}(%esp) -; X87UNSAFE-NEXT: fabs -; X87UNSAFE-NEXT: retl -; ; X64-LABEL: test1: ; X64: # %bb.0: ; X64-NEXT: andps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 @@ -34,12 +27,6 @@ define x86_fp80 @test2(x86_fp80 %X) { ; X87-NEXT: fabs ; X87-NEXT: retl ; -; X87UNSAFE-LABEL: test2: -; X87UNSAFE: # %bb.0: -; X87UNSAFE-NEXT: fldt {{[0-9]+}}(%esp) -; X87UNSAFE-NEXT: fabs -; X87UNSAFE-NEXT: retl -; ; X64-LABEL: test2: ; X64: # %bb.0: ; X64-NEXT: fldt {{[0-9]+}}(%rsp) _______________________________________________ cfe-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
