zyedidia wrote: Sounds good, I will split this into a few PRs. I'll start with transformations just for system instructions (TLS and syscalls), followed by control flow, and then memory accesses, and take into account existing comments here when I draft that.
We can delay the TSFlags question until the memory accesses, but I'll also prepare a version using switch tables. Unfortunately I don't think the full amount of information we need (type of addressing mode, and index of base register plus additional operands associated with the addressing mode) is available via existing helper functions, so some addition on this front will be necessary. Regarding `getInstSizeInBytes`, I think it will be difficult to have it return something exactly correct, but overestimation of branch distances for LFI code will be okay. We can probably make the prediction more accurate than it is currently, but exact prediction would require a lot of duplicated logic outside of the normal rewriter source, and still wouldn't be able to correctly handle predicting rewrite sizes of inline assembly. The function is currently used for branch relaxation and jump table compression. Correct branch relaxation could be done using the `mayNeedRelaxation` infrastructure, but AArch64 currently does not use that. https://github.com/llvm/llvm-project/pull/184277 _______________________________________________ cfe-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
