github-actions[bot] wrote:
<!--LLVM CODE FORMAT COMMENT: {clang-format}-->
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<details>
<summary>
You can test this locally with the following command:
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``````````bash
git-clang-format --diff origin/main HEAD --extensions h,cpp --
llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCCodeEmitter.cpp
llvm/lib/Target/AMDGPU/SIDefines.h llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h --diff_from_common_commit
``````````
:warning:
The reproduction instructions above might return results for more than one PR
in a stack if you are using a stacked PR workflow. You can limit the results by
changing `origin/main` to the base branch/commit you want to compare against.
:warning:
</details>
<details>
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View the diff from clang-format here.
</summary>
``````````diff
diff --git a/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCCodeEmitter.cpp
b/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCCodeEmitter.cpp
index 3f4fcdc1b..41f380d6d 100644
--- a/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCCodeEmitter.cpp
+++ b/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCCodeEmitter.cpp
@@ -325,12 +325,12 @@ std::optional<uint64_t>
AMDGPUMCCodeEmitter::getLitEncoding(
case AMDGPU::OPERAND_REG_INLINE_C_INT64:
// Signed 64-bit integer operand - use IsInt<32> for 32-bit literal check
return getLit64Encoding(Desc, static_cast<uint64_t>(Imm), STI, false,
- /IsSigned=/true);
+ / IsSigned = / true);
case AMDGPU::OPERAND_REG_IMM_B64:
// Unsigned 64-bit integer operand - use IsUInt<32> for 32-bit literal
check
return getLit64Encoding(Desc, static_cast<uint64_t>(Imm), STI, false,
- /IsSigned=/false);
+ / IsSigned = / false);
case AMDGPU::OPERAND_REG_INLINE_C_FP64:
case AMDGPU::OPERAND_REG_INLINE_AC_FP64:
diff --git a/llvm/lib/Target/AMDGPU/SIDefines.h
b/llvm/lib/Target/AMDGPU/SIDefines.h
index b836162ed..ebef7ce97 100644
--- a/llvm/lib/Target/AMDGPU/SIDefines.h
+++ b/llvm/lib/Target/AMDGPU/SIDefines.h
@@ -201,8 +201,8 @@ namespace AMDGPU {
enum OperandType : unsigned {
/// Operands with register, 32-bit, or 64-bit immediate
OPERAND_REG_IMM_INT32 = MCOI::OPERAND_FIRST_TARGET,
- OPERAND_REG_IMM_INT64, // Signed 64-bit integer operand (uses IsInt<32>)
- OPERAND_REG_IMM_B64, // Unsigned 64-bit integer operand (uses IsUInt<32>)
+ OPERAND_REG_IMM_INT64, // Signed 64-bit integer operand (uses IsInt<32>)
+ OPERAND_REG_IMM_B64, // Unsigned 64-bit integer operand (uses IsUInt<32>)
OPERAND_REG_IMM_INT16,
OPERAND_REG_IMM_FP32,
OPERAND_REG_IMM_FP64,
diff --git a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
index cb66575bc..d52890c79 100644
--- a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
+++ b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
@@ -6544,10 +6544,8 @@ bool SIInstrInfo::isOperandLegal(const MachineInstr &MI,
unsigned OpIdx,
if (MO->isImm()) {
uint64_t Imm = MO->getImm();
bool Is64BitFPOp = OpInfo.OperandType == AMDGPU::OPERAND_REG_IMM_FP64;
- bool Is64BitSignedOp =
- OpInfo.OperandType == AMDGPU::OPERAND_REG_IMM_INT64;
- bool Is64BitUnsignedOp =
- OpInfo.OperandType == AMDGPU::OPERAND_REG_IMM_B64;
+ bool Is64BitSignedOp = OpInfo.OperandType == AMDGPU::OPERAND_REG_IMM_INT64;
+ bool Is64BitUnsignedOp = OpInfo.OperandType == AMDGPU::OPERAND_REG_IMM_B64;
bool Is64BitOp = Is64BitFPOp || Is64BitSignedOp || Is64BitUnsignedOp ||
OpInfo.OperandType == AMDGPU::OPERAND_REG_IMM_V2INT32 ||
OpInfo.OperandType == AMDGPU::OPERAND_REG_IMM_V2FP32;
``````````
</details>
https://github.com/llvm/llvm-project/pull/186575
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