https://github.com/albertbolt1 updated https://github.com/llvm/llvm-project/pull/186406
>From f8a37ee0140ed911706cd4084c022a9895da0181 Mon Sep 17 00:00:00 2001 From: albertbolt <[email protected]> Date: Fri, 13 Mar 2026 19:54:19 +0530 Subject: [PATCH 01/10] added scalar intrinsics and test cases --- .../lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp | 13 +++++++++++ clang/test/CodeGen/AArch64/neon/intrinsics.c | 22 +++++++++++++++++++ 2 files changed, 35 insertions(+) diff --git a/clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp b/clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp index 5534e69b5f8bc..574959cfac900 100644 --- a/clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp +++ b/clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp @@ -2785,8 +2785,21 @@ CIRGenFunction::emitAArch64BuiltinExpr(unsigned builtinID, const CallExpr *expr, case NEON::BI__builtin_neon_vrshrd_n_s64: case NEON::BI__builtin_neon_vrsrad_n_u64: case NEON::BI__builtin_neon_vrsrad_n_s64: + case NEON::BI__builtin_neon_vshld_s64: + case NEON::BI__builtin_neon_vshld_u64: + { + auto loc = getLoc(expr->getExprLoc()); + return builder.createShiftLeft(loc,ops[0],ops[1]); + } case NEON::BI__builtin_neon_vshld_n_s64: case NEON::BI__builtin_neon_vshld_n_u64: + { + auto loc = getLoc(expr->getExprLoc()); + std::optional<llvm::APSInt> amt = + expr->getArg(1)->getIntegerConstantExpr(getContext()); + assert(amt && "Expected argument to be a constant"); + return builder.createShiftLeft(loc, ops[0], amt->getZExtValue()); + } case NEON::BI__builtin_neon_vshrd_n_s64: case NEON::BI__builtin_neon_vshrd_n_u64: case NEON::BI__builtin_neon_vsrad_n_s64: diff --git a/clang/test/CodeGen/AArch64/neon/intrinsics.c b/clang/test/CodeGen/AArch64/neon/intrinsics.c index b740c3b5b2310..38fcb76ba9ce6 100644 --- a/clang/test/CodeGen/AArch64/neon/intrinsics.c +++ b/clang/test/CodeGen/AArch64/neon/intrinsics.c @@ -936,3 +936,25 @@ uint32x4_t test_vabaq_u32(uint32x4_t v1, uint32x4_t v2, uint32x4_t v3) { // LLVM-NEXT: ret <4 x i32> [[ADD_I]] return vabaq_u32(v1, v2, v3); } + +// LLVM-LABEL: @test_vshld_n_s64 +// CIR-LABEL: @test_vshld_n_s64 +int64_t test_vshld_n_s64(int64_t a) { + // CIR: cir.shift(left, {{.*}}) + + // LLVM-SAME: i64 noundef [[A:%.*]]) + // LLVM: [[SHL_N:%.*]] = shl i64 [[A]], 1 + // LLVM: ret i64 [[SHL_N]] + return (int64_t)vshld_n_s64(a, 1); +} + +// LLVM-LABEL: @test_vshld_n_u64 +// CIR-LABEL: @test_vshld_n_u64 +int64_t test_vshld_n_u64(int64_t a) { + // CIR: cir.shift(left, {{.*}}) + + // LLVM-SAME: i64 noundef [[A:%.*]]) + // LLVM: [[SHL_N:%.*]] = shl i64 [[A]], 1 + // LLVM: ret i64 [[SHL_N]] + return (int64_t)vshld_n_u64(a, 1); +} >From f32cbeaea2bfda6a1d41a440eaef352e6b968748 Mon Sep 17 00:00:00 2001 From: albertbolt <[email protected]> Date: Fri, 13 Mar 2026 20:04:55 +0530 Subject: [PATCH 02/10] removed unnecessary ones --- clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp | 6 ------ 1 file changed, 6 deletions(-) diff --git a/clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp b/clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp index 574959cfac900..6bd95cf755869 100644 --- a/clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp +++ b/clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp @@ -2785,12 +2785,6 @@ CIRGenFunction::emitAArch64BuiltinExpr(unsigned builtinID, const CallExpr *expr, case NEON::BI__builtin_neon_vrshrd_n_s64: case NEON::BI__builtin_neon_vrsrad_n_u64: case NEON::BI__builtin_neon_vrsrad_n_s64: - case NEON::BI__builtin_neon_vshld_s64: - case NEON::BI__builtin_neon_vshld_u64: - { - auto loc = getLoc(expr->getExprLoc()); - return builder.createShiftLeft(loc,ops[0],ops[1]); - } case NEON::BI__builtin_neon_vshld_n_s64: case NEON::BI__builtin_neon_vshld_n_u64: { >From c4762db90d79c1232c51d96c430e1e5d7681e25d Mon Sep 17 00:00:00 2001 From: albertbolt <[email protected]> Date: Fri, 13 Mar 2026 21:11:07 +0530 Subject: [PATCH 03/10] cleaned --- clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp b/clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp index 6bd95cf755869..affa2597a54bd 100644 --- a/clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp +++ b/clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp @@ -2786,8 +2786,7 @@ CIRGenFunction::emitAArch64BuiltinExpr(unsigned builtinID, const CallExpr *expr, case NEON::BI__builtin_neon_vrsrad_n_u64: case NEON::BI__builtin_neon_vrsrad_n_s64: case NEON::BI__builtin_neon_vshld_n_s64: - case NEON::BI__builtin_neon_vshld_n_u64: - { + case NEON::BI__builtin_neon_vshld_n_u64:{ auto loc = getLoc(expr->getExprLoc()); std::optional<llvm::APSInt> amt = expr->getArg(1)->getIntegerConstantExpr(getContext()); >From cf220f5a603738938ee129b9050d068b0b596442 Mon Sep 17 00:00:00 2001 From: albertbolt <[email protected]> Date: Sat, 14 Mar 2026 01:15:05 +0530 Subject: [PATCH 04/10] cleaned --- clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp b/clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp index affa2597a54bd..fb20289a415c5 100644 --- a/clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp +++ b/clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp @@ -2786,7 +2786,7 @@ CIRGenFunction::emitAArch64BuiltinExpr(unsigned builtinID, const CallExpr *expr, case NEON::BI__builtin_neon_vrsrad_n_u64: case NEON::BI__builtin_neon_vrsrad_n_s64: case NEON::BI__builtin_neon_vshld_n_s64: - case NEON::BI__builtin_neon_vshld_n_u64:{ + case NEON::BI__builtin_neon_vshld_n_u64: { auto loc = getLoc(expr->getExprLoc()); std::optional<llvm::APSInt> amt = expr->getArg(1)->getIntegerConstantExpr(getContext()); >From 54a5d477d371f45848d217e8a7a03533920a9190 Mon Sep 17 00:00:00 2001 From: albertbolt <[email protected]> Date: Sat, 14 Mar 2026 17:29:51 +0530 Subject: [PATCH 05/10] finished the scalar parts --- .../lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp | 2 ++ clang/test/CodeGen/AArch64/neon/intrinsics.c | 20 +++++++++++++++++++ 2 files changed, 22 insertions(+) diff --git a/clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp b/clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp index fb20289a415c5..2612250cb936c 100644 --- a/clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp +++ b/clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp @@ -1390,6 +1390,8 @@ static mlir::Value emitCommonNeonSISDBuiltinExpr( break; case NEON::BI__builtin_neon_vabdd_f64: case NEON::BI__builtin_neon_vabds_f32: + case NEON::BI__builtin_neon_vshld_s64: + case NEON::BI__builtin_neon_vshld_u64: return emitNeonCall(cgf.cgm, cgf.getBuilder(), {cgf.convertType(expr->getArg(0)->getType())}, ops, llvmIntrName, cgf.convertType(expr->getType()), loc); diff --git a/clang/test/CodeGen/AArch64/neon/intrinsics.c b/clang/test/CodeGen/AArch64/neon/intrinsics.c index 38fcb76ba9ce6..ee70a1ff5e232 100644 --- a/clang/test/CodeGen/AArch64/neon/intrinsics.c +++ b/clang/test/CodeGen/AArch64/neon/intrinsics.c @@ -958,3 +958,23 @@ int64_t test_vshld_n_u64(int64_t a) { // LLVM: ret i64 [[SHL_N]] return (int64_t)vshld_n_u64(a, 1); } + +// LLVM-LABEL: @test_vshld_s64 +// CIR-LABEL: @test_vshld_s64 +int64_t test_vshld_s64(int64_t a,int64_t b) { + + // LLVM-SAME: i64 noundef [[A:%.*]], i64 noundef [[B:%.*]]) #[[ATTR0:[0-9]+]] { + // LLVM: [[VSHLD_S64_I:%.*]] = call i64 @llvm.aarch64.neon.sshl.i64(i64 [[A]], i64 [[B]]) + // LLVM: ret i64 [[VSHLD_S64_I]] + return (int64_t)vshld_s64(a, b); +} + +// LLVM-LABEL: @test_vshld_u64 +// CIR-LABEL: @test_vshld_u64 +int64_t test_vshld_u64(int64_t a,int64_t b) { + + // LLVM-SAME: i64 noundef [[A:%.*]], i64 noundef [[B:%.*]]) #[[ATTR0:[0-9]+]] { + // LLVM: [[VSHLD_S64_I:%.*]] = call i64 @llvm.aarch64.neon.ushl.i64(i64 [[A]], i64 [[B]]) + // LLVM: ret i64 [[VSHLD_S64_I]] + return (int64_t)vshld_u64(a, b); +} >From 4e4d97b2ef07af71c1cab69584d95f0ba301d519 Mon Sep 17 00:00:00 2001 From: albertbolt1 <[email protected]> Date: Mon, 16 Mar 2026 22:25:57 +0530 Subject: [PATCH 06/10] Update clang/test/CodeGen/AArch64/neon/intrinsics.c MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Co-authored-by: Andrzej Warzyński <[email protected]> --- clang/test/CodeGen/AArch64/neon/intrinsics.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/clang/test/CodeGen/AArch64/neon/intrinsics.c b/clang/test/CodeGen/AArch64/neon/intrinsics.c index ee70a1ff5e232..7f9f0b4ffe9cd 100644 --- a/clang/test/CodeGen/AArch64/neon/intrinsics.c +++ b/clang/test/CodeGen/AArch64/neon/intrinsics.c @@ -936,7 +936,9 @@ uint32x4_t test_vabaq_u32(uint32x4_t v1, uint32x4_t v2, uint32x4_t v3) { // LLVM-NEXT: ret <4 x i32> [[ADD_I]] return vabaq_u32(v1, v2, v3); } - +//===------------------------------------------------------===// +// 2.1.3.1.1. Vector Shift Left +//===------------------------------------------------------===// // LLVM-LABEL: @test_vshld_n_s64 // CIR-LABEL: @test_vshld_n_s64 int64_t test_vshld_n_s64(int64_t a) { >From d14f47c837da42a19cd012db8cb719adcc4d4219 Mon Sep 17 00:00:00 2001 From: albertbolt1 <[email protected]> Date: Mon, 16 Mar 2026 22:28:53 +0530 Subject: [PATCH 07/10] Update clang/test/CodeGen/AArch64/neon/intrinsics.c MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Co-authored-by: Andrzej Warzyński <[email protected]> --- clang/test/CodeGen/AArch64/neon/intrinsics.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/clang/test/CodeGen/AArch64/neon/intrinsics.c b/clang/test/CodeGen/AArch64/neon/intrinsics.c index 7f9f0b4ffe9cd..73e787e0eb96b 100644 --- a/clang/test/CodeGen/AArch64/neon/intrinsics.c +++ b/clang/test/CodeGen/AArch64/neon/intrinsics.c @@ -944,7 +944,7 @@ uint32x4_t test_vabaq_u32(uint32x4_t v1, uint32x4_t v2, uint32x4_t v3) { int64_t test_vshld_n_s64(int64_t a) { // CIR: cir.shift(left, {{.*}}) - // LLVM-SAME: i64 noundef [[A:%.*]]) + // LLVM-SAME: i64 {{.*}} [[A:%.*]]) // LLVM: [[SHL_N:%.*]] = shl i64 [[A]], 1 // LLVM: ret i64 [[SHL_N]] return (int64_t)vshld_n_s64(a, 1); >From c27fed1de2c11883ffe18bca7d292b74cb3230f9 Mon Sep 17 00:00:00 2001 From: albertbolt <[email protected]> Date: Tue, 17 Mar 2026 02:42:03 +0530 Subject: [PATCH 08/10] review comments worked on --- .../lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp | 4 +++ clang/test/CodeGen/AArch64/neon/intrinsics.c | 30 ++++++++++--------- 2 files changed, 20 insertions(+), 14 deletions(-) diff --git a/clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp b/clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp index ed5d172766618..08254858b4b7c 100644 --- a/clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp +++ b/clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp @@ -2787,6 +2787,10 @@ CIRGenFunction::emitAArch64BuiltinExpr(unsigned builtinID, const CallExpr *expr, case NEON::BI__builtin_neon_vrshrd_n_s64: case NEON::BI__builtin_neon_vrsrad_n_u64: case NEON::BI__builtin_neon_vrsrad_n_s64: + cgm.errorNYI(expr->getSourceRange(), + std::string("unimplemented AArch64 builtin call: ") + + getContext().BuiltinInfo.getName(builtinID)); + return mlir::Value{}; case NEON::BI__builtin_neon_vshld_n_s64: case NEON::BI__builtin_neon_vshld_n_u64: { auto loc = getLoc(expr->getExprLoc()); diff --git a/clang/test/CodeGen/AArch64/neon/intrinsics.c b/clang/test/CodeGen/AArch64/neon/intrinsics.c index 1c902ceb0a00e..bf8e62feda8da 100644 --- a/clang/test/CodeGen/AArch64/neon/intrinsics.c +++ b/clang/test/CodeGen/AArch64/neon/intrinsics.c @@ -1,8 +1,8 @@ // REQUIRES: aarch64-registered-target || arm-registered-target -// RUN: %clang_cc1 -triple arm64-none-linux-gnu -target-feature +neon -disable-O0-optnone -flax-vector-conversions=none -emit-llvm -o - %s | opt -S -passes=mem2reg,sroa | FileCheck %s --check-prefixes=LLVM -// RUN: %if cir-enabled %{%clang_cc1 -triple arm64-none-linux-gnu -target-feature +neon -disable-O0-optnone -flax-vector-conversions=none -fclangir -emit-llvm -o - %s | opt -S -passes=mem2reg,sroa | FileCheck %s --check-prefixes=LLVM %} -// RUN: %if cir-enabled %{%clang_cc1 -triple arm64-none-linux-gnu -target-feature +neon -disable-O0-optnone -flax-vector-conversions=none -fclangir -emit-cir -o - %s | FileCheck %s --check-prefixes=CIR %} +// RUN: %clang_cc1 -triple arm64-none-linux-gnu -target-feature +neon -disable-O0-optnone -flax-vector-conversions=none -emit-llvm -o - %s | opt -S -passes=mem2reg,sroa | FileCheck %s --check-prefixes=ALL,LLVM +// RUN: %if cir-enabled %{%clang_cc1 -triple arm64-none-linux-gnu -target-feature +neon -disable-O0-optnone -flax-vector-conversions=none -fclangir -emit-llvm -o - %s | opt -S -passes=mem2reg,sroa | FileCheck %s --check-prefixes=ALL,LLVM %} +// RUN: %if cir-enabled %{%clang_cc1 -triple arm64-none-linux-gnu -target-feature +neon -disable-O0-optnone -flax-vector-conversions=none -fclangir -emit-cir -o - %s | FileCheck %s --check-prefixes=ALL,CIR %} //============================================================================= // NOTES @@ -939,8 +939,8 @@ uint32x4_t test_vabaq_u32(uint32x4_t v1, uint32x4_t v2, uint32x4_t v3) { //===------------------------------------------------------===// // 2.1.3.1.1. Vector Shift Left //===------------------------------------------------------===// -// LLVM-LABEL: @test_vshld_n_s64 -// CIR-LABEL: @test_vshld_n_s64 + +// ALL-LABEL: test_vshld_n_s64 int64_t test_vshld_n_s64(int64_t a) { // CIR: cir.shift(left, {{.*}}) @@ -950,33 +950,35 @@ int64_t test_vshld_n_s64(int64_t a) { return (int64_t)vshld_n_s64(a, 1); } -// LLVM-LABEL: @test_vshld_n_u64 -// CIR-LABEL: @test_vshld_n_u64 +// ALL-LABEL: test_vshld_n_u64 int64_t test_vshld_n_u64(int64_t a) { // CIR: cir.shift(left, {{.*}}) - // LLVM-SAME: i64 noundef [[A:%.*]]) + // LLVM-SAME: i64 {{.*}} [[A:%.*]]) // LLVM: [[SHL_N:%.*]] = shl i64 [[A]], 1 // LLVM: ret i64 [[SHL_N]] return (int64_t)vshld_n_u64(a, 1); } -// LLVM-LABEL: @test_vshld_s64 -// CIR-LABEL: @test_vshld_s64 +// LLVM-LABEL: test_vshld_s64 +// CIR-LABEL: vshld_s64 int64_t test_vshld_s64(int64_t a,int64_t b) { + // CIR: cir.call_llvm_intrinsic "aarch64.neon.sshl" %{{.*}}, %{{.*}} : (!s64i, !s64i) -> !s64i - // LLVM-SAME: i64 noundef [[A:%.*]], i64 noundef [[B:%.*]]) #[[ATTR0:[0-9]+]] { + // LLVM-SAME: i64 {{.*}} [[A:%.*]], i64 {{.*}} [[B:%.*]]) #[[ATTR0:[0-9]+]] { // LLVM: [[VSHLD_S64_I:%.*]] = call i64 @llvm.aarch64.neon.sshl.i64(i64 [[A]], i64 [[B]]) // LLVM: ret i64 [[VSHLD_S64_I]] return (int64_t)vshld_s64(a, b); } -// LLVM-LABEL: @test_vshld_u64 -// CIR-LABEL: @test_vshld_u64 +// LLVM-LABEL: test_vshld_u64 +// CIR-LABEL: vshld_u64 int64_t test_vshld_u64(int64_t a,int64_t b) { + // CIR: cir.call_llvm_intrinsic "aarch64.neon.ushl" %{{.*}}, %{{.*}} : (!u64i, !s64i) -> !u64i - // LLVM-SAME: i64 noundef [[A:%.*]], i64 noundef [[B:%.*]]) #[[ATTR0:[0-9]+]] { + // LLVM-SAME: i64 {{.*}} [[A:%.*]], i64 {{.*}} [[B:%.*]]) #[[ATTR0:[0-9]+]] { // LLVM: [[VSHLD_S64_I:%.*]] = call i64 @llvm.aarch64.neon.ushl.i64(i64 [[A]], i64 [[B]]) // LLVM: ret i64 [[VSHLD_S64_I]] return (int64_t)vshld_u64(a, b); } + >From 76da399ca243f41f7144ba53af0239744a939630 Mon Sep 17 00:00:00 2001 From: albertbolt <[email protected]> Date: Tue, 17 Mar 2026 02:47:03 +0530 Subject: [PATCH 09/10] formatting done --- clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp b/clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp index 08254858b4b7c..5d7b8d839fa84 100644 --- a/clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp +++ b/clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp @@ -2787,7 +2787,7 @@ CIRGenFunction::emitAArch64BuiltinExpr(unsigned builtinID, const CallExpr *expr, case NEON::BI__builtin_neon_vrshrd_n_s64: case NEON::BI__builtin_neon_vrsrad_n_u64: case NEON::BI__builtin_neon_vrsrad_n_s64: - cgm.errorNYI(expr->getSourceRange(), + cgm.errorNYI(expr->getSourceRange(), std::string("unimplemented AArch64 builtin call: ") + getContext().BuiltinInfo.getName(builtinID)); return mlir::Value{}; >From 62a179ccef3348e2f048ed4b407d582dc3bb482e Mon Sep 17 00:00:00 2001 From: albertbolt <[email protected]> Date: Tue, 17 Mar 2026 02:53:35 +0530 Subject: [PATCH 10/10] test cases removed to reduce duplication --- clang/test/CodeGen/AArch64/neon-intrinsics.c | 40 -------------------- 1 file changed, 40 deletions(-) diff --git a/clang/test/CodeGen/AArch64/neon-intrinsics.c b/clang/test/CodeGen/AArch64/neon-intrinsics.c index bfaea2b8ae909..8eb6cd86339d6 100644 --- a/clang/test/CodeGen/AArch64/neon-intrinsics.c +++ b/clang/test/CodeGen/AArch64/neon-intrinsics.c @@ -12052,26 +12052,6 @@ uint64_t test_vqsubd_u64(uint64_t a, uint64_t b) { return vqsubd_u64(a, b); } -// CHECK-LABEL: define dso_local i64 @test_vshld_s64( -// CHECK-SAME: i64 noundef [[A:%.*]], i64 noundef [[B:%.*]]) #[[ATTR0]] { -// CHECK-NEXT: [[ENTRY:.*:]] -// CHECK-NEXT: [[VSHLD_S64_I:%.*]] = call i64 @llvm.aarch64.neon.sshl.i64(i64 [[A]], i64 [[B]]) -// CHECK-NEXT: ret i64 [[VSHLD_S64_I]] -// -int64_t test_vshld_s64(int64_t a, int64_t b) { - return vshld_s64(a, b); -} - -// CHECK-LABEL: define dso_local i64 @test_vshld_u64( -// CHECK-SAME: i64 noundef [[A:%.*]], i64 noundef [[B:%.*]]) #[[ATTR0]] { -// CHECK-NEXT: [[ENTRY:.*:]] -// CHECK-NEXT: [[VSHLD_U64_I:%.*]] = call i64 @llvm.aarch64.neon.ushl.i64(i64 [[A]], i64 [[B]]) -// CHECK-NEXT: ret i64 [[VSHLD_U64_I]] -// -uint64_t test_vshld_u64(uint64_t a, int64_t b) { - return vshld_u64(a, b); -} - // CHECK-LABEL: define dso_local i8 @test_vqshlb_s8( // CHECK-SAME: i8 noundef [[A:%.*]], i8 noundef [[B:%.*]]) #[[ATTR0]] { // CHECK-NEXT: [[ENTRY:.*:]] @@ -17887,16 +17867,6 @@ uint64x1_t test_vrsra_n_u64(uint64x1_t a, uint64x1_t b) { return vrsra_n_u64(a, b, 1); } -// CHECK-LABEL: define dso_local i64 @test_vshld_n_s64( -// CHECK-SAME: i64 noundef [[A:%.*]]) #[[ATTR0]] { -// CHECK-NEXT: [[ENTRY:.*:]] -// CHECK-NEXT: [[SHLD_N:%.*]] = shl i64 [[A]], 1 -// CHECK-NEXT: ret i64 [[SHLD_N]] -// -int64_t test_vshld_n_s64(int64_t a) { - return (int64_t)vshld_n_s64(a, 1); -} - // CHECK-LABEL: define dso_local <1 x i64> @test_vshl_n_s64( // CHECK-SAME: <1 x i64> noundef [[A:%.*]]) #[[ATTR0]] { // CHECK-NEXT: [[ENTRY:.*:]] @@ -17909,16 +17879,6 @@ int64x1_t test_vshl_n_s64(int64x1_t a) { return vshl_n_s64(a, 1); } -// CHECK-LABEL: define dso_local i64 @test_vshld_n_u64( -// CHECK-SAME: i64 noundef [[A:%.*]]) #[[ATTR0]] { -// CHECK-NEXT: [[ENTRY:.*:]] -// CHECK-NEXT: [[SHLD_N:%.*]] = shl i64 [[A]], 63 -// CHECK-NEXT: ret i64 [[SHLD_N]] -// -uint64_t test_vshld_n_u64(uint64_t a) { - return (uint64_t)vshld_n_u64(a, 63); -} - // CHECK-LABEL: define dso_local <1 x i64> @test_vshl_n_u64( // CHECK-SAME: <1 x i64> noundef [[A:%.*]]) #[[ATTR0]] { // CHECK-NEXT: [[ENTRY:.*:]] _______________________________________________ cfe-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
