https://github.com/mbrkusanin created 
https://github.com/llvm/llvm-project/pull/187735

None

From f7a18ecc54652e8a61bef08da4e57190a9204084 Mon Sep 17 00:00:00 2001
From: Mirko Brkusanin <[email protected]>
Date: Fri, 20 Mar 2026 16:20:07 +0100
Subject: [PATCH] [AMDGPU] Define new targets gfx1171 and gfx1172

---
 clang/include/clang/Basic/OffloadArch.h       |  2 ++
 clang/lib/Basic/OffloadArch.cpp               |  2 ++
 clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp      |  2 ++
 .../CodeGenOpenCL/builtins-amdgcn-gfx11.cl    |  2 ++
 clang/test/Driver/amdgpu-macros.cl            |  2 ++
 clang/test/Driver/amdgpu-mcpu.cl              |  4 +++
 .../Misc/target-invalid-cpu-note/amdgcn.c     |  2 ++
 .../test/Misc/target-invalid-cpu-note/nvptx.c |  2 ++
 llvm/docs/AMDGPUUsage.rst                     | 32 ++++++++++++++-----
 llvm/include/llvm/BinaryFormat/ELF.h          |  2 ++
 .../llvm/TargetParser/AMDGPUTargetParser.def  |  2 ++
 llvm/lib/Target/AMDGPU/AMDGPU.td              |  4 +--
 llvm/lib/Target/AMDGPU/GCNProcessors.td       | 10 +++++-
 .../MCTargetDesc/AMDGPUTargetStreamer.cpp     |  4 +++
 llvm/lib/TargetParser/TargetParser.cpp        |  2 ++
 .../CodeGen/AMDGPU/directive-amdgcn-target.ll |  4 +++
 .../CodeGen/AMDGPU/elf-header-flags-mach.ll   |  4 +++
 .../Object/AMDGPU/elf-header-flags-mach.yaml  | 14 ++++++++
 .../llvm-objdump/ELF/AMDGPU/subtarget.ll      | 10 ++++++
 .../llvm-readobj/ELF/AMDGPU/elf-headers.test  | 18 +++++++++++
 20 files changed, 113 insertions(+), 11 deletions(-)

diff --git a/clang/include/clang/Basic/OffloadArch.h 
b/clang/include/clang/Basic/OffloadArch.h
index 13df6dd76411e..fec56893914cd 100644
--- a/clang/include/clang/Basic/OffloadArch.h
+++ b/clang/include/clang/Basic/OffloadArch.h
@@ -103,6 +103,8 @@ enum class OffloadArch {
   GFX1152,
   GFX1153,
   GFX1170,
+  GFX1171,
+  GFX1172,
   GFX12_GENERIC,
   GFX1200,
   GFX1201,
diff --git a/clang/lib/Basic/OffloadArch.cpp b/clang/lib/Basic/OffloadArch.cpp
index cad19ae7b0d8d..61087d7eaea4c 100644
--- a/clang/lib/Basic/OffloadArch.cpp
+++ b/clang/lib/Basic/OffloadArch.cpp
@@ -98,6 +98,8 @@ static const OffloadArchToStringMap ArchNames[] = {
     GFX(1152), // gfx1152
     GFX(1153), // gfx1153
     GFX(1170), // gfx1170
+    GFX(1171), // gfx1171
+    GFX(1172), // gfx1172
     {OffloadArch::GFX12_GENERIC, "gfx12-generic", "compute_amdgcn"},
     GFX(1200), // gfx1200
     GFX(1201), // gfx1201
diff --git a/clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp 
b/clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp
index b964ef38ddb69..121d20a0de063 100644
--- a/clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp
+++ b/clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp
@@ -2372,6 +2372,8 @@ void CGOpenMPRuntimeGPU::processRequiresDirective(const 
OMPRequiresDecl *D) {
       case OffloadArch::GFX1152:
       case OffloadArch::GFX1153:
       case OffloadArch::GFX1170:
+      case OffloadArch::GFX1171:
+      case OffloadArch::GFX1172:
       case OffloadArch::GFX12_GENERIC:
       case OffloadArch::GFX1200:
       case OffloadArch::GFX1201:
diff --git a/clang/test/CodeGenOpenCL/builtins-amdgcn-gfx11.cl 
b/clang/test/CodeGenOpenCL/builtins-amdgcn-gfx11.cl
index d7f97488376d7..c543a89743702 100644
--- a/clang/test/CodeGenOpenCL/builtins-amdgcn-gfx11.cl
+++ b/clang/test/CodeGenOpenCL/builtins-amdgcn-gfx11.cl
@@ -8,6 +8,8 @@
 // RUN: %clang_cc1 -triple amdgcn-unknown-unknown -target-cpu gfx1152 
-emit-llvm -o - %s | FileCheck --check-prefixes=CHECK,GCN %s
 // RUN: %clang_cc1 -triple amdgcn-unknown-unknown -target-cpu gfx1153 
-emit-llvm -o - %s | FileCheck --check-prefixes=CHECK,GCN %s
 // RUN: %clang_cc1 -triple amdgcn-unknown-unknown -target-cpu gfx1170 
-emit-llvm -o - %s | FileCheck --check-prefixes=CHECK,GCN %s
+// RUN: %clang_cc1 -triple amdgcn-unknown-unknown -target-cpu gfx1171 
-emit-llvm -o - %s | FileCheck --check-prefixes=CHECK,GCN %s
+// RUN: %clang_cc1 -triple amdgcn-unknown-unknown -target-cpu gfx1172 
-emit-llvm -o - %s | FileCheck --check-prefixes=CHECK,GCN %s
 // RUN: %clang_cc1 -triple spirv64-amd-amdhsa -emit-llvm -o - %s | FileCheck 
--check-prefixes=CHECK,AMDGCNSPIRV %s
 
 typedef unsigned int uint;
diff --git a/clang/test/Driver/amdgpu-macros.cl 
b/clang/test/Driver/amdgpu-macros.cl
index b75ecadf35666..4876a5fef983a 100644
--- a/clang/test/Driver/amdgpu-macros.cl
+++ b/clang/test/Driver/amdgpu-macros.cl
@@ -130,6 +130,8 @@
 // RUN: %clang -E -dM -target amdgcn -mcpu=gfx1152 %s 2>&1 | FileCheck 
--check-prefixes=ARCH-GCN,FAST_FMAF %s -DWAVEFRONT_SIZE=32 -DCPU=gfx1152 
-DFAMILY=GFX11
 // RUN: %clang -E -dM -target amdgcn -mcpu=gfx1153 %s 2>&1 | FileCheck 
--check-prefixes=ARCH-GCN,FAST_FMAF %s -DWAVEFRONT_SIZE=32 -DCPU=gfx1153 
-DFAMILY=GFX11
 // RUN: %clang -E -dM -target amdgcn -mcpu=gfx1170 %s 2>&1 | FileCheck 
--check-prefixes=ARCH-GCN,FAST_FMAF %s -DWAVEFRONT_SIZE=32 -DCPU=gfx1170 
-DFAMILY=GFX11
+// RUN: %clang -E -dM -target amdgcn -mcpu=gfx1171 %s 2>&1 | FileCheck 
--check-prefixes=ARCH-GCN,FAST_FMAF %s -DWAVEFRONT_SIZE=32 -DCPU=gfx1171 
-DFAMILY=GFX11
+// RUN: %clang -E -dM -target amdgcn -mcpu=gfx1172 %s 2>&1 | FileCheck 
--check-prefixes=ARCH-GCN,FAST_FMAF %s -DWAVEFRONT_SIZE=32 -DCPU=gfx1172 
-DFAMILY=GFX11
 // RUN: %clang -E -dM -target amdgcn -mcpu=gfx1200 %s 2>&1 | FileCheck 
--check-prefixes=ARCH-GCN,FAST_FMAF %s -DWAVEFRONT_SIZE=32 -DCPU=gfx1200 
-DFAMILY=GFX12
 // RUN: %clang -E -dM -target amdgcn -mcpu=gfx1201 %s 2>&1 | FileCheck 
--check-prefixes=ARCH-GCN,FAST_FMAF %s -DWAVEFRONT_SIZE=32 -DCPU=gfx1201 
-DFAMILY=GFX12
 // RUN: %clang -E -dM -target amdgcn -mcpu=gfx1250 %s 2>&1 | FileCheck 
--check-prefixes=ARCH-GCN,FAST_FMAF %s -DWAVEFRONT_SIZE=32 -DCPU=gfx1250 
-DFAMILY=GFX12
diff --git a/clang/test/Driver/amdgpu-mcpu.cl b/clang/test/Driver/amdgpu-mcpu.cl
index 6d92f119fb9bc..ecacb42121485 100644
--- a/clang/test/Driver/amdgpu-mcpu.cl
+++ b/clang/test/Driver/amdgpu-mcpu.cl
@@ -114,6 +114,8 @@
 // RUN: %clang -### -target amdgcn -mcpu=gfx1152 %s 2>&1 | FileCheck 
--check-prefix=GFX1152 %s
 // RUN: %clang -### -target amdgcn -mcpu=gfx1153 %s 2>&1 | FileCheck 
--check-prefix=GFX1153 %s
 // RUN: %clang -### -target amdgcn -mcpu=gfx1170 %s 2>&1 | FileCheck 
--check-prefix=GFX1170 %s
+// RUN: %clang -### -target amdgcn -mcpu=gfx1171 %s 2>&1 | FileCheck 
--check-prefix=GFX1171 %s
+// RUN: %clang -### -target amdgcn -mcpu=gfx1172 %s 2>&1 | FileCheck 
--check-prefix=GFX1172 %s
 // RUN: %clang -### -target amdgcn -mcpu=gfx1200 %s 2>&1 | FileCheck 
--check-prefix=GFX1200 %s
 // RUN: %clang -### -target amdgcn -mcpu=gfx1201 %s 2>&1 | FileCheck 
--check-prefix=GFX1201 %s
 // RUN: %clang -### -target amdgcn -mcpu=gfx1250 %s 2>&1 | FileCheck 
--check-prefix=GFX1250 %s
@@ -173,6 +175,8 @@
 // GFX1152:   "-target-cpu" "gfx1152"
 // GFX1153:   "-target-cpu" "gfx1153"
 // GFX1170:   "-target-cpu" "gfx1170"
+// GFX1171:   "-target-cpu" "gfx1171"
+// GFX1172:   "-target-cpu" "gfx1172"
 // GFX1200:   "-target-cpu" "gfx1200"
 // GFX1201:   "-target-cpu" "gfx1201"
 // GFX1250:   "-target-cpu" "gfx1250"
diff --git a/clang/test/Misc/target-invalid-cpu-note/amdgcn.c 
b/clang/test/Misc/target-invalid-cpu-note/amdgcn.c
index c6fd0fd8d5489..87e156a53caf5 100644
--- a/clang/test/Misc/target-invalid-cpu-note/amdgcn.c
+++ b/clang/test/Misc/target-invalid-cpu-note/amdgcn.c
@@ -67,6 +67,8 @@
 // CHECK-SAME: {{^}}, gfx1152
 // CHECK-SAME: {{^}}, gfx1153
 // CHECK-SAME: {{^}}, gfx1170
+// CHECK-SAME: {{^}}, gfx1171
+// CHECK-SAME: {{^}}, gfx1172
 // CHECK-SAME: {{^}}, gfx1200
 // CHECK-SAME: {{^}}, gfx1201
 // CHECK-SAME: {{^}}, gfx1250
diff --git a/clang/test/Misc/target-invalid-cpu-note/nvptx.c 
b/clang/test/Misc/target-invalid-cpu-note/nvptx.c
index 5c3f1f28c4712..f39027ced03ac 100644
--- a/clang/test/Misc/target-invalid-cpu-note/nvptx.c
+++ b/clang/test/Misc/target-invalid-cpu-note/nvptx.c
@@ -88,6 +88,8 @@
 // CHECK-SAME: {{^}}, gfx1152
 // CHECK-SAME: {{^}}, gfx1153
 // CHECK-SAME: {{^}}, gfx1170
+// CHECK-SAME: {{^}}, gfx1171
+// CHECK-SAME: {{^}}, gfx1172
 // CHECK-SAME: {{^}}, gfx12-generic
 // CHECK-SAME: {{^}}, gfx1200
 // CHECK-SAME: {{^}}, gfx1201
diff --git a/llvm/docs/AMDGPUUsage.rst b/llvm/docs/AMDGPUUsage.rst
index 1ede5ca2d4cf6..8423b04e73772 100644
--- a/llvm/docs/AMDGPUUsage.rst
+++ b/llvm/docs/AMDGPUUsage.rst
@@ -525,6 +525,20 @@ Every processor supports every OS ABI (see 
:ref:`amdgpu-os`) with the following
                                                                         
work-item                       Add product
                                                                         IDs    
                         names.
 
+     ``gfx1171``                 ``amdgcn``   APU   - cumode          - 
Architected                   *TBA*
+                                                    - wavefrontsize64   flat
+                                                                        
scratch                       .. TODO::
+                                                                      - Packed
+                                                                        
work-item                       Add product
+                                                                        IDs    
                         names.
+
+     ``gfx1172``                 ``amdgcn``   APU   - cumode          - 
Architected                   *TBA*
+                                                    - wavefrontsize64   flat
+                                                                        
scratch                       .. TODO::
+                                                                      - Packed
+                                                                        
work-item                       Add product
+                                                                        IDs    
                         names.
+
      **GCN GFX12 (RDNA 4)** [AMD-GCN-GFX12-RDNA4]_
      
-----------------------------------------------------------------------------------------------------------------------
      ``gfx1200``                 ``amdgcn``   dGPU  - cumode          - 
Architected                   - Radeon RX 9060
@@ -2000,11 +2014,11 @@ The AMDGPU backend supports the following LLVM IR 
attributes.
                                                       
"amdgpu-flat-work-group-size" value, the implied occupancy
                                                       bounds by the workgroup 
size takes precedence.
 
-     "amdgpu-ieee" true/false.                        GFX6-GFX11 (Except 
GFX1170) Only
+     "amdgpu-ieee" true/false.                        GFX6-GFX11 (Except 
GFX11.7) Only
                                                       Specify whether the 
function expects the IEEE field of the
                                                       mode register to be set 
on entry. Overrides the default for
                                                       the calling convention.
-     "amdgpu-dx10-clamp" true/false.                  GFX6-GFX11 (Except 
GFX1170) Only
+     "amdgpu-dx10-clamp" true/false.                  GFX6-GFX11 (Except 
GFX11.7) Only
                                                       Specify whether the 
function expects the DX10_CLAMP field of
                                                       the mode register to be 
set on entry. Overrides the default
                                                       for the calling 
convention.
@@ -2760,7 +2774,9 @@ The AMDGPU backend uses the following ELF header:
      ``EF_AMDGPU_MACH_AMDGCN_GFX12_GENERIC``    0x059      ``gfx12-generic``
      ``EF_AMDGPU_MACH_AMDGCN_GFX1251``          0x05a      ``gfx1251``
      ``EF_AMDGPU_MACH_AMDGCN_GFX12_5_GENERIC``  0x05b      ``gfx12-5-generic``
+     ``EF_AMDGPU_MACH_AMDGCN_GFX1172``          0x05c      ``gfx1172``
      ``EF_AMDGPU_MACH_AMDGCN_GFX1170``          0x05d      ``gfx1170``
+     ``EF_AMDGPU_MACH_AMDGCN_GFX1171``          0x05e      ``gfx1171``
      ``EF_AMDGPU_MACH_AMDGCN_GFX9_4_GENERIC``   0x05f      ``gfx9-4-generic``
      *reserved*                                 0x060      Reserved.
      *reserved*                                 0x070      Reserved.
@@ -5789,7 +5805,7 @@ The fields used by CP for code objects before V3 also 
match those specified in
                                                      CP is responsible for
                                                      filling in
                                                      
``COMPUTE_PGM_RSRC1.PRIV``.
-     21      1 bit   ENABLE_DX10_CLAMP               GFX9-GFX11 (except 
GFX1170)
+     21      1 bit   ENABLE_DX10_CLAMP               GFX9-GFX11 (except 
GFX11.7)
                                                        Wavefront starts 
execution
                                                        with DX10 clamp mode
                                                        enabled. Used by the 
vector
@@ -5801,7 +5817,7 @@ The fields used by CP for code objects before V3 also 
match those specified in
 
                                                        Used by CP to set up
                                                        
``COMPUTE_PGM_RSRC1.DX10_CLAMP``.
-                                                     GFX1170
+                                                     GFX11.7
                                                        Reserved. Must be 0.
                      WG_RR_EN                        GFX12
                                                        If 1, wavefronts are 
scheduled
@@ -5820,7 +5836,7 @@ The fields used by CP for code objects before V3 also 
match those specified in
                                                      CP is responsible for
                                                      filling in
                                                      
``COMPUTE_PGM_RSRC1.DEBUG_MODE``.
-     23      1 bit   ENABLE_IEEE_MODE                GFX9-GFX11 (except 
GFX1170)
+     23      1 bit   ENABLE_IEEE_MODE                GFX9-GFX11 (except 
GFX11.7)
                                                        Wavefront starts 
execution
                                                        with IEEE mode
                                                        enabled. Floating point
@@ -5836,7 +5852,7 @@ The fields used by CP for code objects before V3 also 
match those specified in
 
                                                        Used by CP to set up
                                                        
``COMPUTE_PGM_RSRC1.IEEE_MODE``.
-                                                     GFX1170
+                                                     GFX11.7
                                                        Reserved. Must be 0.
                      DISABLE_PERF                    GFX12
                                                        Reserved. Must be 0.
@@ -21534,10 +21550,10 @@ terminated by an ``.end_amdhsa_kernel`` directive.
                                                                                
                
:ref:`amdgpu-amdhsa-floating-point-denorm-mode-enumeration-values-table`.
      ``.amdhsa_dx10_clamp``                                   1                
   GFX6-GFX11   Controls ENABLE_DX10_CLAMP in
                                                                                
   (except      :ref:`amdgpu-amdhsa-compute_pgm_rsrc1-gfx6-gfx12-table`.
-                                                                               
   GFX1170)
+                                                                               
   GFX11.7)
      ``.amdhsa_ieee_mode``                                    1                
   GFX6-GFX11   Controls ENABLE_IEEE_MODE in
                                                                                
   (except      :ref:`amdgpu-amdhsa-compute_pgm_rsrc1-gfx6-gfx12-table`.
-                                                                               
   GFX1170)
+                                                                               
   GFX11.7)
      ``.amdhsa_round_robin_scheduling``                       0                
   GFX12        Controls ENABLE_WG_RR_EN in
                                                                                
                :ref:`amdgpu-amdhsa-compute_pgm_rsrc1-gfx6-gfx12-table`.
      ``.amdhsa_fp16_overflow``                                0                
   GFX9-GFX12   Controls FP16_OVFL in
diff --git a/llvm/include/llvm/BinaryFormat/ELF.h 
b/llvm/include/llvm/BinaryFormat/ELF.h
index d8a54151c213d..3fb5b51fb0a94 100644
--- a/llvm/include/llvm/BinaryFormat/ELF.h
+++ b/llvm/include/llvm/BinaryFormat/ELF.h
@@ -834,7 +834,9 @@ enum {
   X(0x59, EF_AMDGPU_MACH_AMDGCN_GFX12_GENERIC, "gfx12-generic")                
\
   X(0x5a, EF_AMDGPU_MACH_AMDGCN_GFX1251, "gfx1251")                            
\
   X(0x5b, EF_AMDGPU_MACH_AMDGCN_GFX12_5_GENERIC, "gfx12-5-generic")            
\
+  X(0x5c, EF_AMDGPU_MACH_AMDGCN_GFX1172, "gfx1172")                            
\
   X(0x5d, EF_AMDGPU_MACH_AMDGCN_GFX1170, "gfx1170")                            
\
+  X(0x5e, EF_AMDGPU_MACH_AMDGCN_GFX1171, "gfx1171")                            
\
   X(0x5f, EF_AMDGPU_MACH_AMDGCN_GFX9_4_GENERIC, "gfx9-4-generic")
 
 enum : unsigned {
diff --git a/llvm/include/llvm/TargetParser/AMDGPUTargetParser.def 
b/llvm/include/llvm/TargetParser/AMDGPUTargetParser.def
index babb815c28dee..191b8e4672082 100644
--- a/llvm/include/llvm/TargetParser/AMDGPUTargetParser.def
+++ b/llvm/include/llvm/TargetParser/AMDGPUTargetParser.def
@@ -119,6 +119,8 @@ AMDGCN_GPU      ("gfx1151",   GK_GFX1151, (11, 5,  1), 
FEATURE_FAST_FMA_F32|FEAT
 AMDGCN_GPU      ("gfx1152",   GK_GFX1152, (11, 5,  2), 
FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_WAVE32|FEATURE_WGP)
 AMDGCN_GPU      ("gfx1153",   GK_GFX1153, (11, 5,  3), 
FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_WAVE32|FEATURE_WGP)
 AMDGCN_GPU      ("gfx1170",   GK_GFX1170, (11, 7,  0), 
FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_WAVE32|FEATURE_WGP)
+AMDGCN_GPU      ("gfx1171",   GK_GFX1171, (11, 7,  1), 
FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_WAVE32|FEATURE_WGP)
+AMDGCN_GPU      ("gfx1172",   GK_GFX1172, (11, 7,  2), 
FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_WAVE32|FEATURE_WGP)
 AMDGCN_GPU      ("gfx1200",   GK_GFX1200, (12, 0,  0), 
FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_WAVE32|FEATURE_WGP)
 AMDGCN_GPU      ("gfx1201",   GK_GFX1201, (12, 0,  1), 
FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_WAVE32|FEATURE_WGP)
 AMDGCN_GPU      ("gfx1250",   GK_GFX1250, (12, 5,  0), 
FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_WAVE32|FEATURE_XNACK_ALWAYS)
diff --git a/llvm/lib/Target/AMDGPU/AMDGPU.td b/llvm/lib/Target/AMDGPU/AMDGPU.td
index 20e811503256e..0792bfedd1a99 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPU.td
+++ b/llvm/lib/Target/AMDGPU/AMDGPU.td
@@ -1893,7 +1893,7 @@ def FeatureISAVersion11_Common : FeatureSet<
 
 // There are few workarounds that need to be added to all targets. This
 // pessimizes codegen a bit on the generic GFX11 target. This generic target
-// does not include GFX1170 due to incompatible changes.
+// does not include GFX11_7 due to incompatible changes.
 def FeatureISAVersion11_Generic: FeatureSet<
   !listconcat(FeatureISAVersion11_Common.Features,
     [FeatureMSAALoadDstSelBug,
@@ -1960,7 +1960,7 @@ def FeatureISAVersion11_5_3 : FeatureSet<
   !listconcat(FeatureISAVersion11_5_Common.Features,
     [])>;
 
-def FeatureISAVersion11_7_0 : FeatureSet<
+def FeatureISAVersion11_7_Common : FeatureSet<
   !listconcat(FeatureISAVersion11_Common.Features,
     [FeatureGFX11_7Insts,
      FeatureSALUFloatInsts,
diff --git a/llvm/lib/Target/AMDGPU/GCNProcessors.td 
b/llvm/lib/Target/AMDGPU/GCNProcessors.td
index a6e739540650f..b2ca64fd56020 100644
--- a/llvm/lib/Target/AMDGPU/GCNProcessors.td
+++ b/llvm/lib/Target/AMDGPU/GCNProcessors.td
@@ -305,7 +305,15 @@ def : ProcessorModel<"gfx1153", GFX11SpeedModel,
 >;
 
 def : ProcessorModel<"gfx1170", GFX11SpeedModel,
-  FeatureISAVersion11_7_0.Features
+  FeatureISAVersion11_7_Common.Features
+>;
+
+def : ProcessorModel<"gfx1171", GFX11SpeedModel,
+  FeatureISAVersion11_7_Common.Features
+>;
+
+def : ProcessorModel<"gfx1172", GFX11SpeedModel,
+  FeatureISAVersion11_7_Common.Features
 >;
 
 // [gfx1100, gfx1101, gfx1102, gfx1103, gfx1150, gfx1151, gfx1152, gfx1153]
diff --git a/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp 
b/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp
index fae61302ebd90..d276bab0ff3be 100644
--- a/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp
+++ b/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp
@@ -116,6 +116,8 @@ StringRef 
AMDGPUTargetStreamer::getArchNameFromElfMach(unsigned ElfMach) {
   case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1152: AK = GK_GFX1152; break;
   case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1153: AK = GK_GFX1153; break;
   case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1170: AK = GK_GFX1170; break;
+  case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1171: AK = GK_GFX1171; break;
+  case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1172: AK = GK_GFX1172; break;
   case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1200: AK = GK_GFX1200; break;
   case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1201: AK = GK_GFX1201; break;
   case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1250: AK = GK_GFX1250; break;
@@ -206,6 +208,8 @@ unsigned AMDGPUTargetStreamer::getElfMach(StringRef GPU) {
   case GK_GFX1152: return ELF::EF_AMDGPU_MACH_AMDGCN_GFX1152;
   case GK_GFX1153: return ELF::EF_AMDGPU_MACH_AMDGCN_GFX1153;
   case GK_GFX1170: return ELF::EF_AMDGPU_MACH_AMDGCN_GFX1170;
+  case GK_GFX1171: return ELF::EF_AMDGPU_MACH_AMDGCN_GFX1171;
+  case GK_GFX1172: return ELF::EF_AMDGPU_MACH_AMDGCN_GFX1172;
   case GK_GFX1200: return ELF::EF_AMDGPU_MACH_AMDGCN_GFX1200;
   case GK_GFX1201: return ELF::EF_AMDGPU_MACH_AMDGCN_GFX1201;
   case GK_GFX1250: return ELF::EF_AMDGPU_MACH_AMDGCN_GFX1250;
diff --git a/llvm/lib/TargetParser/TargetParser.cpp 
b/llvm/lib/TargetParser/TargetParser.cpp
index 3664711d387bc..b697f6afa5408 100644
--- a/llvm/lib/TargetParser/TargetParser.cpp
+++ b/llvm/lib/TargetParser/TargetParser.cpp
@@ -340,6 +340,8 @@ static void fillAMDGCNFeatureMap(StringRef GPU, const 
Triple &T,
     Features["atomic-fmin-fmax-global-f32"] = true;
     break;
   case GK_GFX1170:
+  case GK_GFX1171:
+  case GK_GFX1172:
     Features["ci-insts"] = true;
     Features["dot7-insts"] = true;
     Features["dot8-insts"] = true;
diff --git a/llvm/test/CodeGen/AMDGPU/directive-amdgcn-target.ll 
b/llvm/test/CodeGen/AMDGPU/directive-amdgcn-target.ll
index 548a70436fc53..a7ac3bd81cd9f 100644
--- a/llvm/test/CodeGen/AMDGPU/directive-amdgcn-target.ll
+++ b/llvm/test/CodeGen/AMDGPU/directive-amdgcn-target.ll
@@ -105,6 +105,8 @@
 ; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1152 < %s | FileCheck 
--check-prefixes=GFX1152 %s
 ; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1153 < %s | FileCheck 
--check-prefixes=GFX1153 %s
 ; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1170 < %s | FileCheck 
--check-prefixes=GFX1170 %s
+; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1171 < %s | FileCheck 
--check-prefixes=GFX1171 %s
+; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1172 < %s | FileCheck 
--check-prefixes=GFX1172 %s
 ; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1200 < %s | FileCheck 
--check-prefixes=GFX1200 %s
 ; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1201 < %s | FileCheck 
--check-prefixes=GFX1201 %s
 ; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1250 < %s | FileCheck 
--check-prefixes=GFX1250 %s
@@ -207,6 +209,8 @@
 ; GFX1152: .amdgcn_target "amdgcn-amd-amdhsa--gfx1152"
 ; GFX1153: .amdgcn_target "amdgcn-amd-amdhsa--gfx1153"
 ; GFX1170: .amdgcn_target "amdgcn-amd-amdhsa--gfx1170"
+; GFX1171: .amdgcn_target "amdgcn-amd-amdhsa--gfx1171"
+; GFX1172: .amdgcn_target "amdgcn-amd-amdhsa--gfx1172"
 ; GFX1200: .amdgcn_target "amdgcn-amd-amdhsa--gfx1200"
 ; GFX1201: .amdgcn_target "amdgcn-amd-amdhsa--gfx1201"
 ; GFX1250: .amdgcn_target "amdgcn-amd-amdhsa--gfx1250"
diff --git a/llvm/test/CodeGen/AMDGPU/elf-header-flags-mach.ll 
b/llvm/test/CodeGen/AMDGPU/elf-header-flags-mach.ll
index 9527a65bb6535..830a4134170a8 100644
--- a/llvm/test/CodeGen/AMDGPU/elf-header-flags-mach.ll
+++ b/llvm/test/CodeGen/AMDGPU/elf-header-flags-mach.ll
@@ -76,6 +76,8 @@
 ; RUN: llc -filetype=obj -mtriple=amdgcn -mcpu=gfx1152 < %s | llvm-readobj 
--file-header - | FileCheck --check-prefixes=ALL,ARCH-GCN,GFX1152 %s
 ; RUN: llc -filetype=obj -mtriple=amdgcn -mcpu=gfx1153 < %s | llvm-readobj 
--file-header - | FileCheck --check-prefixes=ALL,ARCH-GCN,GFX1153 %s
 ; RUN: llc -filetype=obj -mtriple=amdgcn -mcpu=gfx1170 < %s | llvm-readobj 
--file-header - | FileCheck --check-prefixes=ALL,ARCH-GCN,GFX1170 %s
+; RUN: llc -filetype=obj -mtriple=amdgcn -mcpu=gfx1171 < %s | llvm-readobj 
--file-header - | FileCheck --check-prefixes=ALL,ARCH-GCN,GFX1171 %s
+; RUN: llc -filetype=obj -mtriple=amdgcn -mcpu=gfx1172 < %s | llvm-readobj 
--file-header - | FileCheck --check-prefixes=ALL,ARCH-GCN,GFX1172 %s
 ; RUN: llc -filetype=obj -mtriple=amdgcn -mcpu=gfx1200 < %s | llvm-readobj 
--file-header - | FileCheck --check-prefixes=ALL,ARCH-GCN,GFX1200 %s
 ; RUN: llc -filetype=obj -mtriple=amdgcn -mcpu=gfx1201 < %s | llvm-readobj 
--file-header - | FileCheck --check-prefixes=ALL,ARCH-GCN,GFX1201 %s
 ; RUN: llc -filetype=obj -mtriple=amdgcn -mcpu=gfx1250 < %s | llvm-readobj 
--file-header - | FileCheck --check-prefixes=ALL,ARCH-GCN,GFX1250 %s
@@ -162,6 +164,8 @@
 ; GFX1152:       EF_AMDGPU_MACH_AMDGCN_GFX1152 (0x55)
 ; GFX1153:       EF_AMDGPU_MACH_AMDGCN_GFX1153 (0x58)
 ; GFX1170:       EF_AMDGPU_MACH_AMDGCN_GFX1170 (0x5D)
+; GFX1171:       EF_AMDGPU_MACH_AMDGCN_GFX1171 (0x5E)
+; GFX1172:       EF_AMDGPU_MACH_AMDGCN_GFX1172 (0x5C)
 ; GFX1200:       EF_AMDGPU_MACH_AMDGCN_GFX1200 (0x48)
 ; GFX1201:       EF_AMDGPU_MACH_AMDGCN_GFX1201 (0x4E)
 ; GFX1250:       EF_AMDGPU_MACH_AMDGCN_GFX1250 (0x49)
diff --git a/llvm/test/Object/AMDGPU/elf-header-flags-mach.yaml 
b/llvm/test/Object/AMDGPU/elf-header-flags-mach.yaml
index 4d303974f1bae..6de089e9b5272 100644
--- a/llvm/test/Object/AMDGPU/elf-header-flags-mach.yaml
+++ b/llvm/test/Object/AMDGPU/elf-header-flags-mach.yaml
@@ -238,6 +238,14 @@
 # RUN: llvm-readobj -S --file-headers %t.o.AMDGCN_GFX1170 | FileCheck 
--check-prefixes=ELF-AMDGCN-ALL,ELF-AMDGCN-GFX1170 %s
 # RUN: obj2yaml %t.o.AMDGCN_GFX1170 | FileCheck 
--check-prefixes=YAML-AMDGCN-ALL,YAML-AMDGCN-GFX1170 %s
 
+# RUN: sed -e 's/<BITS>/64/' -e 's/<MACH>/AMDGCN_GFX1171/' %s | yaml2obj -o 
%t.o.AMDGCN_GFX1171
+# RUN: llvm-readobj -S --file-headers %t.o.AMDGCN_GFX1171 | FileCheck 
--check-prefixes=ELF-AMDGCN-ALL,ELF-AMDGCN-GFX1171 %s
+# RUN: obj2yaml %t.o.AMDGCN_GFX1171 | FileCheck 
--check-prefixes=YAML-AMDGCN-ALL,YAML-AMDGCN-GFX1171 %s
+
+# RUN: sed -e 's/<BITS>/64/' -e 's/<MACH>/AMDGCN_GFX1172/' %s | yaml2obj -o 
%t.o.AMDGCN_GFX1172
+# RUN: llvm-readobj -S --file-headers %t.o.AMDGCN_GFX1172 | FileCheck 
--check-prefixes=ELF-AMDGCN-ALL,ELF-AMDGCN-GFX1172 %s
+# RUN: obj2yaml %t.o.AMDGCN_GFX1172 | FileCheck 
--check-prefixes=YAML-AMDGCN-ALL,YAML-AMDGCN-GFX1172 %s
+
 # RUN: sed -e 's/<BITS>/64/' -e 's/<MACH>/AMDGCN_GFX1200/' %s | yaml2obj -o 
%t.o.AMDGCN_GFX1200
 # RUN: llvm-readobj -S --file-headers %t.o.AMDGCN_GFX1200 | FileCheck 
--check-prefixes=ELF-AMDGCN-ALL,ELF-AMDGCN-GFX1200 %s
 # RUN: obj2yaml %t.o.AMDGCN_GFX1200 | FileCheck 
--check-prefixes=YAML-AMDGCN-ALL,YAML-AMDGCN-GFX1200 %s
@@ -484,6 +492,12 @@
 # ELF-AMDGCN-GFX1170:   EF_AMDGPU_MACH_AMDGCN_GFX1170 (0x5D)
 # YAML-AMDGCN-GFX1170:  Flags: [ EF_AMDGPU_MACH_AMDGCN_GFX1170 ]
 
+# ELF-AMDGCN-GFX1171:   EF_AMDGPU_MACH_AMDGCN_GFX1171 (0x5E)
+# YAML-AMDGCN-GFX1171:  Flags: [ EF_AMDGPU_MACH_AMDGCN_GFX1171 ]
+
+# ELF-AMDGCN-GFX1172:   EF_AMDGPU_MACH_AMDGCN_GFX1172 (0x5C)
+# YAML-AMDGCN-GFX1172:  Flags: [ EF_AMDGPU_MACH_AMDGCN_GFX1172 ]
+
 # ELF-AMDGCN-GFX1200:   EF_AMDGPU_MACH_AMDGCN_GFX1200 (0x48)
 # YAML-AMDGCN-GFX1200:  Flags: [ EF_AMDGPU_MACH_AMDGCN_GFX1200 ]
 
diff --git a/llvm/test/tools/llvm-objdump/ELF/AMDGPU/subtarget.ll 
b/llvm/test/tools/llvm-objdump/ELF/AMDGPU/subtarget.ll
index 94e57ef93c0c0..cfacaff1f2431 100644
--- a/llvm/test/tools/llvm-objdump/ELF/AMDGPU/subtarget.ll
+++ b/llvm/test/tools/llvm-objdump/ELF/AMDGPU/subtarget.ll
@@ -50,6 +50,16 @@ define amdgpu_kernel void @test_kernel() {
 ; RUN: llvm-objdump -D -mllvm --amdhsa-code-object-version=6 %t.o > 
%t-detect.txt
 ; RUN: diff %t-specify.txt %t-detect.txt
 
+; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1172 -filetype=obj -O0 -o %t.o 
%s
+; RUN: llvm-objdump -D --arch-name=amdgcn --mcpu=gfx1172 %t.o > %t-specify.txt
+; RUN: llvm-objdump -D %t.o > %t-detect.txt
+; RUN: diff %t-specify.txt %t-detect.txt
+
+; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1171 -filetype=obj -O0 -o %t.o 
%s
+; RUN: llvm-objdump -D --arch-name=amdgcn --mcpu=gfx1171 %t.o > %t-specify.txt
+; RUN: llvm-objdump -D %t.o > %t-detect.txt
+; RUN: diff %t-specify.txt %t-detect.txt
+
 ; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1170 -filetype=obj -O0 -o %t.o 
%s
 ; RUN: llvm-objdump -D --arch-name=amdgcn --mcpu=gfx1170 %t.o > %t-specify.txt
 ; RUN: llvm-objdump -D %t.o > %t-detect.txt
diff --git a/llvm/test/tools/llvm-readobj/ELF/AMDGPU/elf-headers.test 
b/llvm/test/tools/llvm-readobj/ELF/AMDGPU/elf-headers.test
index 170c24c163f55..c76684f09e1ef 100644
--- a/llvm/test/tools/llvm-readobj/ELF/AMDGPU/elf-headers.test
+++ b/llvm/test/tools/llvm-readobj/ELF/AMDGPU/elf-headers.test
@@ -442,6 +442,24 @@
 # RUN: yaml2obj %s -o %t -DABI_VERSION=2 
-DFLAG_NAME=EF_AMDGPU_MACH_AMDGCN_GFX1170
 # RUN: llvm-readobj -h %t | FileCheck %s 
--check-prefixes=ALL,KNOWN-ABI-VERSION,SINGLE-FLAG --match-full-lines 
-DABI_VERSION=2 -DFILE=%t -DFLAG_NAME=EF_AMDGPU_MACH_AMDGCN_GFX1170 
-DFLAG_VALUE=0x5D
 
+# RUN: yaml2obj %s -o %t -DABI_VERSION=0 
-DFLAG_NAME=EF_AMDGPU_MACH_AMDGCN_GFX1171
+# RUN: llvm-readobj -h %t | FileCheck %s 
--check-prefixes=ALL,KNOWN-ABI-VERSION,SINGLE-FLAG --match-full-lines 
-DABI_VERSION=0 -DFILE=%t -DFLAG_NAME=EF_AMDGPU_MACH_AMDGCN_GFX1171 
-DFLAG_VALUE=0x5E
+
+# RUN: yaml2obj %s -o %t -DABI_VERSION=1 
-DFLAG_NAME=EF_AMDGPU_MACH_AMDGCN_GFX1171
+# RUN: llvm-readobj -h %t | FileCheck %s 
--check-prefixes=ALL,KNOWN-ABI-VERSION,SINGLE-FLAG --match-full-lines 
-DABI_VERSION=1 -DFILE=%t -DFLAG_NAME=EF_AMDGPU_MACH_AMDGCN_GFX1171 
-DFLAG_VALUE=0x5E
+
+# RUN: yaml2obj %s -o %t -DABI_VERSION=2 
-DFLAG_NAME=EF_AMDGPU_MACH_AMDGCN_GFX1171
+# RUN: llvm-readobj -h %t | FileCheck %s 
--check-prefixes=ALL,KNOWN-ABI-VERSION,SINGLE-FLAG --match-full-lines 
-DABI_VERSION=2 -DFILE=%t -DFLAG_NAME=EF_AMDGPU_MACH_AMDGCN_GFX1171 
-DFLAG_VALUE=0x5E
+
+# RUN: yaml2obj %s -o %t -DABI_VERSION=0 
-DFLAG_NAME=EF_AMDGPU_MACH_AMDGCN_GFX1172
+# RUN: llvm-readobj -h %t | FileCheck %s 
--check-prefixes=ALL,KNOWN-ABI-VERSION,SINGLE-FLAG --match-full-lines 
-DABI_VERSION=0 -DFILE=%t -DFLAG_NAME=EF_AMDGPU_MACH_AMDGCN_GFX1172 
-DFLAG_VALUE=0x5C
+
+# RUN: yaml2obj %s -o %t -DABI_VERSION=1 
-DFLAG_NAME=EF_AMDGPU_MACH_AMDGCN_GFX1172
+# RUN: llvm-readobj -h %t | FileCheck %s 
--check-prefixes=ALL,KNOWN-ABI-VERSION,SINGLE-FLAG --match-full-lines 
-DABI_VERSION=1 -DFILE=%t -DFLAG_NAME=EF_AMDGPU_MACH_AMDGCN_GFX1172 
-DFLAG_VALUE=0x5C
+
+# RUN: yaml2obj %s -o %t -DABI_VERSION=2 
-DFLAG_NAME=EF_AMDGPU_MACH_AMDGCN_GFX1172
+# RUN: llvm-readobj -h %t | FileCheck %s 
--check-prefixes=ALL,KNOWN-ABI-VERSION,SINGLE-FLAG --match-full-lines 
-DABI_VERSION=2 -DFILE=%t -DFLAG_NAME=EF_AMDGPU_MACH_AMDGCN_GFX1172 
-DFLAG_VALUE=0x5C
+
 # RUN: yaml2obj %s -o %t -DABI_VERSION=0 
-DFLAG_NAME=EF_AMDGPU_MACH_AMDGCN_GFX1200
 # RUN: llvm-readobj -h %t | FileCheck %s 
--check-prefixes=ALL,KNOWN-ABI-VERSION,SINGLE-FLAG --match-full-lines 
-DABI_VERSION=0 -DFILE=%t -DFLAG_NAME=EF_AMDGPU_MACH_AMDGCN_GFX1200 
-DFLAG_VALUE=0x48
 

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